Added UN instruction and fixed UB
This commit is contained in:
parent
446225bcf6
commit
141c5f524f
33
Cargo.lock
generated
33
Cargo.lock
generated
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@ -165,12 +165,9 @@ dependencies = [
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[[package]]
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name = "log"
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version = "0.4.17"
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version = "0.4.19"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "abb12e687cfb44aa40f41fc3978ef76448f9b6038cad6aef4259d3c095a2382e"
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dependencies = [
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"cfg-if",
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]
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checksum = "b06a4cde4c0f271a446782e3eff8de789548ce57dbc8eca9292c27f4a42004b4"
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[[package]]
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name = "logos"
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@ -192,7 +189,7 @@ dependencies = [
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"proc-macro2",
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"quote",
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"regex-syntax",
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"syn 2.0.18",
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"syn 2.0.25",
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]
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[[package]]
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@ -206,30 +203,30 @@ dependencies = [
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[[package]]
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name = "once_cell"
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version = "1.17.1"
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version = "1.18.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "b7e5500299e16ebb147ae15a00a942af264cf3688f47923b8fc2cd5858f23ad3"
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checksum = "dd8b5dd2ae5ed71462c540258bedcb51965123ad7e7ccf4b9a8cafaa4a63576d"
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[[package]]
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name = "paste"
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version = "1.0.12"
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version = "1.0.13"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "9f746c4065a8fa3fe23974dd82f15431cc8d40779821001404d10d2e79ca7d79"
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checksum = "b4b27ab7be369122c218afc2079489cdcb4b517c0a3fc386ff11e1fedfcc2b35"
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[[package]]
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name = "proc-macro2"
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version = "1.0.59"
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version = "1.0.64"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "6aeca18b86b413c660b781aa319e4e2648a3e6f9eadc9b47e9038e6fe9f3451b"
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checksum = "78803b62cbf1f46fde80d7c0e803111524b9877184cfe7c3033659490ac7a7da"
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dependencies = [
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"unicode-ident",
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]
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[[package]]
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name = "quote"
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version = "1.0.28"
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version = "1.0.29"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "1b9ab9c7eadfd8df19006f1cf1a4aed13540ed5cbc047010ece5826e10825488"
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checksum = "573015e8ab27661678357f27dc26460738fd2b6c86e46f386fde94cb5d913105"
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dependencies = [
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"proc-macro2",
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]
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@ -274,9 +271,9 @@ dependencies = [
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[[package]]
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name = "syn"
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version = "2.0.18"
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version = "2.0.25"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "32d41677bcbe24c20c52e7c70b0d8db04134c5d1066bf98662e2871ad200ea3e"
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checksum = "15e3fc8c0c74267e2df136e5e5fb656a464158aa57624053375eb9c8c6e25ae2"
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dependencies = [
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"proc-macro2",
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"quote",
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@ -285,9 +282,9 @@ dependencies = [
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[[package]]
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name = "unicode-ident"
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version = "1.0.9"
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version = "1.0.10"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "b15811caf2415fb889178633e7724bad2509101cde276048e013b9def5e51fa0"
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checksum = "22049a19f4a68748a168c0fc439f9516686aa045927ff767eca0a85101fb6e73"
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[[package]]
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name = "unicode-width"
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@ -27,7 +27,7 @@ macros::impl_both!(
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bd(p0: R, p1: I)
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=> [LI],
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n()
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=> [NOP, ECALL],
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=> [UN, NOP, ECALL],
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);
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impl Assembler {
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@ -36,6 +36,11 @@ impl Assembler {
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pub fn i_brc(&mut self, p0: u8, p1: u8, p2: u8) {
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self.i_param_bbb(hbbytecode::opcode::BRC, p0, p1, p2)
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}
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/// Append 12 zeroes (UN) at the end
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pub fn finalise(&mut self) {
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self.buf.extend([0; 12]);
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}
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}
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pub trait Imm {
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@ -48,6 +48,7 @@ fn main() -> Result<(), Box<dyn Error>> {
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.eprint(("engine_internal", Source::from(&code)))
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.unwrap();
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} else {
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assembler.finalise();
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std::io::stdout().lock().write_all(&assembler.buf).unwrap();
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}
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@ -18,62 +18,63 @@ macro_rules! constmod {
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constmod!(pub opcode(u8) {
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//! Opcode constant module
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NOP = 0, "N; Do nothing";
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UN = 0, "N; Raises a trap";
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NOP = 1, "N; Do nothing";
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ADD = 1, "BBB; #0 ← #1 + #2";
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SUB = 2, "BBB; #0 ← #1 - #2";
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MUL = 3, "BBB; #0 ← #1 × #2";
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AND = 4, "BBB; #0 ← #1 & #2";
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OR = 5, "BBB; #0 ← #1 | #2";
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XOR = 6, "BBB; #0 ← #1 ^ #2";
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SL = 7, "BBB; #0 ← #1 « #2";
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SR = 8, "BBB; #0 ← #1 » #2";
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SRS = 9, "BBB; #0 ← #1 » #2 (signed)";
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CMP = 10, "BBB; #0 ← #1 <=> #2";
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CMPU = 11, "BBB; #0 ← #1 <=> #2 (unsigned)";
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DIR = 12, "BBBB; #0 ← #2 / #3, #1 ← #2 % #3";
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NEG = 13, "BB; #0 ← -#1";
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NOT = 14, "BB; #0 ← !#1";
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ADD = 2, "BBB; #0 ← #1 + #2";
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SUB = 3, "BBB; #0 ← #1 - #2";
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MUL = 4, "BBB; #0 ← #1 × #2";
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AND = 5, "BBB; #0 ← #1 & #2";
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OR = 6, "BBB; #0 ← #1 | #2";
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XOR = 7, "BBB; #0 ← #1 ^ #2";
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SL = 8, "BBB; #0 ← #1 « #2";
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SR = 9, "BBB; #0 ← #1 » #2";
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SRS = 10, "BBB; #0 ← #1 » #2 (signed)";
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CMP = 11, "BBB; #0 ← #1 <=> #2";
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CMPU = 12, "BBB; #0 ← #1 <=> #2 (unsigned)";
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DIR = 13, "BBBB; #0 ← #2 / #3, #1 ← #2 % #3";
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NEG = 14, "BB; #0 ← -#1";
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NOT = 15, "BB; #0 ← !#1";
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ADDI = 15, "BBD; #0 ← #1 + imm #2";
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MULI = 16, "BBD; #0 ← #1 × imm #2";
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ANDI = 17, "BBD; #0 ← #1 & imm #2";
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ORI = 18, "BBD; #0 ← #1 | imm #2";
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XORI = 19, "BBD; #0 ← #1 ^ imm #2";
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SLI = 20, "BBD; #0 ← #1 « imm #2";
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SRI = 21, "BBD; #0 ← #1 » imm #2";
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SRSI = 22, "BBD; #0 ← #1 » imm #2 (signed)";
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CMPI = 23, "BBD; #0 ← #1 <=> imm #2";
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CMPUI = 24, "BBD; #0 ← #1 <=> imm #2 (unsigned)";
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ADDI = 16, "BBD; #0 ← #1 + imm #2";
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MULI = 17, "BBD; #0 ← #1 × imm #2";
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ANDI = 18, "BBD; #0 ← #1 & imm #2";
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ORI = 19, "BBD; #0 ← #1 | imm #2";
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XORI = 20, "BBD; #0 ← #1 ^ imm #2";
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SLI = 21, "BBD; #0 ← #1 « imm #2";
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SRI = 22, "BBD; #0 ← #1 » imm #2";
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SRSI = 23, "BBD; #0 ← #1 » imm #2 (signed)";
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CMPI = 24, "BBD; #0 ← #1 <=> imm #2";
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CMPUI = 25, "BBD; #0 ← #1 <=> imm #2 (unsigned)";
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CP = 25, "BB; Copy #0 ← #1";
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SWA = 26, "BB; Swap #0 and #1";
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LI = 27, "BD; #0 ← imm #1";
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LD = 28, "BBDB; #0 ← [#1 + imm #3], imm #4 bytes, overflowing";
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ST = 29, "BBDB; [#1 + imm #3] ← #0, imm #4 bytes, overflowing";
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BMC = 30, "BBD; [#0] ← [#1], imm #2 bytes";
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BRC = 31, "BBB; #0 ← #1, imm #2 registers";
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CP = 26, "BB; Copy #0 ← #1";
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SWA = 27, "BB; Swap #0 and #1";
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LI = 28, "BD; #0 ← imm #1";
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LD = 29, "BBDB; #0 ← [#1 + imm #3], imm #4 bytes, overflowing";
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ST = 30, "BBDB; [#1 + imm #3] ← #0, imm #4 bytes, overflowing";
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BMC = 31, "BBD; [#0] ← [#1], imm #2 bytes";
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BRC = 32, "BBB; #0 ← #1, imm #2 registers";
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JAL = 32, "BD; Copy PC to #0 and unconditional jump [#1 + imm #2]";
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JEQ = 33, "BBD; if #0 = #1 → jump imm #2";
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JNE = 34, "BBD; if #0 ≠ #1 → jump imm #2";
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JLT = 35, "BBD; if #0 < #1 → jump imm #2";
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JGT = 36, "BBD; if #0 > #1 → jump imm #2";
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JLTU = 37, "BBD; if #0 < #1 → jump imm #2 (unsigned)";
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JGTU = 38, "BBD; if #0 > #1 → jump imm #2 (unsigned)";
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ECALL = 39, "N; Issue system call";
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JAL = 33, "BD; Copy PC to #0 and unconditional jump [#1 + imm #2]";
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JEQ = 34, "BBD; if #0 = #1 → jump imm #2";
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JNE = 35, "BBD; if #0 ≠ #1 → jump imm #2";
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JLT = 36, "BBD; if #0 < #1 → jump imm #2";
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JGT = 37, "BBD; if #0 > #1 → jump imm #2";
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JLTU = 38, "BBD; if #0 < #1 → jump imm #2 (unsigned)";
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JGTU = 39, "BBD; if #0 > #1 → jump imm #2 (unsigned)";
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ECALL = 40, "N; Issue system call";
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ADDF = 40, "BBB; #0 ← #1 +. #2";
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SUBF = 41, "BBB; #0 ← #1 -. #2";
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MULF = 42, "BBB; #0 ← #1 +. #2";
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DIRF = 43, "BBBB; #0 ← #2 / #3, #1 ← #2 % #3";
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FMAF = 44, "BBBB; #0 ← (#1 * #2) + #3";
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NEGF = 45, "BB; #0 ← -#1";
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ITF = 46, "BB; #0 ← #1 as float";
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FTI = 47, "BB; #0 ← #1 as int";
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ADDF = 41, "BBB; #0 ← #1 +. #2";
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SUBF = 42, "BBB; #0 ← #1 -. #2";
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MULF = 43, "BBB; #0 ← #1 +. #2";
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DIRF = 44, "BBBB; #0 ← #2 / #3, #1 ← #2 % #3";
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FMAF = 45, "BBBB; #0 ← (#1 * #2) + #3";
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NEGF = 46, "BB; #0 ← -#1";
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ITF = 47, "BB; #0 ← #1 as float";
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FTI = 48, "BB; #0 ← #1 as int";
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ADDFI = 48, "BBD; #0 ← #1 +. imm #2";
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MULFI = 49, "BBD; #0 ← #1 *. imm #2";
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ADDFI = 49, "BBD; #0 ← #1 +. imm #2";
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MULFI = 50, "BBD; #0 ← #1 *. imm #2";
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});
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#[repr(packed)]
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@ -9,6 +9,8 @@ pub enum ErrorKind {
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Unimplemented,
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/// Attempted to copy over register boundary
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RegisterArrayOverflow,
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/// Program is not validly terminated
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InvalidEnd,
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}
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/// Error
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@ -25,6 +27,22 @@ pub struct Error {
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pub fn validate(mut program: &[u8]) -> Result<(), Error> {
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use hbbytecode::opcode::*;
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if program.len() < 12 {
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return Err(Error {
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kind: ErrorKind::InvalidEnd,
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index: 0,
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});
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}
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for (index, item) in program.iter().enumerate().skip(program.len() - 12) {
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if *item != 0 {
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return Err(Error {
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kind: ErrorKind::InvalidEnd,
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index,
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});
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}
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}
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let start = program;
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loop {
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// Match on instruction types and perform necessary checks
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@ -46,7 +64,7 @@ pub fn validate(mut program: &[u8]) -> Result<(), Error> {
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index: (program.as_ptr() as usize) - (start.as_ptr() as usize),
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})
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}
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[NOP | ECALL, rest @ ..]
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[UN | NOP | ECALL, rest @ ..]
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| [DIR | DIRF, _, _, _, _, rest @ ..]
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| [ADD..=CMPU | BRC | ADDF..=MULF, _, _, _, rest @ ..]
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| [NEG..=NOT | CP..=SWA | NEGF..=FTI, _, _, rest @ ..]
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@ -6,10 +6,6 @@
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// - Validation has to assure there is 256 registers (r0 - r255)
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// - Instructions have to be valid as specified (values and sizes)
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// - Mapped pages should be at least 4 KiB
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// - Yes, I am aware of the UB when jumping in-mid of instruction where
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// the read byte corresponds to an instruction whose lenght exceets the
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// program size. If you are (rightfully) worried about the UB, for now just
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// append your program with 11 zeroes.
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use self::mem::HandlePageFault;
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@ -97,6 +93,9 @@ pub struct Vm<'a, PfHandler, const TIMER_QUOTIENT: usize> {
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/// Program
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program: &'a [u8],
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/// Cached program length (without unreachable end)
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program_len: usize,
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/// Program timer
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timer: usize,
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}
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@ -114,6 +113,7 @@ impl<'a, PfHandler: HandlePageFault, const TIMER_QUOTIENT: usize>
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memory: Default::default(),
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pfhandler: traph,
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pc: 0,
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program_len: program.len() - 12,
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program,
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timer: 0,
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}
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@ -131,13 +131,18 @@ impl<'a, PfHandler: HandlePageFault, const TIMER_QUOTIENT: usize>
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pub fn run(&mut self) -> Result<VmRunOk, VmRunError> {
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use hbbytecode::opcode::*;
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loop {
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// Fetch instruction
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let Some(&opcode) = self.program.get(self.pc)
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else { return Ok(VmRunOk::End) };
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// Check instruction boundary
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if self.pc >= self.program_len {
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return Ok(VmRunOk::End);
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}
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// Big match
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unsafe {
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match opcode {
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match *self.program.get_unchecked(self.pc) {
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UN => {
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param!(self, ());
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return Err(VmRunError::Unreachable);
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}
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NOP => param!(self, ()),
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ADD => binary_op!(self, as_u64, u64::wrapping_add),
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SUB => binary_op!(self, as_u64, u64::wrapping_sub),
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@ -352,6 +357,9 @@ pub enum VmRunError {
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/// Unhandled store access exception
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StoreAccessEx(u64),
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/// Reached unreachable code
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Unreachable,
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}
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/// Virtual machine halt ok
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104
spec.md
104
spec.md
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@ -4,6 +4,7 @@
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- All numbers are encoded little-endian
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- There is 256 registers, they are represented by a byte
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- Immediate values are 64 bit
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- Program is by spec required to be terminated with 12 zero bytes
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### Instruction encoding
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- Instruction parameters are packed (no alignment)
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@ -35,8 +36,9 @@
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- N type
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| Opcode | Name | Action |
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|:------:|:----:|:----------:|
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| 0 | NOP | Do nothing |
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|:------:|:----:|:-----------------------------:|
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| 0 | UN | Trigger unreachable code trap |
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| 1 | NOP | Do nothing |
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## Integer binary ops.
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- BBB type
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@ -44,21 +46,21 @@
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| Opcode | Name | Action |
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|:------:|:----:|:-----------------------:|
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| 1 | ADD | Wrapping addition |
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| 2 | SUB | Wrapping subtraction |
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| 3 | MUL | Wrapping multiplication |
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| 4 | AND | Bitand |
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| 5 | OR | Bitor |
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| 6 | XOR | Bitxor |
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| 7 | SL | Unsigned left bitshift |
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| 8 | SR | Unsigned right bitshift |
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| 9 | SRS | Signed right bitshift |
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| 2 | ADD | Wrapping addition |
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| 3 | SUB | Wrapping subtraction |
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| 4 | MUL | Wrapping multiplication |
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| 5 | AND | Bitand |
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| 6 | OR | Bitor |
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| 7 | XOR | Bitxor |
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| 8 | SL | Unsigned left bitshift |
|
||||
| 9 | SR | Unsigned right bitshift |
|
||||
| 10 | SRS | Signed right bitshift |
|
||||
|
||||
### Comparsion
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:-------------------:|
|
||||
| 10 | CMP | Signed comparsion |
|
||||
| 11 | CMPU | Unsigned comparsion |
|
||||
| 11 | CMP | Signed comparsion |
|
||||
| 12 | CMPU | Unsigned comparsion |
|
||||
|
||||
#### Comparsion table
|
||||
| #1 *op* #2 | Result |
|
||||
|
|
@ -75,7 +77,7 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:-------------------------------:|
|
||||
| 12 | DIR | Divide and remainder combinated |
|
||||
| 13 | DIR | Divide and remainder combinated |
|
||||
|
||||
### Negations
|
||||
- Type BB
|
||||
|
|
@ -83,8 +85,8 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:----------------:|
|
||||
| 13 | NEG | Bit negation |
|
||||
| 14 | NOT | Logical negation |
|
||||
| 14 | NEG | Bit negation |
|
||||
| 15 | NOT | Logical negation |
|
||||
|
||||
## Integer immediate binary ops.
|
||||
- Type BBD
|
||||
|
|
@ -92,22 +94,22 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:-----------------------:|
|
||||
| 15 | ADDI | Wrapping addition |
|
||||
| 16 | MULI | Wrapping subtraction |
|
||||
| 17 | ANDI | Bitand |
|
||||
| 18 | ORI | Bitor |
|
||||
| 19 | XORI | Bitxor |
|
||||
| 20 | SLI | Unsigned left bitshift |
|
||||
| 21 | SRI | Unsigned right bitshift |
|
||||
| 22 | SRSI | Signed right bitshift |
|
||||
| 16 | ADDI | Wrapping addition |
|
||||
| 17 | MULI | Wrapping subtraction |
|
||||
| 18 | ANDI | Bitand |
|
||||
| 19 | ORI | Bitor |
|
||||
| 20 | XORI | Bitxor |
|
||||
| 21 | SLI | Unsigned left bitshift |
|
||||
| 22 | SRI | Unsigned right bitshift |
|
||||
| 23 | SRSI | Signed right bitshift |
|
||||
|
||||
### Comparsion
|
||||
- Comparsion is the same as when RRR type
|
||||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:-----:|:-------------------:|
|
||||
| 23 | CMPI | Signed comparsion |
|
||||
| 24 | CMPUI | Unsigned comparsion |
|
||||
| 24 | CMPI | Signed comparsion |
|
||||
| 25 | CMPUI | Unsigned comparsion |
|
||||
|
||||
## Register value set / copy
|
||||
|
||||
|
|
@ -117,7 +119,7 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:------:|
|
||||
| 25 | CP | Copy |
|
||||
| 26 | CP | Copy |
|
||||
|
||||
### Swap
|
||||
- Type BB
|
||||
|
|
@ -125,7 +127,7 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:------:|
|
||||
| 26 | SWA | Swap |
|
||||
| 27 | SWA | Swap |
|
||||
|
||||
### Load immediate
|
||||
- Type BD
|
||||
|
|
@ -133,7 +135,7 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:--------------:|
|
||||
| 27 | LI | Load immediate |
|
||||
| 28 | LI | Load immediate |
|
||||
|
||||
## Memory operations
|
||||
- Type BBDH
|
||||
|
|
@ -142,8 +144,8 @@
|
|||
### Load / Store
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:---------------------------------------:|
|
||||
| 28 | LD | `#0 ← [#1 + imm #3], copy imm #4 bytes` |
|
||||
| 29 | ST | `[#1 + imm #3] ← #0, copy imm #4 bytes` |
|
||||
| 29 | LD | `#0 ← [#1 + imm #3], copy imm #4 bytes` |
|
||||
| 30 | ST | `[#1 + imm #3] ← #0, copy imm #4 bytes` |
|
||||
|
||||
## Block copy
|
||||
- Block copy source and target can overlap
|
||||
|
|
@ -153,7 +155,7 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:--------------------------------:|
|
||||
| 30 | BMC | `[#1] ← [#0], copy imm #2 bytes` |
|
||||
| 31 | BMC | `[#1] ← [#0], copy imm #2 bytes` |
|
||||
|
||||
### Register copy
|
||||
- Type BBB
|
||||
|
|
@ -161,7 +163,7 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:--------------------------------:|
|
||||
| 31 | BRC | `#1 ← #0, copy imm #2 registers` |
|
||||
| 32 | BRC | `#1 ← #0, copy imm #2 registers` |
|
||||
|
||||
## Control flow
|
||||
|
||||
|
|
@ -170,7 +172,7 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:-------------------------------------------------:|
|
||||
| 32 | JAL | Save current PC to `#0` and jump at `#1 + imm #2` |
|
||||
| 33 | JAL | Save current PC to `#0` and jump at `#1 + imm #2` |
|
||||
|
||||
### Conditional jumps
|
||||
- Type BBD
|
||||
|
|
@ -178,19 +180,19 @@
|
|||
|
||||
| Opcode | Name | Comparsion |
|
||||
|:------:|:----:|:------------:|
|
||||
| 33 | JEQ | = |
|
||||
| 34 | JNE | ≠ |
|
||||
| 35 | JLT | < (signed) |
|
||||
| 36 | JGT | > (signed) |
|
||||
| 37 | JLTU | < (unsigned) |
|
||||
| 38 | JGTU | > (unsigned) |
|
||||
| 34 | JEQ | = |
|
||||
| 35 | JNE | ≠ |
|
||||
| 36 | JLT | < (signed) |
|
||||
| 37 | JGT | > (signed) |
|
||||
| 38 | JLTU | < (unsigned) |
|
||||
| 39 | JGTU | > (unsigned) |
|
||||
|
||||
### Environment call
|
||||
- Type N
|
||||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:-----:|:-------------------------------------:|
|
||||
| 39 | ECALL | Cause an trap to the host environment |
|
||||
| 40 | ECALL | Cause an trap to the host environment |
|
||||
|
||||
## Floating point operations
|
||||
- Type BBB
|
||||
|
|
@ -198,29 +200,29 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:--------------:|
|
||||
| 40 | ADDF | Addition |
|
||||
| 41 | SUBF | Subtraction |
|
||||
| 42 | MULF | Multiplication |
|
||||
| 41 | ADDF | Addition |
|
||||
| 42 | SUBF | Subtraction |
|
||||
| 43 | MULF | Multiplication |
|
||||
|
||||
### Division-remainder
|
||||
- Type BBBB
|
||||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:-------------------------:|
|
||||
| 43 | DIRF | Same as for integer `DIR` |
|
||||
| 44 | DIRF | Same as for integer `DIR` |
|
||||
|
||||
### Fused Multiply-Add
|
||||
- Type BBBB
|
||||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:---------------------:|
|
||||
| 44 | FMAF | `#0 ← (#1 * #2) + #3` |
|
||||
| 45 | FMAF | `#0 ← (#1 * #2) + #3` |
|
||||
|
||||
### Negation
|
||||
- Type BB
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:----------:|
|
||||
| 45 | NEGF | `#0 ← -#1` |
|
||||
| 46 | NEGF | `#0 ← -#1` |
|
||||
|
||||
### Conversion
|
||||
- Type BB
|
||||
|
|
@ -229,8 +231,8 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:----:|:------------:|
|
||||
| 46 | ITF | Int to Float |
|
||||
| 47 | FTI | Float to Int |
|
||||
| 47 | ITF | Int to Float |
|
||||
| 48 | FTI | Float to Int |
|
||||
|
||||
## Floating point immediate operations
|
||||
- Type BBD
|
||||
|
|
@ -238,8 +240,8 @@
|
|||
|
||||
| Opcode | Name | Action |
|
||||
|:------:|:-----:|:--------------:|
|
||||
| 48 | ADDFI | Addition |
|
||||
| 49 | MULFI | Multiplication |
|
||||
| 49 | ADDFI | Addition |
|
||||
| 50 | MULFI | Multiplication |
|
||||
|
||||
# Registers
|
||||
- There is 255 registers + one zero register (with index 0)
|
||||
|
|
|
|||
Loading…
Reference in a new issue