fixing very sneaky bug
This commit is contained in:
Jakub Doka
parent
e8f1d2af8c
commit
2e36f32ae0
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@ -593,6 +593,59 @@ main := fn(): uint {
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### Purely Testing Examples
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#### inlining_issues
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```hb
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main := fn(): void {
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@use("main.hb").put_filled_rect(.(&.(0), 100, 100), .(0, 0), .(0, 0), .(1))
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}
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// in module: memory.hb
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SetMsg := packed struct {a: u8, count: u32, size: u32, src: ^u8, dest: ^u8}
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set := fn($Expr: type, src: ^Expr, dest: ^Expr, count: uint): void {
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return @eca(8, 2, &SetMsg.(5, @intcast(count), @intcast(@sizeof(Expr)), @bitcast(src), @bitcast(dest)), @sizeof(SetMsg))
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}
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// in module: main.hb
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Color := struct {r: u8}
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Vec2 := fn($Ty: type): type return struct {x: Ty, y: Ty}
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memory := @use("memory.hb")
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Surface := struct {
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buf: ^Color,
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width: uint,
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height: uint,
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}
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indexptr := fn(surface: Surface, x: uint, y: uint): ^Color {
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return surface.buf + y * surface.width + x
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}
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put_filled_rect := fn(surface: Surface, pos: Vec2(uint), tr: Vec2(uint), color: Color): void {
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top_start_idx := @inline(indexptr, surface, pos.x, pos.y)
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bottom_start_idx := @inline(indexptr, surface, pos.x, pos.y + tr.y - 1)
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rows_to_fill := tr.y
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loop if rows_to_fill <= 1 break else {
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@inline(memory.set, Color, &color, top_start_idx, @bitcast(tr.x))
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@inline(memory.set, Color, &color, bottom_start_idx, @bitcast(tr.x))
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top_start_idx += surface.width
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bottom_start_idx -= surface.width
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rows_to_fill -= 2
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}
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if rows_to_fill == 1 {
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@inline(memory.set, Color, &color, top_start_idx, @bitcast(tr.x))
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}
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return
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}
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```
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#### only_break_loop
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```hb
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memory := @use("memory.hb")
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121
lang/src/son.rs
121
lang/src/son.rs
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@ -39,7 +39,7 @@ const GLOBAL_ACLASS: usize = 1;
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pub mod hbvm;
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type Nid = u16;
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type AClassId = u16;
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type AClassId = i16;
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type Lookup = crate::ctx_map::CtxMap<Nid>;
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@ -410,6 +410,7 @@ impl Nodes {
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}
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fn bind(&mut self, from: Nid, to: Nid) {
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debug_assert_ne!(to, 0);
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self[from].outputs.push(to);
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self[to].inputs.push(from);
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}
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@ -512,17 +513,16 @@ impl Nodes {
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if node.ty != ty::Id::VOID {
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writeln!(
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out,
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" node{i}[label=\"{i} {} {} {} {}\" color={color}]",
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" node{i}[label=\"{i} {} {} {}\" color={color}]",
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node.kind,
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ty::Display::new(tys, files, node.ty),
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node.aclass,
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node.mem,
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)?;
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} else {
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writeln!(
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out,
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" node{i}[label=\"{i} {} {} {}\" color={color}]",
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node.kind, node.aclass, node.mem,
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" node{i}[label=\"{i} {} {}\" color={color}]",
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node.kind, node.aclass,
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)?;
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}
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@ -763,7 +763,21 @@ impl Nodes {
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}
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pub fn aclass_index(&self, region: Nid) -> (usize, Nid) {
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(self[region].aclass as _, self[region].mem)
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if self[region].aclass >= 0 {
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(self[region].aclass as _, region)
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} else {
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(
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self[self[region].aclass.unsigned_abs() - 1].aclass as _,
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self[region].aclass.unsigned_abs() - 1,
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)
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}
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}
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fn pass_aclass(&mut self, from: Nid, to: Nid) {
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debug_assert!(self[from].aclass >= 0);
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if from != to {
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self[to].aclass = -(from as AClassId + 1);
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}
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}
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fn peephole(&mut self, target: Nid) -> Option<Nid> {
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@ -1335,7 +1349,7 @@ impl Nodes {
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write!(out, " {node:>2}-c{:>2}: ", self[node].ralloc_backref)?;
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}
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match self[node].kind {
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Kind::Assert { .. } | Kind::Start => unreachable!(),
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Kind::Assert { .. } | Kind::Start => unreachable!("{} {out}", self[node].kind),
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Kind::End => return Ok(()),
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Kind::If => write!(out, " if: "),
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Kind::Region | Kind::Loop => writeln!(out, " goto: {node}"),
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@ -1499,6 +1513,10 @@ impl Nodes {
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log::error!("is unreachable but still present {id} {:?}", node.kind);
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failed = true;
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}
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if node.outputs.contains(&id) && !matches!(node.kind, Kind::Loop | Kind::End) {
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log::error!("node depends on it self and its not a loop {id} {:?}", node);
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failed = true;
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}
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}
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if failed {
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@ -1522,8 +1540,8 @@ impl Nodes {
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let lvalue = lvar.value();
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let inps = [node, lvalue, VOID];
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lvar.set_value(self.new_node_nop(lvar.ty, Kind::Phi, inps), self);
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self[lvar.value()].aclass = self[lvalue].aclass;
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self[lvar.value()].mem = self[lvalue].mem;
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self.pass_aclass(self.aclass_index(lvalue).1, lvar.value());
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}
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var.set_value(lvar.value(), self);
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}
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@ -1728,7 +1746,6 @@ pub struct Node {
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lock_rc: LockRc,
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loop_depth: LoopDepth,
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aclass: AClassId,
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mem: Nid,
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antidep: Nid,
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}
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@ -2254,7 +2271,6 @@ impl<'a> Codegen<'a> {
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fn new_stack(&mut self, ty: ty::Id) -> Nid {
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let stck = self.ci.nodes.new_node_nop(ty, Kind::Stck, [VOID, MEM]);
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self.ci.nodes[stck].aclass = self.ci.scope.aclasses.len() as _;
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self.ci.nodes[stck].mem = stck;
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self.ci.scope.aclasses.push(AClass::new(&mut self.ci.nodes));
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stck
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}
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@ -2271,25 +2287,46 @@ impl<'a> Codegen<'a> {
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let (value_index, value_region) = self.ci.nodes.aclass_index(value);
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if value_index != 0 {
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// simply switch the class to the default one
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let aclass = &mut self.ci.scope.aclasses[value_index];
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self.ci.nodes.load_loop_aclass(value_index, aclass, &mut self.ci.loops);
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let last_store = aclass.last_store.get();
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let mut cursor = last_store;
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let mut first_store = cursor;
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while cursor != MEM {
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first_store = cursor;
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cursor = self.ci.nodes[cursor].inputs[3];
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}
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self.ci.nodes[value_region].aclass = 0;
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//// simply switch the class to the default one
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//let aclass = &mut self.ci.scope.aclasses[value_index];
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//self.ci.nodes.load_loop_aclass(value_index, aclass, &mut self.ci.loops);
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//let last_store = aclass.last_store.get();
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//let mut cursor = last_store;
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//let mut first_store = cursor;
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//while cursor != MEM {
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// first_store = cursor;
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// debug_assert_matches!(
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// self.ci.nodes[cursor].kind,
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// Kind::Stre,
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// "{:?}",
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// self.ci.nodes[cursor]
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// );
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// cursor = self.ci.nodes[cursor].inputs[3];
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//}
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//if last_store != MEM {
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// let base_class = self.ci.scope.aclasses[0].last_store.get();
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// if base_class != MEM {
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// self.ci.nodes.modify_input(first_store, 3, base_class);
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// }
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// self.ci.scope.aclasses[0].last_store.set(last_store, &mut self.ci.nodes);
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//}
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self.ci.nodes.load_loop_aclass(0, &mut self.ci.scope.aclasses[0], &mut self.ci.loops);
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self.ci.nodes.load_loop_aclass(
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value_index,
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&mut self.ci.scope.aclasses[value_index],
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&mut self.ci.loops,
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);
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let base_class = self.ci.scope.aclasses[0].last_store.get();
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let last_store = self.ci.scope.aclasses[value_index].last_store.get();
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if base_class != MEM && last_store != MEM {
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self.ci.nodes.bind(base_class, last_store);
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}
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if last_store != MEM {
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let base_class = self.ci.scope.aclasses[0].last_store.get();
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if base_class != MEM {
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self.ci.nodes.modify_input(first_store, 3, base_class);
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}
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self.ci.scope.aclasses[0].last_store.set(last_store, &mut self.ci.nodes);
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}
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self.ci.nodes[value_region].aclass = 0;
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}
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let (index, _) = self.ci.nodes.aclass_index(region);
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@ -2485,7 +2522,9 @@ impl<'a> Codegen<'a> {
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let mut inps = Vc::from([self.ci.ctrl.get(), value.id]);
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for (i, aclass) in self.ci.scope.aclasses.iter_mut().enumerate() {
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self.ci.nodes.load_loop_aclass(i, aclass, &mut self.ci.loops);
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inps.push(aclass.last_store.get());
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if aclass.last_store.get() != MEM {
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inps.push(aclass.last_store.get());
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}
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}
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self.ci.ctrl.set(
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@ -2729,12 +2768,11 @@ impl<'a> Codegen<'a> {
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let mut rhs = rhs?;
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self.strip_var(&mut rhs);
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self.unwrap_opt(right.pos(), &mut rhs);
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let (ty, aclass, mem) = self.binop_ty(pos, &mut lhs, &mut rhs, op);
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let (ty, aclass) = self.binop_ty(pos, &mut lhs, &mut rhs, op);
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let inps = [VOID, lhs.id, rhs.id];
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let bop =
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self.ci.nodes.new_node_lit(ty.bin_ret(op), Kind::BinOp { op }, inps);
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self.ci.nodes[bop.id].aclass = aclass as _;
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self.ci.nodes[bop.id].mem = mem;
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self.ci.nodes.pass_aclass(aclass, bop.id);
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Some(bop)
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}
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ty::Kind::Struct(s) if op.is_homogenous() => {
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@ -2784,12 +2822,11 @@ impl<'a> Codegen<'a> {
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let inps = [VOID, idx.id, size];
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let offset =
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self.ci.nodes.new_node(ty::Id::INT, Kind::BinOp { op: TokenKind::Mul }, inps);
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let (aclass, mem) = self.ci.nodes.aclass_index(bs.id);
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let aclass = self.ci.nodes.aclass_index(bs.id).1;
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let inps = [VOID, bs.id, offset];
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let ptr =
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self.ci.nodes.new_node(ty::Id::INT, Kind::BinOp { op: TokenKind::Add }, inps);
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self.ci.nodes[ptr].aclass = aclass as _;
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self.ci.nodes[ptr].mem = mem;
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self.ci.nodes.pass_aclass(aclass, ptr);
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Some(Value::ptr(ptr).ty(elem))
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}
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@ -3896,11 +3933,10 @@ impl<'a> Codegen<'a> {
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}
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let off = self.ci.nodes.new_const(ty::Id::INT, off);
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let (aclass, mem) = self.ci.nodes.aclass_index(val);
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let aclass = self.ci.nodes.aclass_index(val).1;
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let inps = [VOID, val, off];
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let seted = self.ci.nodes.new_node(ty::Id::INT, Kind::BinOp { op: TokenKind::Add }, inps);
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self.ci.nodes[seted].aclass = aclass as _;
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self.ci.nodes[seted].mem = mem;
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self.ci.nodes.pass_aclass(aclass, seted);
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seted
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}
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@ -4089,7 +4125,7 @@ impl<'a> Codegen<'a> {
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lhs: &mut Value,
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rhs: &mut Value,
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op: TokenKind,
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) -> (ty::Id, usize, Nid) {
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) -> (ty::Id, Nid) {
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if let Some(upcasted) = lhs.ty.try_upcast(rhs.ty) {
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let to_correct = if lhs.ty != upcasted {
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Some((lhs, rhs))
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@ -4111,20 +4147,16 @@ impl<'a> Codegen<'a> {
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self.ci.nodes.new_node(upcasted, Kind::BinOp { op: TokenKind::Mul }, [
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VOID, oper.id, cnst,
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]);
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return (
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upcasted,
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self.ci.nodes[other.id].aclass as _,
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self.ci.nodes[other.id].mem,
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);
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return (upcasted, self.ci.nodes.aclass_index(other.id).1);
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}
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}
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(upcasted, DEFAULT_ACLASS, VOID)
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(upcasted, VOID)
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} else {
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let ty = self.ty_display(lhs.ty);
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let expected = self.ty_display(rhs.ty);
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self.report(pos, fa!("'{ty} {op} {expected}' is not supported"));
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(ty::Id::NEVER, DEFAULT_ACLASS, VOID)
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(ty::Id::NEVER, VOID)
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}
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}
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@ -4448,6 +4480,7 @@ mod tests {
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fb_driver;
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// Purely Testing Examples;
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inlining_issues;
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null_check_test;
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only_break_loop;
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reading_idk;
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@ -395,6 +395,9 @@ impl ItemCtx {
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PLoc::WideReg(rg, size) => (rg, size),
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PLoc::Ref(..) | PLoc::Reg(..) => continue,
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};
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if size > 8 {
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allocs.next().unwrap();
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}
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self.emit(instrs::ld(rg, atr(arg), 0, size));
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}
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@ -946,7 +949,7 @@ impl<'a> Function<'a> {
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regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
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));
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}
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PLoc::WideReg(..) | PLoc::Reg(..) => {
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PLoc::WideReg(r, size) | PLoc::Reg(r, size) => {
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loop {
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match self.nodes[i].kind {
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Kind::Stre { .. } => i = self.nodes[i].inputs[2],
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@ -956,7 +959,16 @@ impl<'a> Function<'a> {
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debug_assert_ne!(i, 0);
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}
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debug_assert!(i != 0);
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ops.push(self.urg(i));
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ops.push(regalloc2::Operand::reg_fixed_use(
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self.rg(i),
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regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
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));
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if size > 8 {
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ops.push(regalloc2::Operand::reg_fixed_use(
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self.rg(i),
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regalloc2::PReg::new((r + 1) as _, regalloc2::RegClass::Int),
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));
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}
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}
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PLoc::Ref(r, _) => {
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loop {
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@ -1044,6 +1056,7 @@ impl<'a> Function<'a> {
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}
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Kind::Stre if node.inputs[1] == VOID => self.nodes.lock(nid),
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Kind::Stre => {
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debug_assert_ne!(self.tys.size_of(node.ty), 0);
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let mut region = node.inputs[2];
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if self.nodes[region].kind == (Kind::BinOp { op: TokenKind::Add })
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&& self.nodes.is_const(self.nodes[region].inputs[2])
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@ -1597,6 +1610,7 @@ pub fn test_run_vm(out: &[u8], output: &mut String) {
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unsafe { alloc::alloc::dealloc(ptr as *mut u8, layout) };
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}
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3 => vm.write_reg(1, 42),
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8 => {}
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unknown => unreachable!("unknown ecall: {unknown:?}"),
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},
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Ok(hbvm::VmRunOk::Timer) => {
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@ -8,12 +8,13 @@ main:
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LI64 r6, 6d
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LI64 r5, 5d
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LI64 r2, 1d
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LD r3, r4, 0a, 16h
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CP r3, r4
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LD r3, r3, 0a, 16h
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ECA
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LI64 r1, 0d
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ADDI64 r254, r254, 16d
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JALA r0, r31, 0a
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ev: Ecall
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code size: 152
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code size: 155
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ret: 0
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status: Ok(())
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@ -24,14 +24,14 @@ scalar_values:
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structs:
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ADDI64 r254, r254, -32d
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LI64 r1, 5d
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ST r1, r254, 0a, 8h
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ST r1, r254, 8a, 8h
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LD r5, r254, 0a, 8h
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ST r1, r254, 16a, 8h
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ST r1, r254, 24a, 8h
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LD r5, r254, 16a, 8h
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ADDI64 r7, r5, 15d
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ST r7, r254, 16a, 8h
|
||||
ST r7, r254, 0a, 8h
|
||||
LI64 r10, 20d
|
||||
ST r10, r254, 24a, 8h
|
||||
LD r1, r254, 16a, 8h
|
||||
ST r10, r254, 8a, 8h
|
||||
LD r1, r254, 0a, 8h
|
||||
SUB64 r1, r1, r10
|
||||
ADDI64 r254, r254, 32d
|
||||
JALA r0, r31, 0a
|
||||
|
|
|
|||
109
lang/tests/son_tests_inlining_issues.txt
Normal file
109
lang/tests/son_tests_inlining_issues.txt
Normal file
|
|
@ -0,0 +1,109 @@
|
|||
main:
|
||||
ADDI64 r254, r254, -66d
|
||||
ST r31, r254, 58a, 8h
|
||||
ADDI64 r3, r254, 33d
|
||||
ADDI64 r2, r254, 34d
|
||||
ADDI64 r6, r254, 1d
|
||||
LI64 r9, 0d
|
||||
ADDI64 r4, r254, 17d
|
||||
ST r3, r254, 34a, 8h
|
||||
LI64 r10, 100d
|
||||
ADDI64 r7, r254, 0d
|
||||
LI8 r5, 1b
|
||||
ST r9, r254, 1a, 8h
|
||||
ST r9, r254, 17a, 8h
|
||||
ST r10, r254, 42a, 8h
|
||||
LI8 r3, 0b
|
||||
ST r5, r254, 0a, 1h
|
||||
ST r9, r254, 9a, 8h
|
||||
ST r9, r254, 25a, 8h
|
||||
ST r10, r254, 50a, 8h
|
||||
ST r3, r254, 33a, 1h
|
||||
CP r3, r4
|
||||
CP r5, r6
|
||||
LD r3, r3, 0a, 16h
|
||||
LD r5, r5, 0a, 16h
|
||||
LD r7, r7, 0a, 1h
|
||||
JAL r31, r0, :put_filled_rect
|
||||
LD r31, r254, 58a, 8h
|
||||
ADDI64 r254, r254, 66d
|
||||
JALA r0, r31, 0a
|
||||
put_filled_rect:
|
||||
ADDI64 r254, r254, -212d
|
||||
ST r32, r254, 108a, 104h
|
||||
ST r3, r254, 92a, 16h
|
||||
ADDI64 r3, r254, 92d
|
||||
ST r5, r254, 76a, 16h
|
||||
ADDI64 r5, r254, 76d
|
||||
ST r7, r254, 75a, 1h
|
||||
ADDI64 r7, r254, 75d
|
||||
LI64 r8, 25d
|
||||
LI64 r32, 2d
|
||||
LI64 r6, 8d
|
||||
ADDI64 r33, r254, 25d
|
||||
ADDI64 r34, r254, 50d
|
||||
LI8 r35, 5b
|
||||
ST r35, r254, 25a, 1h
|
||||
LD r36, r5, 0a, 8h
|
||||
ST r36, r254, 26a, 4h
|
||||
LI64 r37, 1d
|
||||
ST r37, r254, 30a, 4h
|
||||
ST r7, r254, 34a, 8h
|
||||
ST r35, r254, 50a, 1h
|
||||
ST r36, r254, 51a, 4h
|
||||
ST r37, r254, 55a, 4h
|
||||
ST r7, r254, 59a, 8h
|
||||
CP r38, r7
|
||||
LD r7, r3, 8a, 8h
|
||||
LD r39, r5, 8a, 8h
|
||||
ADD64 r11, r39, r7
|
||||
SUB64 r4, r11, r37
|
||||
LD r40, r2, 8a, 8h
|
||||
MUL64 r5, r40, r4
|
||||
LD r9, r2, 0a, 8h
|
||||
ADD64 r10, r9, r5
|
||||
LD r2, r3, 0a, 8h
|
||||
ADD64 r41, r2, r10
|
||||
MUL64 r3, r40, r7
|
||||
ADD64 r4, r9, r3
|
||||
ADD64 r42, r2, r4
|
||||
3: JGTU r39, r37, :0
|
||||
JNE r39, r37, :1
|
||||
ADDI64 r4, r254, 0d
|
||||
ST r35, r254, 0a, 1h
|
||||
ST r36, r254, 1a, 4h
|
||||
ST r37, r254, 5a, 4h
|
||||
ST r38, r254, 9a, 8h
|
||||
ST r42, r254, 17a, 8h
|
||||
CP r2, r6
|
||||
CP r3, r32
|
||||
CP r5, r8
|
||||
ECA
|
||||
JMP :1
|
||||
1: JMP :2
|
||||
0: CP r3, r32
|
||||
CP r43, r6
|
||||
CP r44, r8
|
||||
ST r42, r254, 67a, 8h
|
||||
CP r2, r43
|
||||
CP r4, r34
|
||||
CP r5, r44
|
||||
ECA
|
||||
ST r41, r254, 42a, 8h
|
||||
CP r2, r43
|
||||
CP r3, r32
|
||||
CP r4, r33
|
||||
CP r5, r44
|
||||
ECA
|
||||
ADD64 r42, r40, r42
|
||||
SUB64 r41, r41, r40
|
||||
SUB64 r39, r39, r32
|
||||
CP r6, r43
|
||||
CP r8, r44
|
||||
JMP :3
|
||||
2: LD r32, r254, 108a, 104h
|
||||
ADDI64 r254, r254, 212d
|
||||
JALA r0, r31, 0a
|
||||
code size: 917
|
||||
ret: 0
|
||||
status: Ok(())
|
||||
|
|
@ -20,12 +20,12 @@ main:
|
|||
LI8 r35, 1b
|
||||
ANDI r1, r1, 255d
|
||||
JNE r1, r0, :4
|
||||
ST r35, r254, 56a, 1h
|
||||
ST r35, r254, 40a, 1h
|
||||
LD r9, r33, 0a, 8h
|
||||
ST r9, r254, 64a, 8h
|
||||
ST r9, r254, 48a, 8h
|
||||
JMP :5
|
||||
4: ST r34, r254, 56a, 1h
|
||||
5: LD r6, r254, 56a, 1h
|
||||
4: ST r34, r254, 40a, 1h
|
||||
5: LD r6, r254, 40a, 1h
|
||||
ANDI r6, r6, 255d
|
||||
ANDI r34, r34, 255d
|
||||
JEQ r6, r34, :6
|
||||
|
|
@ -48,34 +48,34 @@ main:
|
|||
LI64 r37, 1d
|
||||
ANDI r1, r1, 255d
|
||||
JNE r1, r0, :10
|
||||
ST r3, r254, 16a, 8h
|
||||
ST r3, r254, 0a, 8h
|
||||
JMP :11
|
||||
10: ST r32, r254, 16a, 8h
|
||||
ST r37, r254, 24a, 8h
|
||||
10: ST r32, r254, 0a, 8h
|
||||
ST r37, r254, 8a, 8h
|
||||
ST r37, r254, 72a, 8h
|
||||
11: LD r2, r254, 16a, 8h
|
||||
11: LD r2, r254, 0a, 8h
|
||||
JNE r2, r3, :12
|
||||
LI64 r1, 34d
|
||||
JMP :3
|
||||
12: JAL r31, r0, :decide
|
||||
ADDI64 r10, r254, 32d
|
||||
ADDI64 r10, r254, 16d
|
||||
ANDI r1, r1, 255d
|
||||
JNE r1, r0, :13
|
||||
ADDI64 r11, r254, 0d
|
||||
ST r32, r254, 0a, 8h
|
||||
ST r37, r254, 8a, 8h
|
||||
ST r35, r254, 32a, 1h
|
||||
ADDI64 r11, r254, 56d
|
||||
ST r32, r254, 56a, 8h
|
||||
ST r37, r254, 64a, 8h
|
||||
ST r35, r254, 16a, 1h
|
||||
ADDI64 r12, r10, 8d
|
||||
BMC r11, r12, 16h
|
||||
JMP :14
|
||||
13: ST r34, r254, 32a, 1h
|
||||
14: LD r11, r254, 32a, 1h
|
||||
13: ST r34, r254, 16a, 1h
|
||||
14: LD r11, r254, 16a, 1h
|
||||
ANDI r11, r11, 255d
|
||||
ANDI r34, r34, 255d
|
||||
JEQ r11, r34, :15
|
||||
LI64 r1, 420d
|
||||
JMP :3
|
||||
15: LD r5, r254, 16a, 8h
|
||||
15: LD r5, r254, 0a, 8h
|
||||
LD r7, r5, 0a, 8h
|
||||
ANDI r9, r36, 65535d
|
||||
SUB64 r1, r9, r7
|
||||
|
|
|
|||
|
|
@ -1,13 +1,14 @@
|
|||
main:
|
||||
ADDI64 r254, r254, -56d
|
||||
ST r31, r254, 32a, 24h
|
||||
LI64 r3, 4d
|
||||
ADDI64 r2, r254, 16d
|
||||
ST r3, r254, 16a, 8h
|
||||
LI64 r2, 4d
|
||||
ADDI64 r4, r254, 16d
|
||||
ST r2, r254, 16a, 8h
|
||||
LI64 r32, 3d
|
||||
ST r32, r254, 24a, 8h
|
||||
ADDI64 r33, r254, 0d
|
||||
LD r3, r2, 0a, 16h
|
||||
CP r3, r4
|
||||
LD r3, r3, 0a, 16h
|
||||
JAL r31, r0, :odher_pass
|
||||
ST r1, r254, 0a, 16h
|
||||
LD r2, r254, 8a, 8h
|
||||
|
|
@ -29,6 +30,6 @@ odher_pass:
|
|||
pass:
|
||||
LD r1, r2, 0a, 8h
|
||||
JALA r0, r31, 0a
|
||||
code size: 305
|
||||
code size: 308
|
||||
ret: 4
|
||||
status: Ok(())
|
||||
|
|
|
|||
Loading…
Reference in a new issue