Address type, changed behaviour on address overflow
This commit is contained in:
parent
30070818ae
commit
3034469e89
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@ -3,11 +3,14 @@
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use {
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hbbytecode::valider::validate,
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hbvm::{
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mem::softpaging::{
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paging::{PageTable, Permission},
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HandlePageFault, PageSize, SoftPagedMem,
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mem::{
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softpaging::{
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paging::{PageTable, Permission},
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HandlePageFault, PageSize, SoftPagedMem,
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},
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Address, MemoryAccessReason,
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},
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MemoryAccessReason, Vm,
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Vm,
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},
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libfuzzer_sys::fuzz_target,
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};
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@ -22,7 +25,7 @@ fuzz_target!(|data: &[u8]| {
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root_pt: Box::into_raw(Default::default()),
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icache: Default::default(),
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},
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0,
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Address::new(4),
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)
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};
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@ -32,8 +35,6 @@ fuzz_target!(|data: &[u8]| {
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alloc_and_map(&mut vm.memory, 4096),
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];
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unsafe { vm.memory.write() };
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// Run VM
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let _ = vm.run();
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@ -50,14 +51,14 @@ fn alloc_and_map(memory: &mut SoftPagedMem<TestTrapHandler>, at: u64) -> *mut u8
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let ptr = Box::into_raw(Box::<Page>::default()).cast();
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unsafe {
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memory
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.map(ptr, at, Permission::Write, PageSize::Size4K)
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.map(ptr, Address::new(at), Permission::Write, PageSize::Size4K)
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.unwrap()
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};
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ptr
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}
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fn unmap_and_dealloc(memory: &mut SoftPagedMem<TestTrapHandler>, ptr: *mut u8, from: u64) {
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memory.unmap(from).unwrap();
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memory.unmap(Address::new(from)).unwrap();
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let _ = unsafe { Box::from_raw(ptr.cast::<Page>()) };
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}
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@ -75,7 +76,7 @@ impl HandlePageFault for TestTrapHandler {
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&mut self,
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_: MemoryAccessReason,
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_: &mut PageTable,
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_: u64,
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_: Address,
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_: PageSize,
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_: *mut u8,
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) -> bool {
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@ -1,7 +1,8 @@
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//! Block memory copier state machine
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use {
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super::{Memory, mem::MemoryAccessReason, VmRunError},
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super::{mem::MemoryAccessReason, Memory, VmRunError},
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crate::mem::Address,
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core::{mem::MaybeUninit, task::Poll},
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};
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@ -15,9 +16,9 @@ struct AlignedBuf([MaybeUninit<u8>; BUF_SIZE]);
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/// State for block memory copy
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pub struct BlockCopier {
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/// Source address
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src: u64,
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src: Address,
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/// Destination address
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dst: u64,
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dst: Address,
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/// How many buffer sizes to copy?
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n_buffers: usize,
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/// …and what remainds after?
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@ -27,7 +28,7 @@ pub struct BlockCopier {
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impl BlockCopier {
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/// Construct a new one
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#[inline]
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pub fn new(src: u64, dst: u64, count: usize) -> Self {
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pub fn new(src: Address, dst: Address, count: usize) -> Self {
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Self {
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src,
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dst,
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@ -57,17 +58,8 @@ impl BlockCopier {
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}
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// Bump source and destination address
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//
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// If we are over the address space, bail.
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match self.src.checked_add(BUF_SIZE as u64) {
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Some(n) => self.src = n,
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None => return Poll::Ready(Err(BlkCopyError::OutOfBounds)),
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};
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match self.dst.checked_add(BUF_SIZE as u64) {
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Some(n) => self.dst = n,
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None => return Poll::Ready(Err(BlkCopyError::OutOfBounds)),
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};
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self.src += BUF_SIZE;
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self.dst += BUF_SIZE;
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self.n_buffers -= 1;
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@ -100,15 +92,15 @@ impl BlockCopier {
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#[inline]
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unsafe fn act(
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memory: &mut impl Memory,
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src: u64,
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dst: u64,
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src: Address,
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dst: Address,
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buf: *mut u8,
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count: usize,
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) -> Result<(), BlkCopyError> {
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// Load to buffer
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memory
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.load(src, buf, count)
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.map_err(|super::mem::LoadError(addr)| BlkCopyError::Access {
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.map_err(|super::mem::LoadError(addr)| BlkCopyError {
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access_reason: MemoryAccessReason::Load,
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addr,
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})?;
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@ -116,7 +108,7 @@ unsafe fn act(
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// Store from buffer
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memory
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.store(dst, buf, count)
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.map_err(|super::mem::StoreError(addr)| BlkCopyError::Access {
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.map_err(|super::mem::StoreError(addr)| BlkCopyError {
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access_reason: MemoryAccessReason::Store,
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addr,
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})?;
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@ -126,30 +118,18 @@ unsafe fn act(
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/// Error occured when copying a block of memory
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum BlkCopyError {
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/// Memory access error
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Access {
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/// Kind of access
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access_reason: MemoryAccessReason,
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/// VM Address
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addr: u64,
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},
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/// Address out of bounds
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OutOfBounds,
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pub struct BlkCopyError {
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/// Kind of access
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access_reason: MemoryAccessReason,
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/// VM Address
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addr: Address,
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}
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impl From<BlkCopyError> for VmRunError {
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fn from(value: BlkCopyError) -> Self {
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match value {
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BlkCopyError::Access {
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access_reason: MemoryAccessReason::Load,
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addr,
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} => Self::LoadAccessEx(addr),
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BlkCopyError::Access {
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access_reason: MemoryAccessReason::Store,
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addr,
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} => Self::StoreAccessEx(addr),
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BlkCopyError::OutOfBounds => Self::AddrOutOfBounds,
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match value.access_reason {
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MemoryAccessReason::Load => Self::LoadAccessEx(value.addr),
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MemoryAccessReason::Store => Self::StoreAccessEx(value.addr),
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}
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}
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}
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@ -12,9 +12,9 @@
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#![no_std]
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#![cfg_attr(feature = "nightly", feature(fn_align))]
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#![warn(missing_docs, clippy::missing_docs_in_private_items)]
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#![warn(missing_docs)]
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use mem::Memory;
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use mem::{Memory, Address};
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#[cfg(feature = "alloc")]
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extern crate alloc;
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@ -39,7 +39,7 @@ pub struct Vm<Mem, const TIMER_QUOTIENT: usize> {
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pub memory: Mem,
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/// Program counter
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pub pc: usize,
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pub pc: Address,
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/// Program timer
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timer: usize,
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@ -56,11 +56,11 @@ where
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///
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/// # Safety
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/// Program code has to be validated
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pub unsafe fn new(memory: Mem, entry: u64) -> Self {
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pub unsafe fn new(memory: Mem, entry: Address) -> Self {
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Self {
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registers: [Value::from(0_u64); 256],
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memory,
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pc: entry as _,
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pc: entry,
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timer: 0,
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copier: None,
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}
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@ -75,13 +75,13 @@ pub enum VmRunError {
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InvalidOpcode(u8),
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/// Unhandled load access exception
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LoadAccessEx(u64),
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LoadAccessEx(Address),
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/// Unhandled instruction load access exception
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ProgramFetchLoadEx(u64),
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ProgramFetchLoadEx(Address),
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/// Unhandled store access exception
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StoreAccessEx(u64),
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StoreAccessEx(Address),
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/// Register out-of-bounds access
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RegOutOfBounds,
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@ -1,3 +1,5 @@
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use hbvm::mem::Address;
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use {
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hbbytecode::valider::validate,
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hbvm::{
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@ -26,7 +28,7 @@ fn main() -> Result<(), Box<dyn std::error::Error>> {
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root_pt: Box::into_raw(Default::default()),
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icache: Default::default(),
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},
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4,
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Address::new(4),
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);
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let data = {
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let ptr = std::alloc::alloc_zeroed(std::alloc::Layout::from_size_align_unchecked(
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@ -41,7 +43,7 @@ fn main() -> Result<(), Box<dyn std::error::Error>> {
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vm.memory
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.map(
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data,
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8192,
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Address::new(8192),
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hbvm::mem::softpaging::paging::Permission::Write,
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PageSize::Size4K,
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)
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@ -54,7 +56,7 @@ fn main() -> Result<(), Box<dyn std::error::Error>> {
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data,
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std::alloc::Layout::from_size_align_unchecked(4096, 4096),
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);
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vm.memory.unmap(8192).unwrap();
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vm.memory.unmap(Address::new(8192)).unwrap();
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let _ = Box::from_raw(vm.memory.root_pt);
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}
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}
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@ -72,7 +74,7 @@ impl HandlePageFault for TestTrapHandler {
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&mut self,
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_: MemoryAccessReason,
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_: &mut PageTable,
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_: u64,
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_: Address,
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_: PageSize,
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_: *mut u8,
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) -> bool {
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108
hbvm/src/mem/addr.rs
Normal file
108
hbvm/src/mem/addr.rs
Normal file
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@ -0,0 +1,108 @@
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//! Virtual(?) memory address
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use {
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core::{fmt::Debug, ops},
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derive_more::Display,
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};
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/// Memory address
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#[derive(Clone, Copy, Display, PartialEq, Eq, PartialOrd, Ord)]
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#[display(fmt = "{_0:x}")]
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pub struct Address(u64);
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impl Address {
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/// A null address
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pub const NULL: Self = Self(0);
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/// Saturating integer addition. Computes self + rhs, saturating at the numeric bounds instead of overflowing.
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#[inline]
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pub fn saturating_add<T: AddressOp>(self, rhs: T) -> Self {
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Self(self.0.saturating_add(rhs.cast_u64()))
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}
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/// Saturating integer subtraction. Computes self - rhs, saturating at the numeric bounds instead of overflowing.
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#[inline]
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pub fn saturating_sub<T: AddressOp>(self, rhs: T) -> Self {
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Self(self.0.saturating_sub(rhs.cast_u64()))
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}
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/// Cast or if smaller, truncate to [`usize`]
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pub fn truncate_usize(self) -> usize {
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self.0 as _
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}
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/// Get inner value
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#[inline(always)]
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pub fn get(self) -> u64 {
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self.0
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}
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/// Construct new address
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#[inline(always)]
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pub fn new(val: u64) -> Self {
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Self(val)
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}
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/// Do something with inner value
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#[inline(always)]
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pub fn map(self, f: impl Fn(u64) -> u64) -> Self {
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Self(f(self.0))
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}
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}
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impl<T: AddressOp> ops::Add<T> for Address {
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type Output = Self;
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#[inline]
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fn add(self, rhs: T) -> Self::Output {
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Self(self.0.wrapping_add(rhs.cast_u64()))
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}
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}
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impl<T: AddressOp> ops::Sub<T> for Address {
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type Output = Self;
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#[inline]
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fn sub(self, rhs: T) -> Self::Output {
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Self(self.0.wrapping_sub(rhs.cast_u64()))
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}
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}
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impl<T: AddressOp> ops::AddAssign<T> for Address {
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fn add_assign(&mut self, rhs: T) {
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self.0 = self.0.wrapping_add(rhs.cast_u64())
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}
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}
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impl<T: AddressOp> ops::SubAssign<T> for Address {
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fn sub_assign(&mut self, rhs: T) {
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self.0 = self.0.wrapping_sub(rhs.cast_u64())
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}
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}
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impl From<Address> for u64 {
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#[inline(always)]
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fn from(value: Address) -> Self {
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value.0
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}
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}
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impl Debug for Address {
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fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
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write!(f, "[{:0x}]", self.0)
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}
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}
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/// Can perform address operations with
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pub trait AddressOp {
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/// Cast to u64, truncating or extending
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fn cast_u64(self) -> u64;
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}
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macro_rules! impl_address_ops(($($ty:ty),* $(,)?) => {
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$(impl AddressOp for $ty {
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#[inline(always)]
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fn cast_u64(self) -> u64 { self as _ }
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})*
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});
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impl_address_ops!(u8, u16, u32, u64, usize);
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@ -1,16 +1,24 @@
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//! Memory implementations
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use {derive_more::Display, hbbytecode::ProgramVal};
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pub mod softpaging;
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mod addr;
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pub use addr::Address;
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use {derive_more::Display, hbbytecode::ProgramVal};
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/// Load-store memory access
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pub trait Memory {
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/// Load data from memory on address
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///
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/// # Safety
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/// - Shall not overrun the buffer
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unsafe fn load(&mut self, addr: u64, target: *mut u8, count: usize) -> Result<(), LoadError>;
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unsafe fn load(
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&mut self,
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addr: Address,
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target: *mut u8,
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count: usize,
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) -> Result<(), LoadError>;
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/// Store data to memory on address
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///
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@ -18,7 +26,7 @@ pub trait Memory {
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/// - Shall not overrun the buffer
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unsafe fn store(
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&mut self,
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addr: u64,
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addr: Address,
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source: *const u8,
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count: usize,
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) -> Result<(), StoreError>;
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@ -27,24 +35,24 @@ pub trait Memory {
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///
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/// # Safety
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/// - Data read have to be valid
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unsafe fn prog_read<T: ProgramVal>(&mut self, addr: u64) -> Option<T>;
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unsafe fn prog_read<T: ProgramVal>(&mut self, addr: Address) -> Option<T>;
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/// Read from program memory to exectue
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///
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/// # Safety
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/// - You have to be really sure that these bytes are there, understand?
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unsafe fn prog_read_unchecked<T: ProgramVal>(&mut self, addr: u64) -> T;
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unsafe fn prog_read_unchecked<T: ProgramVal>(&mut self, addr: Address) -> T;
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}
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/// Unhandled load access trap
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#[derive(Clone, Copy, Display, Debug, PartialEq, Eq)]
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#[display(fmt = "Load access error at address {_0:#x}")]
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pub struct LoadError(pub u64);
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#[display(fmt = "Load access error at address {_0}")]
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pub struct LoadError(pub Address);
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/// Unhandled store access trap
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#[derive(Clone, Copy, Display, Debug, PartialEq, Eq)]
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#[display(fmt = "Store access error at address {_0:#x}")]
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pub struct StoreError(pub u64);
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#[display(fmt = "Store access error at address {_0}")]
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pub struct StoreError(pub Address);
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/// Reason to access memory
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#[derive(Clone, Copy, Display, Debug, PartialEq, Eq)]
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|
|
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@ -1,5 +1,7 @@
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//! Program instruction cache
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use crate::mem::Address;
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use {
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super::{lookup::AddrPageLookuper, paging::PageTable, PageSize},
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core::{
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|
|
@ -12,7 +14,7 @@ use {
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#[derive(Clone, Debug)]
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pub struct ICache {
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/// Current page address base
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base: u64,
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base: Address,
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/// Curent page pointer
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data: Option<NonNull<u8>>,
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/// Current page size
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|
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@ -24,7 +26,7 @@ pub struct ICache {
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impl Default for ICache {
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fn default() -> Self {
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Self {
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base: Default::default(),
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base: Address::NULL,
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data: Default::default(),
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size: PageSize::Size4K,
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mask: Default::default(),
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|
|
@ -37,22 +39,26 @@ impl ICache {
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///
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/// # Safety
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/// `T` should be valid to read from instruction memory
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pub(super) unsafe fn fetch<T>(&mut self, addr: u64, root_pt: *const PageTable) -> Option<T> {
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pub(super) unsafe fn fetch<T>(
|
||||
&mut self,
|
||||
addr: Address,
|
||||
root_pt: *const PageTable,
|
||||
) -> Option<T> {
|
||||
let mut ret = MaybeUninit::<T>::uninit();
|
||||
|
||||
let pbase = self
|
||||
.data
|
||||
.or_else(|| self.fetch_page(self.base.checked_add(self.size as _)?, root_pt))?;
|
||||
.or_else(|| self.fetch_page(self.base + self.size, root_pt))?;
|
||||
|
||||
// Get address base
|
||||
let base = addr & self.mask;
|
||||
let base = addr.map(|x| x & self.mask);
|
||||
|
||||
// Base not matching, fetch anew
|
||||
if base != self.base {
|
||||
self.fetch_page(base, root_pt)?;
|
||||
};
|
||||
|
||||
let offset = addr & !self.mask;
|
||||
let offset = addr.get() & !self.mask;
|
||||
let requ_size = size_of::<T>();
|
||||
|
||||
// Page overflow
|
||||
|
|
@ -66,7 +72,7 @@ impl ICache {
|
|||
|
||||
// Copy overflow
|
||||
if rem != 0 {
|
||||
let pbase = self.fetch_page(self.base.checked_add(self.size as _)?, root_pt)?;
|
||||
let pbase = self.fetch_page(self.base + self.size, root_pt)?;
|
||||
|
||||
// Unlikely, unsupported scenario
|
||||
if rem > self.size as _ {
|
||||
|
|
@ -84,7 +90,7 @@ impl ICache {
|
|||
}
|
||||
|
||||
/// Fetch a page
|
||||
unsafe fn fetch_page(&mut self, addr: u64, pt: *const PageTable) -> Option<NonNull<u8>> {
|
||||
unsafe fn fetch_page(&mut self, addr: Address, pt: *const PageTable) -> Option<NonNull<u8>> {
|
||||
let res = AddrPageLookuper::new(addr, 0, pt).next()?.ok()?;
|
||||
if !super::perm_check::executable(res.perm) {
|
||||
return None;
|
||||
|
|
@ -97,7 +103,7 @@ impl ICache {
|
|||
_ => return None,
|
||||
};
|
||||
self.data = Some(NonNull::new(res.ptr)?);
|
||||
self.base = addr & self.mask;
|
||||
self.base = addr.map(|x| x & self.mask);
|
||||
self.data
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,7 @@
|
|||
//! Address lookup
|
||||
|
||||
use crate::mem::addr::Address;
|
||||
|
||||
use super::{
|
||||
addr_extract_index,
|
||||
paging::{PageTable, Permission},
|
||||
|
|
@ -9,7 +11,7 @@ use super::{
|
|||
/// Good result from address split
|
||||
pub struct AddrPageLookupOk {
|
||||
/// Virtual address
|
||||
pub vaddr: u64,
|
||||
pub vaddr: Address,
|
||||
|
||||
/// Pointer to the start for perform operation
|
||||
pub ptr: *mut u8,
|
||||
|
|
@ -24,7 +26,7 @@ pub struct AddrPageLookupOk {
|
|||
/// Errornous address split result
|
||||
pub struct AddrPageLookupError {
|
||||
/// Address of failure
|
||||
pub addr: u64,
|
||||
pub addr: Address,
|
||||
|
||||
/// Requested page size
|
||||
pub size: PageSize,
|
||||
|
|
@ -33,7 +35,7 @@ pub struct AddrPageLookupError {
|
|||
/// Address splitter into pages
|
||||
pub struct AddrPageLookuper {
|
||||
/// Current address
|
||||
addr: u64,
|
||||
addr: Address,
|
||||
|
||||
/// Size left
|
||||
size: usize,
|
||||
|
|
@ -45,7 +47,7 @@ pub struct AddrPageLookuper {
|
|||
impl AddrPageLookuper {
|
||||
/// Create a new page lookuper
|
||||
#[inline]
|
||||
pub const fn new(addr: u64, size: usize, pagetable: *const PageTable) -> Self {
|
||||
pub const fn new(addr: Address, size: usize, pagetable: *const PageTable) -> Self {
|
||||
Self {
|
||||
addr,
|
||||
size,
|
||||
|
|
@ -55,7 +57,7 @@ impl AddrPageLookuper {
|
|||
|
||||
/// Bump address by size X
|
||||
pub fn bump(&mut self, page_size: PageSize) {
|
||||
self.addr += page_size as u64;
|
||||
self.addr += page_size;
|
||||
self.size = self.size.saturating_sub(page_size as _);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,7 @@
|
|||
//! Automatic memory mapping
|
||||
|
||||
use crate::mem::addr::Address;
|
||||
|
||||
use {
|
||||
super::{
|
||||
addr_extract_index,
|
||||
|
|
@ -10,7 +12,7 @@ use {
|
|||
derive_more::Display,
|
||||
};
|
||||
|
||||
impl<'p, A, const OUT_PROG_EXEC: bool> SoftPagedMem<'p, A, OUT_PROG_EXEC> {
|
||||
impl<'p, A, const OUT_PROG_EXEC: bool> SoftPagedMem<'p, A, OUT_PROG_EXEC> {
|
||||
/// Maps host's memory into VM's memory
|
||||
///
|
||||
/// # Safety
|
||||
|
|
@ -20,7 +22,7 @@ impl<'p, A, const OUT_PROG_EXEC: bool> SoftPagedMem<'p, A, OUT_PROG_EXEC> {
|
|||
pub unsafe fn map(
|
||||
&mut self,
|
||||
host: *mut u8,
|
||||
target: u64,
|
||||
target: Address,
|
||||
perm: Permission,
|
||||
pagesize: PageSize,
|
||||
) -> Result<(), MapError> {
|
||||
|
|
@ -82,7 +84,7 @@ impl<'p, A, const OUT_PROG_EXEC: bool> SoftPagedMem<'p, A, OUT_PROG_EXEC> {
|
|||
///
|
||||
/// If errors, it only means there is no entry to unmap and in most cases
|
||||
/// just should be ignored.
|
||||
pub fn unmap(&mut self, addr: u64) -> Result<(), NothingToUnmap> {
|
||||
pub fn unmap(&mut self, addr: Address) -> Result<(), NothingToUnmap> {
|
||||
let mut current_pt = self.root_pt;
|
||||
let mut page_tables = [core::ptr::null_mut(); 5];
|
||||
|
||||
|
|
|
|||
|
|
@ -1,9 +1,5 @@
|
|||
//! Platform independent, software paged memory implementation
|
||||
|
||||
use core::mem::size_of;
|
||||
|
||||
use self::icache::ICache;
|
||||
|
||||
pub mod icache;
|
||||
pub mod lookup;
|
||||
pub mod paging;
|
||||
|
|
@ -12,7 +8,9 @@ pub mod paging;
|
|||
pub mod mapping;
|
||||
|
||||
use {
|
||||
super::{LoadError, Memory, MemoryAccessReason, StoreError},
|
||||
super::{addr::Address, LoadError, Memory, MemoryAccessReason, StoreError},
|
||||
core::mem::size_of,
|
||||
icache::ICache,
|
||||
lookup::{AddrPageLookupError, AddrPageLookupOk, AddrPageLookuper},
|
||||
paging::{PageTable, Permission},
|
||||
};
|
||||
|
|
@ -41,7 +39,12 @@ impl<'p, PfH: HandlePageFault, const OUT_PROG_EXEC: bool> Memory
|
|||
///
|
||||
/// # Safety
|
||||
/// Applies same conditions as for [`core::ptr::copy_nonoverlapping`]
|
||||
unsafe fn load(&mut self, addr: u64, target: *mut u8, count: usize) -> Result<(), LoadError> {
|
||||
unsafe fn load(
|
||||
&mut self,
|
||||
addr: Address,
|
||||
target: *mut u8,
|
||||
count: usize,
|
||||
) -> Result<(), LoadError> {
|
||||
self.memory_access(
|
||||
MemoryAccessReason::Load,
|
||||
addr,
|
||||
|
|
@ -59,7 +62,7 @@ impl<'p, PfH: HandlePageFault, const OUT_PROG_EXEC: bool> Memory
|
|||
/// Applies same conditions as for [`core::ptr::copy_nonoverlapping`]
|
||||
unsafe fn store(
|
||||
&mut self,
|
||||
addr: u64,
|
||||
addr: Address,
|
||||
source: *const u8,
|
||||
count: usize,
|
||||
) -> Result<(), StoreError> {
|
||||
|
|
@ -75,27 +78,31 @@ impl<'p, PfH: HandlePageFault, const OUT_PROG_EXEC: bool> Memory
|
|||
}
|
||||
|
||||
#[inline(always)]
|
||||
unsafe fn prog_read<T>(&mut self, addr: u64) -> Option<T> {
|
||||
if OUT_PROG_EXEC && addr as usize > self.program.len() {
|
||||
unsafe fn prog_read<T>(&mut self, addr: Address) -> Option<T> {
|
||||
if OUT_PROG_EXEC && addr.truncate_usize() > self.program.len() {
|
||||
return self.icache.fetch::<T>(addr, self.root_pt);
|
||||
}
|
||||
|
||||
let addr = addr as usize;
|
||||
let addr = addr.truncate_usize();
|
||||
self.program
|
||||
.get(addr..addr + size_of::<T>())
|
||||
.map(|x| x.as_ptr().cast::<T>().read())
|
||||
}
|
||||
|
||||
#[inline(always)]
|
||||
unsafe fn prog_read_unchecked<T>(&mut self, addr: u64) -> T {
|
||||
if OUT_PROG_EXEC && addr as usize > self.program.len() {
|
||||
unsafe fn prog_read_unchecked<T>(&mut self, addr: Address) -> T {
|
||||
if OUT_PROG_EXEC && addr.truncate_usize() > self.program.len() {
|
||||
return self
|
||||
.icache
|
||||
.fetch::<T>(addr as _, self.root_pt)
|
||||
.fetch::<T>(addr, self.root_pt)
|
||||
.unwrap_or_else(|| core::mem::zeroed());
|
||||
}
|
||||
|
||||
self.program.as_ptr().add(addr as _).cast::<T>().read()
|
||||
self.program
|
||||
.as_ptr()
|
||||
.add(addr.truncate_usize())
|
||||
.cast::<T>()
|
||||
.read()
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -110,32 +117,32 @@ impl<'p, PfH: HandlePageFault, const OUT_PROG_EXEC: bool> SoftPagedMem<'p, PfH,
|
|||
fn memory_access(
|
||||
&mut self,
|
||||
reason: MemoryAccessReason,
|
||||
src: u64,
|
||||
src: Address,
|
||||
mut dst: *mut u8,
|
||||
len: usize,
|
||||
permission_check: fn(Permission) -> bool,
|
||||
action: fn(*mut u8, *mut u8, usize),
|
||||
) -> Result<(), u64> {
|
||||
) -> Result<(), Address> {
|
||||
// Memory load from program section
|
||||
let (src, len) = if src < self.program.len() as _ {
|
||||
let (src, len) = if src.truncate_usize() < self.program.len() as _ {
|
||||
// Allow only loads
|
||||
if reason != MemoryAccessReason::Load {
|
||||
return Err(src);
|
||||
}
|
||||
|
||||
// Determine how much data to copy from here
|
||||
let to_copy = len.clamp(0, self.program.len().saturating_sub(src as _));
|
||||
let to_copy = len.clamp(0, self.program.len().saturating_sub(src.truncate_usize()));
|
||||
|
||||
// Perform action
|
||||
action(
|
||||
unsafe { self.program.as_ptr().add(src as _).cast_mut() },
|
||||
unsafe { self.program.as_ptr().add(src.truncate_usize()).cast_mut() },
|
||||
dst,
|
||||
to_copy,
|
||||
);
|
||||
|
||||
// Return shifted from what we've already copied
|
||||
(
|
||||
src.saturating_add(to_copy as _),
|
||||
src.saturating_add(to_copy as u64),
|
||||
len.saturating_sub(to_copy),
|
||||
)
|
||||
} else {
|
||||
|
|
@ -196,8 +203,9 @@ impl<'p, PfH: HandlePageFault, const OUT_PROG_EXEC: bool> SoftPagedMem<'p, PfH,
|
|||
///
|
||||
/// The level shall not be larger than 4, otherwise
|
||||
/// the output of the function is unspecified (yes, it can also panic :)
|
||||
pub fn addr_extract_index(addr: u64, lvl: u8) -> usize {
|
||||
pub fn addr_extract_index(addr: Address, lvl: u8) -> usize {
|
||||
debug_assert!(lvl <= 4);
|
||||
let addr = addr.get();
|
||||
usize::try_from((addr >> (lvl * 8 + 12)) & ((1 << 8) - 1)).expect("?conradluget a better CPU")
|
||||
}
|
||||
|
||||
|
|
@ -226,6 +234,22 @@ impl PageSize {
|
|||
}
|
||||
}
|
||||
|
||||
impl core::ops::Add<PageSize> for Address {
|
||||
type Output = Self;
|
||||
|
||||
#[inline(always)]
|
||||
fn add(self, rhs: PageSize) -> Self::Output {
|
||||
self + (rhs as u64)
|
||||
}
|
||||
}
|
||||
|
||||
impl core::ops::AddAssign<PageSize> for Address {
|
||||
#[inline(always)]
|
||||
fn add_assign(&mut self, rhs: PageSize) {
|
||||
*self = Self::new(self.get().wrapping_add(rhs as u64));
|
||||
}
|
||||
}
|
||||
|
||||
/// Permisison checks
|
||||
pub mod perm_check {
|
||||
use super::paging::Permission;
|
||||
|
|
@ -263,7 +287,7 @@ pub trait HandlePageFault {
|
|||
&mut self,
|
||||
reason: MemoryAccessReason,
|
||||
pagetable: &mut PageTable,
|
||||
vaddr: u64,
|
||||
vaddr: Address,
|
||||
size: PageSize,
|
||||
dataptr: *mut u8,
|
||||
) -> bool
|
||||
|
|
|
|||
|
|
@ -2,6 +2,8 @@
|
|||
//!
|
||||
//! Have fun
|
||||
|
||||
use crate::mem::Address;
|
||||
|
||||
use {
|
||||
super::{
|
||||
bmc::BlockCopier,
|
||||
|
|
@ -202,8 +204,8 @@ where
|
|||
self.pc -= size_of::<ParamBBD>() + 1;
|
||||
|
||||
self.copier = Some(BlockCopier::new(
|
||||
self.read_reg(src).cast(),
|
||||
self.read_reg(dst).cast(),
|
||||
Address::new(self.read_reg(src).cast()),
|
||||
Address::new(self.read_reg(dst).cast()),
|
||||
count as _,
|
||||
));
|
||||
|
||||
|
|
@ -244,16 +246,16 @@ where
|
|||
// Jump and link. Save PC after this instruction to
|
||||
// specified register and jump to reg + offset.
|
||||
let ParamBBD(save, reg, offset) = self.decode();
|
||||
self.write_reg(save, self.pc as u64);
|
||||
self.write_reg(save, self.pc.get());
|
||||
self.pc =
|
||||
(self.read_reg(reg).cast::<u64>().saturating_add(offset)) as usize;
|
||||
Address::new(self.read_reg(reg).cast::<u64>().saturating_add(offset));
|
||||
}
|
||||
// Conditional jumps, jump only to immediates
|
||||
JEQ => self.cond_jmp::<u64>(Ordering::Equal),
|
||||
JNE => {
|
||||
let ParamBBD(a0, a1, jt) = self.decode();
|
||||
if self.read_reg(a0).cast::<u64>() != self.read_reg(a1).cast::<u64>() {
|
||||
self.pc = jt as usize;
|
||||
self.pc = Address::new(jt);
|
||||
}
|
||||
}
|
||||
JLT => self.cond_jmp::<u64>(Ordering::Less),
|
||||
|
|
@ -317,7 +319,7 @@ where
|
|||
/// Decode instruction operands
|
||||
#[inline(always)]
|
||||
unsafe fn decode<T: ProgramVal>(&mut self) -> T {
|
||||
let pc1 = self.pc + 1;
|
||||
let pc1 = self.pc + 1_u64;
|
||||
let data = self.memory.prog_read_unchecked::<T>(pc1 as _);
|
||||
self.pc += 1 + size_of::<T>();
|
||||
data
|
||||
|
|
@ -360,7 +362,7 @@ where
|
|||
.cmp(&self.read_reg(a1).cast::<T>())
|
||||
== expected
|
||||
{
|
||||
self.pc = ja as usize;
|
||||
self.pc = Address::new(ja);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -388,7 +390,7 @@ where
|
|||
offset: u64,
|
||||
size: u16,
|
||||
adder: u8,
|
||||
) -> Result<u64, VmRunError> {
|
||||
) -> Result<Address, VmRunError> {
|
||||
let reg = dst.checked_add(adder).ok_or(VmRunError::RegOutOfBounds)?;
|
||||
|
||||
if usize::from(reg) * 8 + usize::from(size) > 2048 {
|
||||
|
|
@ -399,6 +401,7 @@ where
|
|||
.checked_add(offset)
|
||||
.and_then(|x| x.checked_add(adder.into()))
|
||||
.ok_or(VmRunError::AddrOutOfBounds)
|
||||
.map(Address::new)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue