diff --git a/lang/src/son.rs b/lang/src/son.rs
index 48fb5b6..bfd6007 100644
--- a/lang/src/son.rs
+++ b/lang/src/son.rs
@@ -22,6 +22,7 @@ use {
         fmt::{self, Debug, Display, Write},
         format_args as fa, mem,
         ops::{self, Deref},
+        usize,
     },
     hashbrown::hash_map,
     hbbytecode::DisasmError,
@@ -1051,14 +1052,15 @@ impl Nodes {
                     && self[target].inputs.len() == 4
                     && self[value].kind != Kind::Load
                     && self[store].kind == Kind::Stre
-                    && self[store].lock_rc == 0
                     && self[store].inputs[2] == region
                 {
                     if self[store].inputs[1] == value {
                         return Some(store);
                     }
 
-                    return Some(self.modify_input(store, 1, value));
+                    let mut inps = self[target].inputs.clone();
+                    inps[3] = self[store].inputs[3];
+                    return Some(self.new_node_nop(self[target].ty, Kind::Stre, inps));
                 }
             }
             K::Load => {
@@ -3163,7 +3165,9 @@ impl<'a> Codegen<'a> {
                         self.ci.scope.aclasses.iter_mut().zip(scope.aclasses.iter_mut())
                     {
                         if self.ci.nodes[scope_class.last_store.get()].is_lazy_phi(node) {
-                            if loop_class.last_store.get() != scope_class.last_store.get() {
+                            if loop_class.last_store.get() != scope_class.last_store.get()
+                                && loop_class.last_store.get() != 0
+                            {
                                 scope_class.last_store.set(
                                     self.ci.nodes.modify_input(
                                         scope_class.last_store.get(),
@@ -3237,7 +3241,9 @@ impl<'a> Codegen<'a> {
                     .zip(bres.aclasses.iter_mut())
                 {
                     if self.ci.nodes[scope_class.last_store.get()].is_lazy_phi(node) {
-                        if loop_class.last_store.get() != scope_class.last_store.get() {
+                        if loop_class.last_store.get() != scope_class.last_store.get()
+                            && loop_class.last_store.get() != 0
+                        {
                             scope_class.last_store.set(
                                 self.ci.nodes.modify_input(
                                     scope_class.last_store.get(),
@@ -3300,11 +3306,6 @@ impl<'a> Codegen<'a> {
                     }
                 }
 
-                let mut orig_classes = vec![];
-                for (i, aclass) in self.ci.scope.aclasses.iter_mut().enumerate() {
-                    self.ci.nodes.load_loop_aclass(i, aclass, &mut self.ci.loops);
-                    orig_classes.push(aclass.dup(&mut self.ci.nodes));
-                }
                 let else_scope = self.ci.scope.dup(&mut self.ci.nodes);
 
                 self.ci.ctrl.set(
@@ -3324,8 +3325,6 @@ impl<'a> Codegen<'a> {
                     self.ci.ctrl.get()
                 };
 
-                orig_classes.into_iter().for_each(|c| c.remove(&mut self.ci.nodes));
-
                 if lcntrl == Nid::MAX && rcntrl == Nid::MAX {
                     then_scope.clear(&mut self.ci.nodes);
                     return None;
diff --git a/lang/tests/son_tests_struct_operators.txt b/lang/tests/son_tests_struct_operators.txt
index 10c4aa0..83f5a54 100644
--- a/lang/tests/son_tests_struct_operators.txt
+++ b/lang/tests/son_tests_struct_operators.txt
@@ -2,31 +2,31 @@ main:
     ADDI64 r254, r254, -152d
     LI8 r1, 0b
     LI8 r3, 1b
-    ST r1, r254, 132a, 1h
-    ST r3, r254, 128a, 1h
-    ST r1, r254, 133a, 1h
-    ST r3, r254, 129a, 1h
-    ST r1, r254, 134a, 1h
-    ST r3, r254, 130a, 1h
-    ST r1, r254, 135a, 1h
-    ST r3, r254, 131a, 1h
-    LD r1, r254, 132a, 1h
-    LD r4, r254, 128a, 1h
+    ST r1, r254, 116a, 1h
+    ST r3, r254, 112a, 1h
+    ST r1, r254, 117a, 1h
+    ST r3, r254, 113a, 1h
+    ST r1, r254, 118a, 1h
+    ST r3, r254, 114a, 1h
+    ST r1, r254, 119a, 1h
+    ST r3, r254, 115a, 1h
+    LD r1, r254, 116a, 1h
+    LD r4, r254, 112a, 1h
     ADD8 r5, r4, r1
-    LD r8, r254, 129a, 1h
-    LD r9, r254, 133a, 1h
-    ST r5, r254, 132a, 1h
+    LD r8, r254, 113a, 1h
+    LD r9, r254, 117a, 1h
+    ST r5, r254, 116a, 1h
     ADD8 r12, r9, r8
-    LD r4, r254, 130a, 1h
-    LD r5, r254, 134a, 1h
-    ST r12, r254, 133a, 1h
+    LD r4, r254, 114a, 1h
+    LD r5, r254, 118a, 1h
+    ST r12, r254, 117a, 1h
     ADD8 r7, r5, r4
-    ST r7, r254, 134a, 1h
-    ST r3, r254, 135a, 1h
-    LD r12, r254, 133a, 1h
-    LD r1, r254, 134a, 1h
+    ST r7, r254, 118a, 1h
+    ST r3, r254, 119a, 1h
+    LD r12, r254, 117a, 1h
+    LD r1, r254, 118a, 1h
     ADD8 r4, r1, r12
-    LD r5, r254, 132a, 1h
+    LD r5, r254, 116a, 1h
     ADD8 r7, r5, r4
     LI8 r9, 4b
     ADD8 r1, r7, r3
@@ -36,61 +36,61 @@ main:
     LI64 r1, 1008d
     JMP :1
  0: LI64 r6, 1d
-    ADDI64 r5, r254, 80d
-    ST r6, r254, 80a, 8h
+    ADDI64 r5, r254, 96d
+    ST r6, r254, 96a, 8h
     LI64 r9, 2d
-    ST r9, r254, 88a, 8h
+    ST r9, r254, 104a, 8h
     LI64 r2, 3d
-    ADDI64 r1, r254, 64d
-    ST r2, r254, 48a, 8h
+    ADDI64 r1, r254, 80d
+    ST r2, r254, 32a, 8h
     LI64 r6, 4d
     LI64 r2, 0d
     BMC r5, r1, 16h
-    ST r6, r254, 56a, 8h
-    ST r2, r254, 0a, 8h
-    LD r11, r254, 64a, 8h
-    LD r1, r254, 48a, 8h
-    ST r2, r254, 8a, 8h
+    ST r6, r254, 40a, 8h
+    ST r2, r254, 16a, 8h
+    LD r11, r254, 80a, 8h
+    LD r1, r254, 32a, 8h
+    ST r2, r254, 24a, 8h
     ADD64 r4, r1, r11
-    LD r7, r254, 72a, 8h
-    LD r2, r254, 0a, 8h
-    ST r4, r254, 96a, 8h
+    LD r7, r254, 88a, 8h
+    LD r2, r254, 16a, 8h
+    ST r4, r254, 120a, 8h
     ADD64 r12, r7, r6
     SUB64 r3, r2, r1
-    ADDI64 r8, r254, 16d
-    ST r12, r254, 104a, 8h
+    ADDI64 r8, r254, 48d
+    ST r12, r254, 128a, 8h
     SUB64 r2, r1, r11
-    ST r3, r254, 16a, 8h
+    ST r3, r254, 48a, 8h
     LI64 r9, -4d
-    ST r2, r254, 112a, 8h
+    ST r2, r254, 136a, 8h
     SUB64 r7, r6, r7
-    ST r9, r254, 24a, 8h
+    ST r9, r254, 56a, 8h
     ADDI64 r8, r8, 16d
-    ST r7, r254, 120a, 8h
+    ST r7, r254, 144a, 8h
     BMC r5, r8, 16h
-    LD r6, r254, 96a, 8h
-    LD r8, r254, 16a, 8h
+    LD r6, r254, 120a, 8h
+    LD r8, r254, 48a, 8h
     ADD64 r9, r8, r6
-    LD r11, r254, 24a, 8h
-    LD r1, r254, 104a, 8h
-    ST r9, r254, 16a, 8h
+    LD r11, r254, 56a, 8h
+    LD r1, r254, 128a, 8h
+    ST r9, r254, 48a, 8h
     ADD64 r4, r1, r11
-    LD r8, r254, 32a, 8h
-    LD r9, r254, 112a, 8h
-    ST r4, r254, 24a, 8h
+    LD r8, r254, 64a, 8h
+    LD r9, r254, 136a, 8h
+    ST r4, r254, 56a, 8h
     ADD64 r12, r9, r8
-    LD r2, r254, 40a, 8h
-    ST r12, r254, 32a, 8h
+    LD r2, r254, 72a, 8h
+    ST r12, r254, 64a, 8h
     ADD64 r12, r2, r7
-    ST r12, r254, 40a, 8h
-    LD r7, r254, 16a, 8h
-    LD r9, r254, 32a, 8h
+    ST r12, r254, 72a, 8h
+    LD r7, r254, 48a, 8h
+    LD r9, r254, 64a, 8h
     ADD64 r11, r9, r7
-    LD r1, r254, 24a, 8h
-    ST r11, r254, 136a, 8h
+    LD r1, r254, 56a, 8h
+    ST r11, r254, 0a, 8h
     ADD64 r6, r1, r12
-    ST r6, r254, 144a, 8h
-    LD r7, r254, 136a, 8h
+    ST r6, r254, 8a, 8h
+    LD r7, r254, 0a, 8h
     ADD64 r1, r7, r6
  1: ADDI64 r254, r254, 152d
     JALA r0, r31, 0a
diff --git a/lang/tests/son_tests_tests_ptr_to_ptr_copy.txt b/lang/tests/son_tests_tests_ptr_to_ptr_copy.txt
index e259c5e..08f8362 100644
--- a/lang/tests/son_tests_tests_ptr_to_ptr_copy.txt
+++ b/lang/tests/son_tests_tests_ptr_to_ptr_copy.txt
@@ -1,26 +1,26 @@
 main:
     ADDI64 r254, r254, -10240d
-    LI8 r6, 64b
-    LI64 r7, 1d
+    LI64 r6, 1d
+    LI8 r7, 64b
     LI64 r8, 1024d
     LI64 r9, 0d
     ADDI64 r5, r254, 0d
  4: JLTU r9, r8, :0
     LI64 r4, 10d
-    CP r6, r7
- 3: JLTU r6, r4, :1
+    CP r7, r6
+ 3: JLTU r7, r4, :1
     LD r10, r254, 2048a, 1h
     ANDI r1, r10, 255d
     JMP :2
- 1: ADD64 r12, r6, r7
-    MULI64 r1, r6, 1024d
-    ADD64 r6, r5, r1
-    BMC r5, r6, 1024h
-    CP r6, r12
+ 1: ADD64 r12, r7, r6
+    MULI64 r1, r7, 1024d
+    ADD64 r7, r5, r1
+    BMC r5, r7, 1024h
+    CP r7, r12
     JMP :3
- 0: ADD64 r1, r9, r7
+ 0: ADD64 r1, r9, r6
     ADD64 r10, r5, r9
-    ST r6, r10, 0a, 1h
+    ST r7, r10, 0a, 1h
     CP r9, r1
     JMP :4
  2: ADDI64 r254, r254, 10240d