Sus stuff
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@ -1,46 +1,46 @@
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// OPCODE, MNEMONIC, TYPE, DOC;
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0, UN, N, "Cause an unreachable code trap" ;
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1, TX, N, "Termiante execution" ;
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2, NOP, N, "Do nothing" ;
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3, ADD, RRR, "Addition" ;
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4, SUB, RRR, "Subtraction" ;
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5, MUL, RRR, "Multiplication" ;
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6, AND, RRR, "Bitand" ;
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7, OR, RRR, "Bitor" ;
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8, XOR, RRR, "Bitxor" ;
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9, SL, RRR, "Unsigned left bitshift" ;
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0, UN, N, "Cause an unreachable code trap" ;
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1, TX, N, "Termiante execution" ;
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2, NOP, N, "Do nothing" ;
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3, ADD, RRR, "Addition" ;
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4, SUB, RRR, "Subtraction" ;
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5, MUL, RRR, "Multiplication" ;
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6, AND, RRR, "Bitand" ;
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7, OR, RRR, "Bitor" ;
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8, XOR, RRR, "Bitxor" ;
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9, SL, RRR, "Unsigned left bitshift" ;
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10, SR, RRR, "Unsigned right bitshift" ;
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11, SRS, RRR, "Signed right bitshift" ;
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12, CMP, RRR, "Signed comparsion" ;
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13, CMPU, RRR, "Unsigned comparsion" ;
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14, DIR, RRRR, "Merged divide-remainder" ;
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15, NEG, RR, "Bit negation" ;
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15, NOT, RR, "Logical negation" ;
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16, ADDI, RRD, "Addition with immediate" ;
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17, MULI, RRD, "Multiplication with immediate" ;
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18, ANDI, RRD, "Bitand with immediate" ;
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19, ORI, RRD, "Bitor with immediate" ;
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20, XORI, RRD, "Bitxor with immediate" ;
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21, SLI, RRW, "Unsigned left bitshift with immedidate";
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22, SRI, RRW, "Unsigned right bitshift with immediate";
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23, SRSI, RRW, "Signed right bitshift with immediate" ;
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24, CMPI, RRD, "Signed compare with immediate" ;
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25, CMPUI, RRD, "Unsigned compare with immediate" ;
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17, ADDI, RRD, "Addition with immediate" ;
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18, MULI, RRD, "Multiplication with immediate" ;
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19, ANDI, RRD, "Bitand with immediate" ;
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20, ORI, RRD, "Bitor with immediate" ;
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21, XORI, RRD, "Bitxor with immediate" ;
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22, SLI, RRW, "Unsigned left bitshift with immedidate";
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23, SRI, RRW, "Unsigned right bitshift with immediate";
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24, SRSI, RRW, "Signed right bitshift with immediate" ;
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25, CMPI, RRD, "Signed compare with immediate" ;
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26, CMPUI, RRD, "Unsigned compare with immediate" ;
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26, CP, RR, "Copy register" ;
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27, SWA, RR, "Swap registers" ;
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28, LI, RD, "Load immediate" ;
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29, LRA, RRO, "Load relative address" ;
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30, LD, RRAH, "Load from absolute address" ;
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31, ST, RRAH, "Store to absolute address" ;
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32, LDR, RROH, "Load from relative address" ;
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33, STR, RROH, "Store to relative address" ;
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34, BMC, RRH, "Copy block of memory" ;
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35, BRC, RRB, "Copy register block" ;
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27, CP, RR, "Copy register" ;
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28, SWA, RR, "Swap registers" ;
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29, LI, RD, "Load immediate" ;
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30, LRA, RRO, "Load relative address" ;
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31, LD, RRAH, "Load from absolute address" ;
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32, ST, RRAH, "Store to absolute address" ;
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33, LDR, RROH, "Load from relative address" ;
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34, STR, RROH, "Store to relative address" ;
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35, BMC, RRH, "Copy block of memory" ;
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36, BRC, RRB, "Copy register block" ;
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36, JMP, A, "Absolute jump" ;
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37, JMPR, O, "Relative jump" ;
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37, JMP, O, "Relative jump" ;
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38, JAL, RRA, "Linking absolute jump" ;
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39, JALR, RRO, "Linking relative jump" ;
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40, JEQ, RRP, "Branch on equal" ;
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@ -49,21 +49,22 @@
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43, JGT, RRP, "Branch on greater-than (signed)" ;
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44, JLTU, RRP, "Branch on lesser-than (unsigned)" ;
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45, JGTU, RRP, "Branch on greater-than (unsigned)" ;
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46, ECALL, N, "Issue ecall trap" ;
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46, ECA, N, "Environment call trap" ;
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47, EBP, N, "Environment breakpoint" ;
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47, ADDF, RRR, "Floating addition" ;
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48, SUBF, RRR, "Floating subtraction" ;
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49, MULF, RRR, "Floating multiply" ;
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50, DIRF, RRRR, "Merged floating divide-remainder" ;
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51, FMAF, RRRR, "Fused floating multiply-add" ;
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52, NEGF, RR, "Floating sign negation" ;
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53, ITF, RR, "Int to float" ;
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54, FTI, RR, "Float to int" ;
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48, ADDF, RRR, "Floating addition" ;
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49, SUBF, RRR, "Floating subtraction" ;
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50, MULF, RRR, "Floating multiply" ;
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51, DIRF, RRRR, "Merged floating divide-remainder" ;
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52, FMAF, RRRR, "Fused floating multiply-add" ;
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53, NEGF, RR, "Floating sign negation" ;
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54, ITF, RR, "Int to float" ;
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55, FTI, RR, "Float to int" ;
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55, ADDFI, RRD, "Floating addition with immediate" ;
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56, MULFI, RRD, "Floating multiplication with immediate";
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56, ADDFI, RRD, "Floating addition with immediate" ;
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57, MULFI, RRD, "Floating multiplication with immediate";
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57, LRA16 , RRP, "Load relative immediate (16 bit)" ;
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58, LDR16 , RRPH, "Load from relative address (16 bit)" ;
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59, STR16 , RRPH, "Store to relative address (16 bit)" ;
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60, JMPR16, P, "Relative jump (16 bit)" ;
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58, LRA16 , RRP, "Load relative immediate (16 bit)" ;
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59, LDR16 , RRPH, "Load from relative address (16 bit)" ;
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60, STR16 , RRPH, "Store to relative address (16 bit)" ;
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61, JMPR16, P, "Relative jump (16 bit)" ;
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@ -105,4 +105,7 @@ pub enum VmRunOk {
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/// Environment call
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Ecall,
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/// Breakpoint
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Breakpoint,
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}
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@ -99,10 +99,15 @@ where
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+ 1,
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);
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}
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NEG => {
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// Bit negation
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let OpsRR(tg, a0) = self.decode();
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self.write_reg(tg, !self.read_reg(a0).cast::<u64>())
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}
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NOT => {
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// Logical negation
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let OpsRR(tg, a0) = self.decode();
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self.write_reg(tg, !self.read_reg(a0).cast::<u64>());
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self.write_reg(tg, u64::from(self.read_reg(a0).cast::<u64>() == 0));
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}
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DIR => {
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// Fused Division-Remainder
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@ -231,8 +236,7 @@ where
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usize::from(count),
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);
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}
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JMP => self.pc = Address::new(self.decode::<OpA>()),
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JMPR => self.pc = self.pc.wrapping_add(self.decode::<OpO>()),
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JMP => self.pc = self.pc.wrapping_add(self.decode::<OpO>()),
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JAL => {
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// Jump and link. Save PC after this instruction to
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// specified register and jump to reg + offset.
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@ -256,7 +260,7 @@ where
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JGT => self.cond_jmp::<u64>(Ordering::Greater),
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JLTU => self.cond_jmp::<i64>(Ordering::Less),
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JGTU => self.cond_jmp::<i64>(Ordering::Greater),
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ECALL => {
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ECA => {
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self.decode::<()>();
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// So we don't get timer interrupt after ECALL
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}
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return Ok(VmRunOk::Ecall);
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}
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EBP => {
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self.decode::<()>();
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return Ok(VmRunOk::Breakpoint);
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}
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ADDF => self.binary_op::<f64>(ops::Add::add),
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SUBF => self.binary_op::<f64>(ops::Sub::sub),
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MULF => self.binary_op::<f64>(ops::Mul::mul),
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26
spec.md
26
spec.md
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@ -195,16 +195,15 @@
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- Type D
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| Opcode | Name | Action |
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|:------:|:----:|:-------------------------------------------:|
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| 37 | JMP | Unconditional, non-linking jump |
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| 38 | JMPR | Jump at address relative to program counter |
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| 37 | JMPR | Jump at address relative to program counter |
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### Unconditional linking jump
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- Type BBD
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| Opcode | Name | Action |
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|:------:|:----:|:-------------------------------------------------------:|
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| 39 | JAL | Save PC past JAL to `#0` and jump at `#1 + imm #2` |
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| 40 | JALR | Save PC past JAL to `#0` and jump at `#1 + imm #2 + PC` |
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| 38 | JAL | Save PC past JAL to `#0` and jump at `#1 + imm #2` |
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| 39 | JALR | Save PC past JAL to `#0` and jump at `#1 + imm #2 + PC` |
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### Conditional jumps
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- Type BBH
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| Opcode | Name | Comparsion |
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|:------:|:----:|:------------:|
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| 41 | JEQ | = |
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| 42 | JNE | ≠ |
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| 43 | JLT | < (signed) |
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| 44 | JGT | > (signed) |
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| 45 | JLTU | < (unsigned) |
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| 46 | JGTU | > (unsigned) |
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| 40 | JEQ | = |
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| 41 | JNE | ≠ |
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| 42 | JLT | < (signed) |
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| 43 | JGT | > (signed) |
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| 44 | JLTU | < (unsigned) |
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| 45 | JGTU | > (unsigned) |
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### Environment call
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- Type N
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| Opcode | Name | Action |
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|:------:|:-----:|:-------------------------------------:|
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| 47 | ECALL | Cause an trap to the host environment |
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| Opcode | Name | Action |
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|:------:|:----:|:-------------------------------------:|
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| 46 | ECA | Cause an trap to the host environment |
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| 47 | EBP | Cause breakproint trap to environment |
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## Floating point operations
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- Type BBB
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