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Erin 2023-10-01 01:51:51 +02:00
parent 2f8612c6d2
commit 441356b6f2
4 changed files with 77 additions and 65 deletions
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97
hbbytecode/instructions.in
View file

@ -1,46 +1,46 @@
// OPCODE, MNEMONIC, TYPE, DOC; // OPCODE, MNEMONIC, TYPE, DOC;
0, UN, N, "Cause an unreachable code trap" ;
1, TX, N, "Termiante execution" ;
2, NOP, N, "Do nothing" ;
3, ADD, RRR, "Addition" ; 0, UN, N, "Cause an unreachable code trap" ;
4, SUB, RRR, "Subtraction" ; 1, TX, N, "Termiante execution" ;
5, MUL, RRR, "Multiplication" ; 2, NOP, N, "Do nothing" ;
6, AND, RRR, "Bitand" ;
7, OR, RRR, "Bitor" ; 3, ADD, RRR, "Addition" ;
8, XOR, RRR, "Bitxor" ; 4, SUB, RRR, "Subtraction" ;
9, SL, RRR, "Unsigned left bitshift" ; 5, MUL, RRR, "Multiplication" ;
6, AND, RRR, "Bitand" ;
7, OR, RRR, "Bitor" ;
8, XOR, RRR, "Bitxor" ;
9, SL, RRR, "Unsigned left bitshift" ;
10, SR, RRR, "Unsigned right bitshift" ; 10, SR, RRR, "Unsigned right bitshift" ;
11, SRS, RRR, "Signed right bitshift" ; 11, SRS, RRR, "Signed right bitshift" ;
12, CMP, RRR, "Signed comparsion" ; 12, CMP, RRR, "Signed comparsion" ;
13, CMPU, RRR, "Unsigned comparsion" ; 13, CMPU, RRR, "Unsigned comparsion" ;
14, DIR, RRRR, "Merged divide-remainder" ; 14, DIR, RRRR, "Merged divide-remainder" ;
15, NEG, RR, "Bit negation" ;
15, NOT, RR, "Logical negation" ; 15, NOT, RR, "Logical negation" ;
16, ADDI, RRD, "Addition with immediate" ; 17, ADDI, RRD, "Addition with immediate" ;
17, MULI, RRD, "Multiplication with immediate" ; 18, MULI, RRD, "Multiplication with immediate" ;
18, ANDI, RRD, "Bitand with immediate" ; 19, ANDI, RRD, "Bitand with immediate" ;
19, ORI, RRD, "Bitor with immediate" ; 20, ORI, RRD, "Bitor with immediate" ;
20, XORI, RRD, "Bitxor with immediate" ; 21, XORI, RRD, "Bitxor with immediate" ;
21, SLI, RRW, "Unsigned left bitshift with immedidate"; 22, SLI, RRW, "Unsigned left bitshift with immedidate";
22, SRI, RRW, "Unsigned right bitshift with immediate"; 23, SRI, RRW, "Unsigned right bitshift with immediate";
23, SRSI, RRW, "Signed right bitshift with immediate" ; 24, SRSI, RRW, "Signed right bitshift with immediate" ;
24, CMPI, RRD, "Signed compare with immediate" ; 25, CMPI, RRD, "Signed compare with immediate" ;
25, CMPUI, RRD, "Unsigned compare with immediate" ; 26, CMPUI, RRD, "Unsigned compare with immediate" ;
26, CP, RR, "Copy register" ; 27, CP, RR, "Copy register" ;
27, SWA, RR, "Swap registers" ; 28, SWA, RR, "Swap registers" ;
28, LI, RD, "Load immediate" ; 29, LI, RD, "Load immediate" ;
29, LRA, RRO, "Load relative address" ; 30, LRA, RRO, "Load relative address" ;
30, LD, RRAH, "Load from absolute address" ; 31, LD, RRAH, "Load from absolute address" ;
31, ST, RRAH, "Store to absolute address" ; 32, ST, RRAH, "Store to absolute address" ;
32, LDR, RROH, "Load from relative address" ; 33, LDR, RROH, "Load from relative address" ;
33, STR, RROH, "Store to relative address" ; 34, STR, RROH, "Store to relative address" ;
34, BMC, RRH, "Copy block of memory" ; 35, BMC, RRH, "Copy block of memory" ;
35, BRC, RRB, "Copy register block" ; 36, BRC, RRB, "Copy register block" ;
36, JMP, A, "Absolute jump" ; 37, JMP, O, "Relative jump" ;
37, JMPR, O, "Relative jump" ;
38, JAL, RRA, "Linking absolute jump" ; 38, JAL, RRA, "Linking absolute jump" ;
39, JALR, RRO, "Linking relative jump" ; 39, JALR, RRO, "Linking relative jump" ;
40, JEQ, RRP, "Branch on equal" ; 40, JEQ, RRP, "Branch on equal" ;
@ -49,21 +49,22 @@
43, JGT, RRP, "Branch on greater-than (signed)" ; 43, JGT, RRP, "Branch on greater-than (signed)" ;
44, JLTU, RRP, "Branch on lesser-than (unsigned)" ; 44, JLTU, RRP, "Branch on lesser-than (unsigned)" ;
45, JGTU, RRP, "Branch on greater-than (unsigned)" ; 45, JGTU, RRP, "Branch on greater-than (unsigned)" ;
46, ECALL, N, "Issue ecall trap" ; 46, ECA, N, "Environment call trap" ;
47, EBP, N, "Environment breakpoint" ;
47, ADDF, RRR, "Floating addition" ; 48, ADDF, RRR, "Floating addition" ;
48, SUBF, RRR, "Floating subtraction" ; 49, SUBF, RRR, "Floating subtraction" ;
49, MULF, RRR, "Floating multiply" ; 50, MULF, RRR, "Floating multiply" ;
50, DIRF, RRRR, "Merged floating divide-remainder" ; 51, DIRF, RRRR, "Merged floating divide-remainder" ;
51, FMAF, RRRR, "Fused floating multiply-add" ; 52, FMAF, RRRR, "Fused floating multiply-add" ;
52, NEGF, RR, "Floating sign negation" ; 53, NEGF, RR, "Floating sign negation" ;
53, ITF, RR, "Int to float" ; 54, ITF, RR, "Int to float" ;
54, FTI, RR, "Float to int" ; 55, FTI, RR, "Float to int" ;
55, ADDFI, RRD, "Floating addition with immediate" ; 56, ADDFI, RRD, "Floating addition with immediate" ;
56, MULFI, RRD, "Floating multiplication with immediate"; 57, MULFI, RRD, "Floating multiplication with immediate";
57, LRA16 , RRP, "Load relative immediate (16 bit)" ; 58, LRA16 , RRP, "Load relative immediate (16 bit)" ;
58, LDR16 , RRPH, "Load from relative address (16 bit)" ; 59, LDR16 , RRPH, "Load from relative address (16 bit)" ;
59, STR16 , RRPH, "Store to relative address (16 bit)" ; 60, STR16 , RRPH, "Store to relative address (16 bit)" ;
60, JMPR16, P, "Relative jump (16 bit)" ; 61, JMPR16, P, "Relative jump (16 bit)" ;

3
hbvm/src/lib.rs
View file

@ -105,4 +105,7 @@ pub enum VmRunOk {
/// Environment call /// Environment call
Ecall, Ecall,
/// Breakpoint
Breakpoint,
} }

16
hbvm/src/vmrun.rs
View file

@ -99,10 +99,15 @@ where
+ 1, + 1,
); );
} }
NEG => {
// Bit negation
let OpsRR(tg, a0) = self.decode();
self.write_reg(tg, !self.read_reg(a0).cast::<u64>())
}
NOT => { NOT => {
// Logical negation // Logical negation
let OpsRR(tg, a0) = self.decode(); let OpsRR(tg, a0) = self.decode();
self.write_reg(tg, !self.read_reg(a0).cast::<u64>()); self.write_reg(tg, u64::from(self.read_reg(a0).cast::<u64>() == 0));
} }
DIR => { DIR => {
// Fused Division-Remainder // Fused Division-Remainder
@ -231,8 +236,7 @@ where
usize::from(count), usize::from(count),
); );
} }
JMP => self.pc = Address::new(self.decode::<OpA>()), JMP => self.pc = self.pc.wrapping_add(self.decode::<OpO>()),
JMPR => self.pc = self.pc.wrapping_add(self.decode::<OpO>()),
JAL => { JAL => {
// Jump and link. Save PC after this instruction to // Jump and link. Save PC after this instruction to
// specified register and jump to reg + offset. // specified register and jump to reg + offset.
@ -256,7 +260,7 @@ where
JGT => self.cond_jmp::<u64>(Ordering::Greater), JGT => self.cond_jmp::<u64>(Ordering::Greater),
JLTU => self.cond_jmp::<i64>(Ordering::Less), JLTU => self.cond_jmp::<i64>(Ordering::Less),
JGTU => self.cond_jmp::<i64>(Ordering::Greater), JGTU => self.cond_jmp::<i64>(Ordering::Greater),
ECALL => { ECA => {
self.decode::<()>(); self.decode::<()>();
// So we don't get timer interrupt after ECALL // So we don't get timer interrupt after ECALL
@ -265,6 +269,10 @@ where
} }
return Ok(VmRunOk::Ecall); return Ok(VmRunOk::Ecall);
} }
EBP => {
self.decode::<()>();
return Ok(VmRunOk::Breakpoint);
}
ADDF => self.binary_op::<f64>(ops::Add::add), ADDF => self.binary_op::<f64>(ops::Add::add),
SUBF => self.binary_op::<f64>(ops::Sub::sub), SUBF => self.binary_op::<f64>(ops::Sub::sub),
MULF => self.binary_op::<f64>(ops::Mul::mul), MULF => self.binary_op::<f64>(ops::Mul::mul),

26
spec.md
View file

@ -195,16 +195,15 @@
- Type D - Type D
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:----:|:-------------------------------------------:| |:------:|:----:|:-------------------------------------------:|
| 37 | JMP | Unconditional, non-linking jump | | 37 | JMPR | Jump at address relative to program counter |
| 38 | JMPR | Jump at address relative to program counter |
### Unconditional linking jump ### Unconditional linking jump
- Type BBD - Type BBD
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:----:|:-------------------------------------------------------:| |:------:|:----:|:-------------------------------------------------------:|
| 39 | JAL | Save PC past JAL to `#0` and jump at `#1 + imm #2` | | 38 | JAL | Save PC past JAL to `#0` and jump at `#1 + imm #2` |
| 40 | JALR | Save PC past JAL to `#0` and jump at `#1 + imm #2 + PC` | | 39 | JALR | Save PC past JAL to `#0` and jump at `#1 + imm #2 + PC` |
### Conditional jumps ### Conditional jumps
- Type BBH - Type BBH
@ -212,19 +211,20 @@
| Opcode | Name | Comparsion | | Opcode | Name | Comparsion |
|:------:|:----:|:------------:| |:------:|:----:|:------------:|
| 41 | JEQ | = | | 40 | JEQ | = |
| 42 | JNE | ≠ | | 41 | JNE | ≠ |
| 43 | JLT | < (signed) | | 42 | JLT | < (signed) |
| 44 | JGT | > (signed) | | 43 | JGT | > (signed) |
| 45 | JLTU | < (unsigned) | | 44 | JLTU | < (unsigned) |
| 46 | JGTU | > (unsigned) | | 45 | JGTU | > (unsigned) |
### Environment call ### Environment call
- Type N - Type N
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:-----:|:-------------------------------------:| |:------:|:----:|:-------------------------------------:|
| 47 | ECALL | Cause an trap to the host environment | | 46 | ECA | Cause an trap to the host environment |
| 47 | EBP | Cause breakproint trap to environment |
## Floating point operations ## Floating point operations
- Type BBB - Type BBB