simplifing code patterns and sixing argument passing
This commit is contained in:
Jakub Doka
parent
ad4aed9c98
commit
73c9ccef6a
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@ -8,7 +8,7 @@ use {
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},
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reg,
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ty::{self, TyCheck},
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Comptime, Field, Func, Global, OffsetIter, ParamAlloc, Reloc, Sig, Struct, SymKey,
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Comptime, Field, Func, Global, OffsetIter, PLoc, ParamAlloc, Reloc, Sig, Struct, SymKey,
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TypeParser, TypedReloc, Types,
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},
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alloc::{string::String, vec::Vec},
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@ -1037,7 +1037,7 @@ impl Codegen {
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);
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};
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let mut parama = self.tys.parama(ty);
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let (_, mut parama) = self.tys.parama(ty);
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let base = self.pool.arg_locs.len();
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for arg in args {
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let arg = self.expr(arg)?;
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@ -1402,7 +1402,7 @@ impl Codegen {
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unreachable!();
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};
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let mut parama = self.tys.parama(sig.ret);
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let (_, mut parama) = self.tys.parama(sig.ret);
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let base = self.pool.arg_locs.len();
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let mut sig_args = sig.args.range();
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let mut should_momize = !args.is_empty() && sig.ret == ty::Id::from(ty::TYPE);
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@ -2135,7 +2135,7 @@ impl Codegen {
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self.ci.emit_prelude();
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let mut parama = self.tys.parama(sig.ret);
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let (ret, mut parama) = self.tys.parama(sig.ret);
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let mut sig_args = sig.args.range();
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for arg in args.iter() {
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let ty = self.tys.ins.args[sig_args.next().unwrap()];
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@ -2147,7 +2147,7 @@ impl Codegen {
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self.ci.vars.push(Variable { id: arg.id, value: Value { ty, loc } });
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}
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if self.tys.size_of(sig.ret) > 16 {
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if let PLoc::Ref(..) = ret {
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let reg = self.ci.regs.allocate();
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self.ci.emit(instrs::cp(reg.get(), 1));
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self.ci.ret_reg = reg;
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@ -2179,20 +2179,21 @@ impl Codegen {
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if size == 0 {
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return Loc::default();
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}
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let (src, dst) = match size {
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0 => (Loc::default(), Loc::default()),
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..=8 if flags & idfl::REFERENCED == 0 => {
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(Loc::reg(parama.next()), Loc::reg(self.ci.regs.allocate()))
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let (src, dst) = match parama.next(ty, &self.tys) {
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PLoc::None => (Loc::default(), Loc::default()),
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PLoc::Reg(r, _) if flags & idfl::REFERENCED == 0 => {
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(Loc::reg(r), Loc::reg(self.ci.regs.allocate()))
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}
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1..=8 => (Loc::reg(parama.next()), Loc::stack(self.ci.stack.allocate(size))),
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9..=16 => (Loc::reg(parama.next_wide()), Loc::stack(self.ci.stack.allocate(size))),
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_ if flags & (idfl::MUTABLE | idfl::REFERENCED) == 0 => {
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let ptr = parama.next();
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PLoc::Reg(r, _) => (Loc::reg(r), Loc::stack(self.ci.stack.allocate(size))),
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PLoc::WideReg(r, _) => (Loc::reg(r), Loc::stack(self.ci.stack.allocate(size))),
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PLoc::Ref(ptr, _) if flags & (idfl::MUTABLE | idfl::REFERENCED) == 0 => {
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let reg = self.ci.regs.allocate();
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self.ci.emit(instrs::cp(reg.get(), ptr));
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return Loc::reg(reg).into_derefed();
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}
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_ => (Loc::reg(parama.next()).into_derefed(), Loc::stack(self.ci.stack.allocate(size))),
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PLoc::Ref(ptr, _) => {
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(Loc::reg(ptr).into_derefed(), Loc::stack(self.ci.stack.allocate(size)))
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}
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};
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self.store_sized(src, &dst, size);
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@ -2265,23 +2266,16 @@ impl Codegen {
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}
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fn pass_arg(&mut self, value: &Value, parama: &mut ParamAlloc) {
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self.pass_arg_low(&value.loc, self.tys.size_of(value.ty), parama)
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match parama.next(value.ty, &self.tys) {
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PLoc::None => {}
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PLoc::Reg(r, _) | PLoc::WideReg(r, _) => {
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self.store_typed(&value.loc, Loc::reg(r), value.ty)
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}
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PLoc::Ref(ptr, _) => {
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let Loc::Rt { reg, stack, offset, .. } = &value.loc else { unreachable!() };
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self.stack_offset(ptr, reg.get(), stack.as_ref(), *offset as _);
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}
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fn pass_arg_low(&mut self, loc: &Loc, size: Size, parama: &mut ParamAlloc) {
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if size > 16 {
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let Loc::Rt { reg, stack, offset, .. } = loc else { unreachable!() };
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self.stack_offset(parama.next(), reg.get(), stack.as_ref(), *offset as _);
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return;
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}
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let dst = match size {
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0 => return,
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9..=16 => Loc::reg(parama.next_wide()),
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_ => Loc::reg(parama.next()),
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};
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self.store_sized(loc, dst, size);
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}
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fn store_typed(&mut self, src: impl Into<LocCow>, dst: impl Into<LocCow>, ty: ty::Id) {
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@ -21,7 +21,8 @@
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str_from_raw_parts,
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ptr_sub_ptr,
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slice_from_ptr_range,
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is_sorted
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is_sorted,
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iter_next_chunk
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)]
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#![feature(pointer_is_aligned_to)]
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#![warn(clippy::dbg_macro)]
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@ -247,7 +248,7 @@ mod ty {
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ident,
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lexer::TokenKind,
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parser::{self, Pos},
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Size,
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Size, Types,
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},
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core::{num::NonZeroU32, ops::Range},
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};
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@ -405,6 +406,21 @@ mod ty {
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Self::UINT
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}
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}
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pub fn loc(&self, tys: &Types) -> Loc {
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match self.expand() {
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Kind::Ptr(_) | Kind::Builtin(_) => Loc::Reg,
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Kind::Struct(_) if tys.size_of(*self) == 0 => Loc::Reg,
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Kind::Struct(_) | Kind::Slice(_) => Loc::Stack,
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Kind::Func(_) | Kind::Global(_) | Kind::Module(_) => unreachable!(),
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}
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}
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}
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#[derive(PartialEq, Eq, Clone, Copy)]
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pub enum Loc {
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Reg,
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Stack,
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}
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#[derive(PartialEq, Eq, Default, Debug, Clone, Copy)]
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@ -771,15 +787,23 @@ impl Array {
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}
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}
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enum PLoc {
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None,
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Reg(u8, u16),
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WideReg(u8, u16),
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Ref(u8, u32),
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}
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struct ParamAlloc(Range<u8>);
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impl ParamAlloc {
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pub fn next(&mut self) -> u8 {
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self.0.next().expect("too many paramteters")
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pub fn next(&mut self, ty: ty::Id, tys: &Types) -> PLoc {
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match tys.size_of(ty) {
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0 => PLoc::None,
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size @ 1..=8 => PLoc::Reg(self.0.next().unwrap(), size as _),
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size @ 9..=16 => PLoc::WideReg(self.0.next_chunk::<2>().unwrap()[0], size as _),
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size @ 17.. => PLoc::Ref(self.0.next().unwrap(), size),
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}
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fn next_wide(&mut self) -> u8 {
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(self.next(), self.next()).0
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}
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}
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@ -1202,8 +1226,13 @@ impl Types {
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instrs::disasm(&mut sluce, &functions, output, eca_handler)
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}
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fn parama(&self, ret: impl Into<ty::Id>) -> ParamAlloc {
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ParamAlloc(2 + (9..=16).contains(&self.size_of(ret.into())) as u8..12)
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fn parama(&self, ret: impl Into<ty::Id>) -> (PLoc, ParamAlloc) {
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let mut iter = ParamAlloc(1..12);
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let ret = iter.next(ret.into(), self);
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if let PLoc::None = ret {
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iter.0.start += 1;
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}
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(ret, iter)
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}
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fn make_ptr(&mut self, base: ty::Id) -> ty::Id {
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150
lang/src/son.rs
150
lang/src/son.rs
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@ -10,10 +10,10 @@ use {
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CtorField, Expr, ExprRef, FileId, Pos,
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},
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reg, task,
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ty::{self, ArrayLen, Tuple},
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ty::{self, ArrayLen, Loc, Tuple},
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vc::{BitSet, Vc},
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Comptime, Func, Global, HashMap, Offset, OffsetIter, Reloc, Sig, TypeParser, TypedReloc,
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Types,
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Comptime, Func, Global, HashMap, Offset, OffsetIter, PLoc, Reloc, Sig, TypeParser,
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TypedReloc, Types,
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},
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alloc::{string::String, vec::Vec},
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core::{
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@ -1093,20 +1093,16 @@ impl ItemCtx {
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*saved_regs.entry(hvenc).or_insert(would_insert)
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};
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let mut parama = tys.parama(sig.ret);
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let (retl, mut parama) = tys.parama(sig.ret);
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for (ti, &arg) in sig.args.range().zip(fuc.nodes[VOID].outputs.iter().skip(2)) {
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let ty = tys.ins.args[ti];
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if tys.size_of(ty) == 0 {
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continue;
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}
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if let size @ 9..=16 = tys.size_of(ty) {
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let rg = parama.next_wide();
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self.emit(instrs::st(rg, reg::STACK_PTR, fuc.nodes[arg].offset as _, size as _));
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let (rg, size) = match parama.next(ty, tys) {
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PLoc::WideReg(rg, size) => (rg, size),
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PLoc::Reg(rg, size) if ty.loc(tys) == Loc::Stack => (rg, size),
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PLoc::Reg(..) | PLoc::Ref(..) | PLoc::None => continue,
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};
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self.emit(instrs::st(rg, reg::STACK_PTR, fuc.nodes[arg].offset as _, size));
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self.emit(instrs::addi64(rg, reg::STACK_PTR, fuc.nodes[arg].offset as _));
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} else {
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parama.next();
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}
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}
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for (i, block) in fuc.blocks.iter().enumerate() {
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@ -1177,17 +1173,13 @@ impl ItemCtx {
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}
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}
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Kind::Return => {
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match tys.size_of(sig.ret) {
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0..=8 => {}
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size @ 9..=16 => {
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self.emit(instrs::ld(reg::RET, atr(allocs[0]), 0, size as _));
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match retl {
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PLoc::None | PLoc::Reg(..) => {}
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PLoc::WideReg(r, size) => {
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self.emit(instrs::ld(r, atr(allocs[0]), 0, size))
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}
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size @ 17.. => {
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self.emit(instrs::bmc(
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atr(allocs[0]),
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reg::RET,
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size.try_into().unwrap(),
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));
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PLoc::Ref(r, size) => {
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self.emit(instrs::bmc(atr(allocs[0]), r, size.try_into().unwrap()));
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}
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}
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@ -1243,14 +1235,29 @@ impl ItemCtx {
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}
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}
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Kind::Call { func } => {
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let (ret, mut parama) = tys.parama(node.ty);
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let mut allocs = allocs.iter();
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for ti in tys.ins.funcs[func as usize].sig.unwrap().args.range() {
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let ty = tys.ins.args[ti];
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let (rg, size) = match parama.next(ty, tys) {
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PLoc::Reg(rg, size) if ty.loc(tys) == Loc::Stack => (rg, size),
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PLoc::WideReg(rg, size) => (rg, size),
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PLoc::None | PLoc::Ref(..) | PLoc::Reg(..) => continue,
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};
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let &arg = allocs.next().unwrap();
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if size > 8 {
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allocs.next().unwrap();
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}
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self.emit(instrs::ld(rg, atr(arg), 0, size));
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}
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self.relocs.push(TypedReloc {
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target: ty::Kind::Func(func).compress(),
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reloc: Reloc::new(self.code.len(), 3, 4),
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});
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self.emit(instrs::jal(reg::RET_ADDR, reg::ZERO, 0));
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if let size @ 9..=16 = tys.size_of(node.ty) {
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if let PLoc::WideReg(r, size) = ret {
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let stck = fuc.nodes[*node.inputs.last().unwrap()].offset;
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self.emit(instrs::st(reg::RET, reg::STACK_PTR, stck as _, size as _));
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self.emit(instrs::st(r, reg::STACK_PTR, stck as _, size));
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}
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}
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Kind::Global { global } => {
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@ -1589,6 +1596,7 @@ impl TypeParser for Codegen<'_> {
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code: core::mem::take(&mut self.ci.code),
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..Default::default()
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};
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self.pool.pop_ci(&mut self.ci);
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self.complete_call_graph();
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@ -2043,12 +2051,8 @@ impl<'a> Codegen<'a> {
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let mut inps = Vc::from([self.ci.ctrl]);
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for ((arg, carg), tyx) in args.iter().zip(cargs).zip(sig.args.range()) {
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let ty = self.tys.ins.args[tyx];
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if self.tys.size_of(ty) == 0 {
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continue;
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}
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let mut value = self.expr_ctx(arg, Ctx::default().with_ty(ty))?;
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debug_assert_ne!(self.ci.nodes[value.id].kind, Kind::Stre);
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debug_assert_ne!(value.id, 0);
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self.assert_ty(arg.pos(), &mut value, ty, fa!("argument {}", carg.name));
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self.ci.nodes.lock(value.id);
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@ -2074,9 +2078,9 @@ impl<'a> Codegen<'a> {
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false
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});
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let alt_value = match self.tys.size_of(sig.ret) {
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0..=8 => None,
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9.. => {
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let alt_value = match sig.ret.loc(&self.tys) {
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Loc::Reg => None,
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Loc::Stack => {
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let stck = self.ci.nodes.new_node_nop(sig.ret, Kind::Stck, [VOID, MEM]);
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inps.push(stck);
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Some(Value::ptr(stck).ty(sig.ret))
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@ -2692,7 +2696,7 @@ impl<'a> Codegen<'a> {
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for arg in args.iter() {
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let ty = self.tys.ins.args[sig_args.next().unwrap()];
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let mut deps = Vc::from([VOID]);
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if matches!(self.tys.size_of(ty), 9..=16) {
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if ty.loc(&self.tys) == Loc::Stack {
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deps.push(MEM);
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}
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let value = self.ci.nodes.new_node_nop(ty, Kind::Arg, [VOID]);
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@ -2994,18 +2998,15 @@ impl<'a> Function<'a> {
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}
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}
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Kind::Return => {
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let ops = match self.tys.size_of(self.sig.ret) {
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0 => vec![],
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1..=8 => {
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let ops = match self.tys.parama(self.sig.ret).0 {
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PLoc::None => vec![],
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PLoc::Reg(r, ..) => {
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vec![regalloc2::Operand::reg_fixed_use(
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self.rg(node.inputs[1]),
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regalloc2::PReg::new(1, regalloc2::RegClass::Int),
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regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
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)]
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}
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9..=16 => {
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vec![self.urg(self.nodes[node.inputs[1]].inputs[1])]
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}
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17.. => {
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PLoc::WideReg(..) | PLoc::Ref(..) => {
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vec![self.urg(self.nodes[node.inputs[1]].inputs[1])]
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}
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};
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@ -3035,32 +3036,17 @@ impl<'a> Function<'a> {
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Kind::Entry => {
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self.nodes[nid].ralloc_backref = self.add_block(nid);
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let mut parama = self.tys.parama(self.sig.ret);
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let (_, mut parama) = self.tys.parama(self.sig.ret);
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for (ti, arg) in
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self.sig.args.range().zip(self.nodes[VOID].clone().outputs.into_iter().skip(2))
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{
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let ty = self.tys.ins.args[ti];
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match self.tys.size_of(ty) {
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0 => continue,
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1..=8 => {
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match parama.next(ty, self.tys) {
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PLoc::None => {}
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PLoc::Reg(r, _) | PLoc::WideReg(r, _) | PLoc::Ref(r, _) => {
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self.add_instr(NEVER, vec![regalloc2::Operand::reg_fixed_def(
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self.rg(arg),
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regalloc2::PReg::new(parama.next() as _, regalloc2::RegClass::Int),
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)]);
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}
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9..=16 => {
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self.add_instr(NEVER, vec![regalloc2::Operand::reg_fixed_def(
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self.rg(arg),
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regalloc2::PReg::new(
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parama.next_wide() as _,
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regalloc2::RegClass::Int,
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),
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)]);
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}
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_ => {
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self.add_instr(NEVER, vec![regalloc2::Operand::reg_fixed_def(
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self.rg(arg),
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regalloc2::PReg::new(parama.next() as _, regalloc2::RegClass::Int),
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regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
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)]);
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}
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}
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|
|
@ -3120,20 +3106,18 @@ impl<'a> Function<'a> {
|
|||
));
|
||||
}
|
||||
|
||||
let mut parama = self.tys.parama(fuc.ret);
|
||||
let mut inps = node.inputs[1..].iter();
|
||||
for ti in fuc.args.range() {
|
||||
let (ret, mut parama) = self.tys.parama(fuc.ret);
|
||||
for (ti, &(mut i)) in fuc.args.range().zip(node.inputs[1..].iter()) {
|
||||
let ty = self.tys.ins.args[ti];
|
||||
match self.tys.size_of(ty) {
|
||||
0 => continue,
|
||||
1..=8 => {
|
||||
match parama.next(ty, self.tys) {
|
||||
PLoc::None => {}
|
||||
PLoc::Reg(r, _) => {
|
||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
||||
self.rg(*inps.next().unwrap()),
|
||||
regalloc2::PReg::new(parama.next() as _, regalloc2::RegClass::Int),
|
||||
self.rg(i),
|
||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
||||
));
|
||||
}
|
||||
9..=16 => {
|
||||
let mut i = *inps.next().unwrap();
|
||||
PLoc::WideReg(r, _) => {
|
||||
loop {
|
||||
match self.nodes[i].kind {
|
||||
Kind::Stre { .. } => i = self.nodes[i].inputs[2],
|
||||
|
|
@ -3145,15 +3129,14 @@ impl<'a> Function<'a> {
|
|||
debug_assert!(i != 0);
|
||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
||||
self.rg(i),
|
||||
regalloc2::PReg::new(parama.next() as _, regalloc2::RegClass::Int),
|
||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
||||
));
|
||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
||||
self.rg(i),
|
||||
regalloc2::PReg::new(parama.next() as _, regalloc2::RegClass::Int),
|
||||
regalloc2::PReg::new(r as usize + 1, regalloc2::RegClass::Int),
|
||||
));
|
||||
}
|
||||
_ => {
|
||||
let mut i = *inps.next().unwrap();
|
||||
PLoc::Ref(r, _) => {
|
||||
loop {
|
||||
match self.nodes[i].kind {
|
||||
Kind::Stre { .. } => i = self.nodes[i].inputs[2],
|
||||
|
|
@ -3165,21 +3148,18 @@ impl<'a> Function<'a> {
|
|||
debug_assert!(i != 0);
|
||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
||||
self.rg(i),
|
||||
regalloc2::PReg::new(parama.next() as _, regalloc2::RegClass::Int),
|
||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
||||
));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
match self.tys.size_of(fuc.ret) {
|
||||
0..=16 => {}
|
||||
17.. => {
|
||||
if let PLoc::Ref(r, _) = ret {
|
||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
||||
self.rg(*node.inputs.last().unwrap()),
|
||||
regalloc2::PReg::new(1, regalloc2::RegClass::Int),
|
||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
||||
));
|
||||
}
|
||||
}
|
||||
|
||||
self.add_instr(nid, ops);
|
||||
|
||||
|
|
@ -3203,6 +3183,7 @@ impl<'a> Function<'a> {
|
|||
// .iter()
|
||||
// .all(|&n| matches!(self.nodes[n].kind, Kind::Stre | Kind::Load)))
|
||||
// }) => {}
|
||||
Kind::Stck if self.tys.size_of(node.ty) == 0 => self.nodes.lock(nid),
|
||||
Kind::Stck => {
|
||||
let ops = vec![self.drg(nid)];
|
||||
self.add_instr(nid, ops);
|
||||
|
|
@ -3212,6 +3193,9 @@ impl<'a> Function<'a> {
|
|||
self.add_instr(nid, ops);
|
||||
}
|
||||
Kind::Phi | Kind::Arg | Kind::Mem => {}
|
||||
Kind::Load { .. } if matches!(self.tys.size_of(node.ty), 0 | 9..) => {
|
||||
self.nodes.lock(nid)
|
||||
}
|
||||
Kind::Load { .. } => {
|
||||
let mut region = node.inputs[1];
|
||||
if self.nodes[region].kind == (Kind::BinOp { op: TokenKind::Add })
|
||||
|
|
@ -3219,14 +3203,12 @@ impl<'a> Function<'a> {
|
|||
{
|
||||
region = self.nodes[region].inputs[1]
|
||||
}
|
||||
if self.tys.size_of(node.ty) <= 8 {
|
||||
let ops = match self.nodes[region].kind {
|
||||
Kind::Stck => vec![self.drg(nid)],
|
||||
_ => vec![self.drg(nid), self.urg(region)],
|
||||
};
|
||||
self.add_instr(nid, ops);
|
||||
}
|
||||
}
|
||||
Kind::Stre if node.inputs[2] == VOID => self.nodes.lock(nid),
|
||||
Kind::Stre => {
|
||||
let mut region = node.inputs[2];
|
||||
|
|
|
|||
|
|
@ -47,6 +47,9 @@ main:
|
|||
CP r2, r3
|
||||
CP r4, r5
|
||||
CP r6, r7
|
||||
LD r2, r2, 0a, 16h
|
||||
LD r4, r4, 0a, 16h
|
||||
LD r6, r6, 0a, 16h
|
||||
JAL r31, r0, :line
|
||||
ADDI64 r7, r254, 0d
|
||||
ADDI64 r5, r254, 16d
|
||||
|
|
@ -61,6 +64,9 @@ main:
|
|||
CP r2, r3
|
||||
CP r4, r5
|
||||
CP r6, r7
|
||||
LD r2, r2, 0a, 16h
|
||||
LD r4, r4, 0a, 16h
|
||||
LD r6, r6, 0a, 16h
|
||||
JAL r31, r0, :rect_line
|
||||
JAL r31, r0, :example
|
||||
LD r31, r254, 96a, 16h
|
||||
|
|
@ -86,7 +92,6 @@ rect_line:
|
|||
2: ADDI64 r9, r9, 1d
|
||||
JMP :4
|
||||
1: JALA r0, r31, 0a
|
||||
timed out
|
||||
code size: 797
|
||||
ret: 0
|
||||
code size: 875
|
||||
ret: 4
|
||||
status: Ok(())
|
||||
|
|
|
|||
|
|
@ -14,29 +14,30 @@ main:
|
|||
ADDI64 r254, r254, 56d
|
||||
JALA r0, r31, 0a
|
||||
maina:
|
||||
ADDI64 r254, r254, -88d
|
||||
ST r31, r254, 24a, 64h
|
||||
ADDI64 r254, r254, -100d
|
||||
ST r31, r254, 28a, 72h
|
||||
ADDI64 r32, r254, 24d
|
||||
JAL r31, r0, :small_struct
|
||||
LI64 r32, 1d
|
||||
LI64 r33, 3d
|
||||
LI64 r34, 0d
|
||||
ADDI64 r35, r254, 0d
|
||||
ADDI64 r36, r254, 16d
|
||||
ST r34, r254, 16a, 1h
|
||||
ST r34, r254, 17a, 1h
|
||||
ST r34, r254, 18a, 1h
|
||||
ST r33, r254, 19a, 1h
|
||||
ST r32, r254, 20a, 1h
|
||||
ST r34, r254, 21a, 1h
|
||||
ST r34, r254, 22a, 1h
|
||||
ST r34, r254, 23a, 1h
|
||||
LD r37, r254, 16a, 8h
|
||||
ST r37, r254, 0a, 8h
|
||||
LI64 r33, 1d
|
||||
LI64 r34, 3d
|
||||
LI64 r35, 0d
|
||||
ADDI64 r36, r254, 0d
|
||||
ADDI64 r37, r254, 16d
|
||||
ST r35, r254, 16a, 1h
|
||||
ST r35, r254, 17a, 1h
|
||||
ST r35, r254, 18a, 1h
|
||||
ST r34, r254, 19a, 1h
|
||||
ST r33, r254, 20a, 1h
|
||||
ST r35, r254, 21a, 1h
|
||||
ST r35, r254, 22a, 1h
|
||||
ST r35, r254, 23a, 1h
|
||||
LD r38, r254, 16a, 8h
|
||||
ST r38, r254, 8a, 8h
|
||||
LD r1, r35, 0a, 16h
|
||||
LD r31, r254, 24a, 64h
|
||||
ADDI64 r254, r254, 88d
|
||||
ST r38, r254, 0a, 8h
|
||||
LD r39, r254, 16a, 8h
|
||||
ST r39, r254, 8a, 8h
|
||||
LD r1, r36, 0a, 16h
|
||||
LD r31, r254, 28a, 72h
|
||||
ADDI64 r254, r254, 100d
|
||||
JALA r0, r31, 0a
|
||||
small_struct:
|
||||
ADDI64 r254, r254, -4d
|
||||
|
|
@ -47,6 +48,6 @@ small_struct:
|
|||
LD r1, r254, 0a, 4h
|
||||
ADDI64 r254, r254, 4d
|
||||
JALA r0, r31, 0a
|
||||
code size: 532
|
||||
code size: 543
|
||||
ret: 2
|
||||
status: Ok(())
|
||||
|
|
|
|||
Loading…
Reference in a new issue