adding rescheduling
This commit is contained in:
parent
46f9903562
commit
8016b1fad5
|
@ -527,6 +527,13 @@ main := fn(): uint {
|
||||||
|
|
||||||
### Purely Testing Examples
|
### Purely Testing Examples
|
||||||
|
|
||||||
|
#### big_array_crash
|
||||||
|
```hb
|
||||||
|
SIN_TABLE := [int].(0, 174, 348, 523, 697, 871, 1045, 1218, 1391, 1564, 1736, 1908, 2079, 2249, 2419, 2588, 2756, 2923, 3090, 3255, 3420, 3583, 3746, 3907, 4067, 4226, 4384, 4540, 4695, 4848, 5000, 5150, 5299, 5446, 5591, 5735, 5877, 6018, 6156, 6293, 6427, 6560, 6691, 6819, 6946, 7071, 7193, 7313, 7431, 7547, 7660, 7771, 7880, 7986, 8090, 8191, 8290, 8386, 8480, 8571, 8660, 8746, 8829, 8910, 8987, 9063, 9135, 9205, 9271, 9335, 9396, 9455, 9510, 9563, 9612, 9659, 9702, 9743, 9781, 9816, 9848, 9877, 9902, 9925, 9945, 9961, 9975, 9986, 9993, 9998, 10000)
|
||||||
|
|
||||||
|
main := fn(): int return SIN_TABLE[10]
|
||||||
|
```
|
||||||
|
|
||||||
#### returning_global_struct
|
#### returning_global_struct
|
||||||
```hb
|
```hb
|
||||||
Color := struct {r: u8, g: u8, b: u8, a: u8}
|
Color := struct {r: u8, g: u8, b: u8, a: u8}
|
||||||
|
|
|
@ -20,7 +20,6 @@ use {
|
||||||
alloc::{borrow::ToOwned, string::String, vec::Vec},
|
alloc::{borrow::ToOwned, string::String, vec::Vec},
|
||||||
core::{
|
core::{
|
||||||
assert_matches::debug_assert_matches,
|
assert_matches::debug_assert_matches,
|
||||||
borrow::Borrow,
|
|
||||||
cell::RefCell,
|
cell::RefCell,
|
||||||
fmt::{self, Debug, Display, Write},
|
fmt::{self, Debug, Display, Write},
|
||||||
format_args as fa, mem,
|
format_args as fa, mem,
|
||||||
|
@ -29,6 +28,7 @@ use {
|
||||||
hashbrown::hash_map,
|
hashbrown::hash_map,
|
||||||
hbbytecode::DisasmError,
|
hbbytecode::DisasmError,
|
||||||
regalloc2::VReg,
|
regalloc2::VReg,
|
||||||
|
std::panic,
|
||||||
};
|
};
|
||||||
|
|
||||||
const VOID: Nid = 0;
|
const VOID: Nid = 0;
|
||||||
|
@ -145,16 +145,16 @@ impl Nodes {
|
||||||
fn graphviz_in_browser(&self, tys: &Types, files: &[parser::Ast]) {
|
fn graphviz_in_browser(&self, tys: &Types, files: &[parser::Ast]) {
|
||||||
#[cfg(all(debug_assertions, feature = "std"))]
|
#[cfg(all(debug_assertions, feature = "std"))]
|
||||||
{
|
{
|
||||||
let out = &mut String::new();
|
// let out = &mut String::new();
|
||||||
_ = self.graphviz_low(tys, files, out);
|
// _ = self.graphviz_low(tys, files, out);
|
||||||
if !std::process::Command::new("brave")
|
// if !std::process::Command::new("brave")
|
||||||
.arg(format!("https://dreampuf.github.io/GraphvizOnline/#{out}"))
|
// .arg(format!("https://dreampuf.github.io/GraphvizOnline/#{out}"))
|
||||||
.status()
|
// .status()
|
||||||
.unwrap()
|
// .unwrap()
|
||||||
.success()
|
// .success()
|
||||||
{
|
// {
|
||||||
log::error!("{out}");
|
// log::error!("{out}");
|
||||||
}
|
// }
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3755,7 +3755,7 @@ impl<'a> Function<'a> {
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
let node = self.nodes[nid].clone();
|
let mut node = self.nodes[nid].clone();
|
||||||
match node.kind {
|
match node.kind {
|
||||||
Kind::Start => {
|
Kind::Start => {
|
||||||
debug_assert_matches!(self.nodes[node.outputs[0]].kind, Kind::Entry);
|
debug_assert_matches!(self.nodes[node.outputs[0]].kind, Kind::Entry);
|
||||||
|
@ -3801,6 +3801,7 @@ impl<'a> Function<'a> {
|
||||||
block.push(self.rg(ph));
|
block.push(self.rg(ph));
|
||||||
}
|
}
|
||||||
self.blocks[self.nodes[nid].ralloc_backref as usize].params = block;
|
self.blocks[self.nodes[nid].ralloc_backref as usize].params = block;
|
||||||
|
self.reschedule_block(&mut node.outputs);
|
||||||
for o in node.outputs.into_iter().rev() {
|
for o in node.outputs.into_iter().rev() {
|
||||||
self.emit_node(o, nid);
|
self.emit_node(o, nid);
|
||||||
}
|
}
|
||||||
|
@ -3874,6 +3875,7 @@ impl<'a> Function<'a> {
|
||||||
)]);
|
)]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
self.reschedule_block(&mut node.outputs);
|
||||||
for o in node.outputs.into_iter().rev() {
|
for o in node.outputs.into_iter().rev() {
|
||||||
self.emit_node(o, nid);
|
self.emit_node(o, nid);
|
||||||
}
|
}
|
||||||
|
@ -3881,6 +3883,7 @@ impl<'a> Function<'a> {
|
||||||
Kind::Then | Kind::Else => {
|
Kind::Then | Kind::Else => {
|
||||||
self.nodes[nid].ralloc_backref = self.add_block(nid);
|
self.nodes[nid].ralloc_backref = self.add_block(nid);
|
||||||
self.bridge(prev, nid);
|
self.bridge(prev, nid);
|
||||||
|
self.reschedule_block(&mut node.outputs);
|
||||||
for o in node.outputs.into_iter().rev() {
|
for o in node.outputs.into_iter().rev() {
|
||||||
self.emit_node(o, nid);
|
self.emit_node(o, nid);
|
||||||
}
|
}
|
||||||
|
@ -3981,6 +3984,7 @@ impl<'a> Function<'a> {
|
||||||
|
|
||||||
self.add_instr(nid, ops);
|
self.add_instr(nid, ops);
|
||||||
|
|
||||||
|
self.reschedule_block(&mut node.outputs);
|
||||||
for o in node.outputs.into_iter().rev() {
|
for o in node.outputs.into_iter().rev() {
|
||||||
if self.nodes[o].inputs[0] == nid
|
if self.nodes[o].inputs[0] == nid
|
||||||
|| (matches!(self.nodes[o].kind, Kind::Loop | Kind::Region)
|
|| (matches!(self.nodes[o].kind, Kind::Loop | Kind::Region)
|
||||||
|
@ -4069,6 +4073,74 @@ impl<'a> Function<'a> {
|
||||||
.preds
|
.preds
|
||||||
.push(regalloc2::Block::new(self.nodes[pred].ralloc_backref as usize));
|
.push(regalloc2::Block::new(self.nodes[pred].ralloc_backref as usize));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
fn reschedule_block(&mut self, outputs: &mut Vc) {
|
||||||
|
let mut buf = Vec::with_capacity(outputs.len());
|
||||||
|
let mut seen = BitSet::default();
|
||||||
|
seen.clear(self.nodes.values.len());
|
||||||
|
|
||||||
|
for &o in outputs.iter() {
|
||||||
|
if !self.nodes.is_cfg(o) {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
seen.set(o);
|
||||||
|
|
||||||
|
let mut cursor = buf.len();
|
||||||
|
buf.push(o);
|
||||||
|
while let Some(&n) = buf.get(cursor) {
|
||||||
|
for &i in &self.nodes[n].inputs[1..] {
|
||||||
|
if self.nodes[i].inputs.is_empty() {
|
||||||
|
std::println!("{:?}", self.nodes[i]);
|
||||||
|
}
|
||||||
|
if self.nodes[n].inputs.first() == self.nodes[i].inputs.first()
|
||||||
|
&& self.nodes[i].outputs.iter().all(|&o| {
|
||||||
|
self.nodes[o].inputs.first() != self.nodes[i].inputs.first()
|
||||||
|
|| seen.get(o)
|
||||||
|
})
|
||||||
|
&& seen.set(i)
|
||||||
|
{
|
||||||
|
buf.push(i);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
cursor += 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
for &o in outputs.iter() {
|
||||||
|
if !seen.set(o) {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
let mut cursor = buf.len();
|
||||||
|
buf.push(o);
|
||||||
|
while let Some(&n) = buf.get(cursor) {
|
||||||
|
for &i in &self.nodes[n].inputs[1..] {
|
||||||
|
if self.nodes[i].inputs.is_empty() {
|
||||||
|
std::println!("{:?}", self.nodes[i]);
|
||||||
|
}
|
||||||
|
if self.nodes[n].inputs.first() == self.nodes[i].inputs.first()
|
||||||
|
&& self.nodes[i].outputs.iter().all(|&o| {
|
||||||
|
self.nodes[o].inputs.first() != self.nodes[i].inputs.first()
|
||||||
|
|| seen.get(o)
|
||||||
|
})
|
||||||
|
&& seen.set(i)
|
||||||
|
{
|
||||||
|
buf.push(i);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
cursor += 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
debug_assert!(outputs.len() == buf.len() || outputs.len() == buf.len() + 1,);
|
||||||
|
|
||||||
|
std::println!("{:?}\n{:?}", outputs, buf);
|
||||||
|
|
||||||
|
if buf.len() + 1 == outputs.len() {
|
||||||
|
outputs.remove(outputs.len() - 1);
|
||||||
|
}
|
||||||
|
outputs.copy_from_slice(&buf);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl regalloc2::Function for Function<'_> {
|
impl regalloc2::Function for Function<'_> {
|
||||||
|
@ -4574,6 +4646,7 @@ mod tests {
|
||||||
fb_driver;
|
fb_driver;
|
||||||
|
|
||||||
// Purely Testing Examples;
|
// Purely Testing Examples;
|
||||||
|
big_array_crash;
|
||||||
returning_global_struct;
|
returning_global_struct;
|
||||||
small_struct_bitcast;
|
small_struct_bitcast;
|
||||||
small_struct_assignment;
|
small_struct_assignment;
|
||||||
|
|
|
@ -1,21 +1,21 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -36d
|
ADDI64 r254, r254, -36d
|
||||||
ST r31, r254, 28a, 8h
|
ST r31, r254, 28a, 8h
|
||||||
LI64 r7, 4d
|
LI8 r1, 0b
|
||||||
LI64 r8, 2d
|
ADDI64 r5, r254, 0d
|
||||||
LI64 r9, 1d
|
ST r1, r254, 0a, 1h
|
||||||
LI8 r6, 1b
|
ST r1, r254, 1a, 1h
|
||||||
LI8 r10, 255b
|
LI8 r6, 255b
|
||||||
LI8 r11, 0b
|
ST r6, r254, 2a, 1h
|
||||||
ADDI64 r12, r254, 0d
|
LI8 r9, 1b
|
||||||
ST r11, r254, 0a, 1h
|
ST r9, r254, 3a, 1h
|
||||||
ST r11, r254, 1a, 1h
|
LI64 r1, 1d
|
||||||
ST r10, r254, 2a, 1h
|
|
||||||
ST r6, r254, 3a, 1h
|
|
||||||
ADDI64 r2, r254, 4d
|
ADDI64 r2, r254, 4d
|
||||||
ST r9, r254, 4a, 8h
|
ST r1, r254, 4a, 8h
|
||||||
ST r8, r254, 12a, 8h
|
LI64 r5, 2d
|
||||||
ST r7, r254, 20a, 8h
|
ST r5, r254, 12a, 8h
|
||||||
|
LI64 r8, 4d
|
||||||
|
ST r8, r254, 20a, 8h
|
||||||
JAL r31, r0, :pass
|
JAL r31, r0, :pass
|
||||||
LD r2, r254, 3a, 1h
|
LD r2, r254, 3a, 1h
|
||||||
ANDI r4, r2, 255d
|
ANDI r4, r2, 255d
|
||||||
|
@ -26,11 +26,11 @@ main:
|
||||||
pass:
|
pass:
|
||||||
LD r4, r2, 8a, 8h
|
LD r4, r2, 8a, 8h
|
||||||
MULI64 r8, r4, 8d
|
MULI64 r8, r4, 8d
|
||||||
ADD64 r10, r8, r2
|
LD r5, r2, 0a, 8h
|
||||||
LD r8, r10, 0a, 8h
|
ADD64 r11, r8, r2
|
||||||
LD r7, r2, 0a, 8h
|
ADD64 r10, r4, r5
|
||||||
ADD64 r11, r4, r7
|
LD r11, r11, 0a, 8h
|
||||||
ADD64 r1, r8, r11
|
ADD64 r1, r11, r10
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 327
|
code size: 327
|
||||||
ret: 8
|
ret: 8
|
||||||
|
|
7
lang/tests/son_tests_big_array_crash.txt
Normal file
7
lang/tests/son_tests_big_array_crash.txt
Normal file
|
@ -0,0 +1,7 @@
|
||||||
|
main:
|
||||||
|
LRA r1, r0, :SIN_TABLE
|
||||||
|
LD r1, r1, 80a, 8h
|
||||||
|
JALA r0, r31, 0a
|
||||||
|
code size: 767
|
||||||
|
ret: 1736
|
||||||
|
status: Ok(())
|
|
@ -1,45 +1,45 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -24d
|
||||||
LI32 r6, 2w
|
LI8 r3, 255b
|
||||||
LI32 r5, 0w
|
ADDI64 r2, r254, 12d
|
||||||
LI8 r8, 0b
|
ST r3, r254, 12a, 1h
|
||||||
LI8 r9, 255b
|
LI8 r6, 0b
|
||||||
ADDI64 r10, r254, 0d
|
ST r6, r254, 13a, 1h
|
||||||
ADDI64 r7, r254, 12d
|
ST r6, r254, 14a, 1h
|
||||||
ST r9, r254, 12a, 1h
|
ST r3, r254, 15a, 1h
|
||||||
ST r8, r254, 13a, 1h
|
LI32 r11, 0w
|
||||||
ST r8, r254, 14a, 1h
|
ST r11, r254, 16a, 4h
|
||||||
ST r9, r254, 15a, 1h
|
LI32 r3, 2w
|
||||||
ST r5, r254, 16a, 4h
|
ST r3, r254, 20a, 4h
|
||||||
ST r6, r254, 20a, 4h
|
ADDI64 r5, r254, 0d
|
||||||
BMC r7, r10, 12h
|
BMC r2, r5, 12h
|
||||||
LD r8, r254, 8a, 4h
|
LD r8, r254, 8a, 4h
|
||||||
ANDI r8, r8, 4294967295d
|
ANDI r8, r8, 4294967295d
|
||||||
ANDI r6, r6, 4294967295d
|
ANDI r3, r3, 4294967295d
|
||||||
JEQ r8, r6, :0
|
JEQ r8, r3, :0
|
||||||
LI64 r1, 0d
|
LI64 r1, 0d
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LD r2, r254, 4a, 4h
|
0: LD r2, r254, 4a, 4h
|
||||||
ANDI r2, r2, 4294967295d
|
ANDI r2, r2, 4294967295d
|
||||||
ANDI r5, r5, 4294967295d
|
ANDI r11, r11, 4294967295d
|
||||||
JEQ r2, r5, :2
|
JEQ r2, r11, :2
|
||||||
LI64 r1, 64d
|
LI64 r1, 64d
|
||||||
JMP :1
|
JMP :1
|
||||||
2: LD r8, r254, 3a, 1h
|
2: LD r10, r254, 0a, 1h
|
||||||
ANDI r10, r8, 255d
|
LD r9, r254, 4a, 4h
|
||||||
LD r7, r254, 2a, 1h
|
LD r11, r254, 8a, 4h
|
||||||
ANDI r9, r7, 255d
|
LD r5, r254, 1a, 1h
|
||||||
LD r6, r254, 1a, 1h
|
ANDI r4, r10, 255d
|
||||||
ANDI r8, r6, 255d
|
ADD32 r6, r11, r9
|
||||||
LD r4, r254, 0a, 1h
|
LD r11, r254, 2a, 1h
|
||||||
ANDI r7, r4, 255d
|
ANDI r10, r5, 255d
|
||||||
LD r5, r254, 8a, 4h
|
ADD32 r9, r6, r4
|
||||||
LD r6, r254, 4a, 4h
|
LD r5, r254, 3a, 1h
|
||||||
ADD32 r11, r5, r6
|
ANDI r4, r11, 255d
|
||||||
ADD32 r12, r11, r7
|
ADD32 r3, r9, r10
|
||||||
ADD32 r4, r12, r8
|
ANDI r9, r5, 255d
|
||||||
ADD32 r8, r4, r9
|
ADD32 r8, r3, r4
|
||||||
ADD32 r12, r8, r10
|
ADD32 r12, r8, r9
|
||||||
ANDI r1, r12, 4294967295d
|
ANDI r1, r12, 4294967295d
|
||||||
1: ADDI64 r254, r254, 24d
|
1: ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
|
|
|
@ -1,20 +1,20 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -31d
|
ADDI64 r254, r254, -31d
|
||||||
LI64 r5, 5d
|
LI64 r1, 10d
|
||||||
|
ADDI64 r4, r254, 15d
|
||||||
|
ST r1, r254, 15a, 8h
|
||||||
LI64 r7, 20d
|
LI64 r7, 20d
|
||||||
LI64 r2, 1d
|
|
||||||
LI64 r4, 10d
|
|
||||||
LI64 r6, 6d
|
|
||||||
ADDI64 r8, r254, 15d
|
|
||||||
ST r4, r254, 15a, 8h
|
|
||||||
ST r7, r254, 23a, 8h
|
ST r7, r254, 23a, 8h
|
||||||
LD r3, r8, 0a, 16h
|
LI64 r6, 6d
|
||||||
|
LI64 r5, 5d
|
||||||
|
LI64 r2, 1d
|
||||||
|
LD r3, r4, 0a, 16h
|
||||||
ECA
|
ECA
|
||||||
LRA r5, r0, :arbitrary text
|
LRA r5, r0, :arbitrary text
|
||||||
|
|
||||||
|
ADDI64 r7, r254, 0d
|
||||||
|
BMC r5, r7, 15h
|
||||||
LI64 r1, 0d
|
LI64 r1, 0d
|
||||||
ADDI64 r8, r254, 0d
|
|
||||||
BMC r5, r8, 15h
|
|
||||||
ADDI64 r254, r254, 31d
|
ADDI64 r254, r254, 31d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
ev: Ecall
|
ev: Ecall
|
||||||
|
|
|
@ -21,14 +21,13 @@ main:
|
||||||
LI64 r32, 0d
|
LI64 r32, 0d
|
||||||
CP r2, r32
|
CP r2, r32
|
||||||
JAL r31, r0, :multiple_breaks
|
JAL r31, r0, :multiple_breaks
|
||||||
CP r3, r1
|
LI64 r6, 1d
|
||||||
LI64 r1, 3d
|
LI64 r7, 3d
|
||||||
LI64 r7, 1d
|
JEQ r1, r7, :0
|
||||||
JEQ r3, r1, :0
|
CP r1, r6
|
||||||
CP r1, r7
|
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r33, r7
|
0: CP r33, r6
|
||||||
CP r34, r1
|
CP r34, r7
|
||||||
LI64 r35, 4d
|
LI64 r35, 4d
|
||||||
CP r2, r35
|
CP r2, r35
|
||||||
JAL r31, r0, :multiple_breaks
|
JAL r31, r0, :multiple_breaks
|
||||||
|
@ -92,6 +91,6 @@ state_change_in_break:
|
||||||
JMP :4
|
JMP :4
|
||||||
3: JALA r0, r31, 0a
|
3: JALA r0, r31, 0a
|
||||||
timed out
|
timed out
|
||||||
code size: 585
|
code size: 582
|
||||||
ret: 10
|
ret: 10
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,9 +1,9 @@
|
||||||
deinit:
|
deinit:
|
||||||
ADDI64 r254, r254, -48d
|
ADDI64 r254, r254, -48d
|
||||||
ST r31, r254, 24a, 24h
|
ST r31, r254, 24a, 24h
|
||||||
LI64 r4, 8d
|
|
||||||
LD r5, r2, 16a, 8h
|
LD r5, r2, 16a, 8h
|
||||||
CP r32, r2
|
CP r32, r2
|
||||||
|
LI64 r4, 8d
|
||||||
MUL64 r3, r5, r4
|
MUL64 r3, r5, r4
|
||||||
CP r5, r32
|
CP r5, r32
|
||||||
LD r2, r5, 0a, 8h
|
LD r2, r5, 0a, 8h
|
||||||
|
@ -31,9 +31,9 @@ main:
|
||||||
ADDI64 r32, r254, 24d
|
ADDI64 r32, r254, 24d
|
||||||
CP r1, r32
|
CP r1, r32
|
||||||
JAL r31, r0, :new
|
JAL r31, r0, :new
|
||||||
LI64 r3, 69d
|
|
||||||
ADDI64 r33, r254, 0d
|
ADDI64 r33, r254, 0d
|
||||||
BMC r32, r33, 24h
|
BMC r32, r33, 24h
|
||||||
|
LI64 r3, 69d
|
||||||
CP r2, r33
|
CP r2, r33
|
||||||
JAL r31, r0, :push
|
JAL r31, r0, :push
|
||||||
LD r12, r254, 0a, 8h
|
LD r12, r254, 0a, 8h
|
||||||
|
@ -67,15 +67,15 @@ push:
|
||||||
ST r31, r254, 0a, 72h
|
ST r31, r254, 0a, 72h
|
||||||
CP r32, r3
|
CP r32, r3
|
||||||
LI64 r33, 1d
|
LI64 r33, 1d
|
||||||
LD r7, r2, 16a, 8h
|
LD r6, r2, 8a, 8h
|
||||||
LD r8, r2, 8a, 8h
|
LD r8, r2, 16a, 8h
|
||||||
CP r34, r2
|
CP r34, r2
|
||||||
JNE r7, r8, :0
|
JNE r8, r6, :0
|
||||||
LI64 r35, 0d
|
LI64 r35, 0d
|
||||||
JNE r7, r35, :1
|
JNE r8, r35, :1
|
||||||
CP r36, r33
|
CP r36, r33
|
||||||
JMP :2
|
JMP :2
|
||||||
1: MULI64 r36, r7, 2d
|
1: MULI64 r36, r8, 2d
|
||||||
2: LI64 r37, 8d
|
2: LI64 r37, 8d
|
||||||
MUL64 r2, r36, r37
|
MUL64 r2, r36, r37
|
||||||
CP r3, r37
|
CP r3, r37
|
||||||
|
@ -95,9 +95,9 @@ push:
|
||||||
9: JNE r11, r12, :5
|
9: JNE r11, r12, :5
|
||||||
LD r5, r38, 8a, 8h
|
LD r5, r38, 8a, 8h
|
||||||
JEQ r5, r1, :6
|
JEQ r5, r1, :6
|
||||||
LD r2, r38, 0a, 8h
|
|
||||||
CP r4, r37
|
CP r4, r37
|
||||||
MUL64 r3, r5, r4
|
MUL64 r3, r5, r4
|
||||||
|
LD r2, r38, 0a, 8h
|
||||||
JAL r31, r0, :free
|
JAL r31, r0, :free
|
||||||
CP r5, r39
|
CP r5, r39
|
||||||
JMP :7
|
JMP :7
|
||||||
|
|
|
@ -1,17 +1,17 @@
|
||||||
main:
|
main:
|
||||||
LI64 r5, 0d
|
LI64 r8, 6d
|
||||||
LRA r4, r0, :gb
|
LRA r4, r0, :gb
|
||||||
LI64 r10, 6d
|
LI64 r7, 0d
|
||||||
LD r7, r4, 0a, 8h
|
LD r9, r4, 0a, 8h
|
||||||
CMPU r11, r7, r5
|
CMPU r10, r9, r7
|
||||||
CMPUI r11, r11, 0d
|
CMPUI r10, r10, 0d
|
||||||
ORI r12, r11, 0d
|
ORI r12, r10, 0d
|
||||||
ANDI r12, r12, 255d
|
ANDI r12, r12, 255d
|
||||||
JNE r12, r0, :0
|
JNE r12, r0, :0
|
||||||
CP r5, r10
|
CP r5, r8
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LI64 r5, 1d
|
0: LI64 r5, 1d
|
||||||
1: SUB64 r1, r5, r10
|
1: SUB64 r1, r5, r8
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 131
|
code size: 131
|
||||||
ret: 0
|
ret: 0
|
||||||
|
|
|
@ -23,27 +23,27 @@ scalar_values:
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
structs:
|
structs:
|
||||||
ADDI64 r254, r254, -48d
|
ADDI64 r254, r254, -48d
|
||||||
LI64 r7, 5d
|
ADDI64 r1, r254, 40d
|
||||||
LI64 r6, 20d
|
LI64 r3, 0d
|
||||||
LI64 r4, 0d
|
ST r3, r254, 40a, 8h
|
||||||
ADDI64 r8, r254, 0d
|
ADDI64 r7, r254, 0d
|
||||||
ADDI64 r10, r254, 8d
|
LI64 r9, 20d
|
||||||
ADDI64 r8, r254, 24d
|
ST r9, r254, 0a, 8h
|
||||||
ADDI64 r8, r254, 40d
|
LI64 r1, 5d
|
||||||
ST r4, r254, 40a, 8h
|
ADDI64 r2, r254, 8d
|
||||||
ST r6, r254, 0a, 8h
|
ST r1, r254, 8a, 8h
|
||||||
ST r7, r254, 8a, 8h
|
ST r1, r254, 16a, 8h
|
||||||
ST r7, r254, 16a, 8h
|
LD r6, r254, 0a, 8h
|
||||||
LD r8, r254, 8a, 8h
|
LD r8, r254, 8a, 8h
|
||||||
LD r9, r254, 0a, 8h
|
ADD64 r11, r8, r6
|
||||||
ADD64 r12, r8, r9
|
SUB64 r11, r11, r1
|
||||||
SUB64 r12, r12, r7
|
ADDI64 r5, r254, 24d
|
||||||
ST r12, r254, 24a, 8h
|
ST r11, r254, 24a, 8h
|
||||||
ST r6, r254, 32a, 8h
|
ST r9, r254, 32a, 8h
|
||||||
|
LD r5, r254, 40a, 8h
|
||||||
LD r7, r254, 24a, 8h
|
LD r7, r254, 24a, 8h
|
||||||
LD r8, r254, 40a, 8h
|
ADD64 r10, r7, r5
|
||||||
ADD64 r10, r7, r8
|
SUB64 r1, r10, r9
|
||||||
SUB64 r1, r10, r6
|
|
||||||
ADDI64 r254, r254, 48d
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 417
|
code size: 417
|
||||||
|
|
|
@ -1,13 +1,12 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -24d
|
||||||
ST r31, r254, 16a, 8h
|
ST r31, r254, 16a, 8h
|
||||||
LI64 r4, 1024d
|
ADDI64 r2, r254, 8d
|
||||||
LI64 r2, 0d
|
LI64 r4, 0d
|
||||||
|
ST r4, r254, 8a, 8h
|
||||||
ADDI64 r3, r254, 0d
|
ADDI64 r3, r254, 0d
|
||||||
ADDI64 r5, r254, 8d
|
ST r4, r254, 0a, 8h
|
||||||
ST r2, r254, 8a, 8h
|
LI64 r4, 1024d
|
||||||
ST r2, r254, 0a, 8h
|
|
||||||
CP r2, r5
|
|
||||||
JAL r31, r0, :set
|
JAL r31, r0, :set
|
||||||
ANDI r1, r1, 4294967295d
|
ANDI r1, r1, 4294967295d
|
||||||
LD r31, r254, 16a, 8h
|
LD r31, r254, 16a, 8h
|
||||||
|
@ -15,18 +14,18 @@ main:
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
set:
|
set:
|
||||||
ADDI64 r254, r254, -25d
|
ADDI64 r254, r254, -25d
|
||||||
LI32 r9, 8w
|
LI8 r7, 5b
|
||||||
LI8 r8, 5b
|
ADDI64 r11, r254, 0d
|
||||||
ANDI r10, r4, 4294967295d
|
ST r7, r254, 0a, 1h
|
||||||
ADDI64 r1, r254, 0d
|
ANDI r11, r4, 4294967295d
|
||||||
ST r8, r254, 0a, 1h
|
ST r11, r254, 1a, 4h
|
||||||
ST r10, r254, 1a, 4h
|
LI32 r4, 8w
|
||||||
ST r9, r254, 5a, 4h
|
ST r4, r254, 5a, 4h
|
||||||
ST r2, r254, 9a, 8h
|
ST r2, r254, 9a, 8h
|
||||||
ST r3, r254, 17a, 8h
|
ST r3, r254, 17a, 8h
|
||||||
LD r1, r254, 1a, 4h
|
LD r1, r254, 1a, 4h
|
||||||
ADDI64 r254, r254, 25d
|
ADDI64 r254, r254, 25d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 298
|
code size: 295
|
||||||
ret: 1024
|
ret: 1024
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -5,13 +5,13 @@ clobber:
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -16d
|
||||||
ST r31, r254, 8a, 8h
|
ST r31, r254, 8a, 8h
|
||||||
LI64 r3, 2d
|
|
||||||
ADDI64 r2, r254, 0d
|
ADDI64 r2, r254, 0d
|
||||||
ST r3, r254, 0a, 8h
|
LI64 r4, 2d
|
||||||
|
ST r4, r254, 0a, 8h
|
||||||
JAL r31, r0, :clobber
|
JAL r31, r0, :clobber
|
||||||
LI64 r6, 4d
|
LD r8, r254, 0a, 8h
|
||||||
LD r9, r254, 0a, 8h
|
LI64 r7, 4d
|
||||||
SUB64 r1, r6, r9
|
SUB64 r1, r7, r8
|
||||||
LD r31, r254, 8a, 8h
|
LD r31, r254, 8a, 8h
|
||||||
ADDI64 r254, r254, 16d
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
|
|
|
@ -3,8 +3,8 @@ drop:
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -24d
|
||||||
ST r31, r254, 8a, 16h
|
ST r31, r254, 8a, 16h
|
||||||
LI64 r32, 1d
|
|
||||||
ADDI64 r2, r254, 0d
|
ADDI64 r2, r254, 0d
|
||||||
|
LI64 r32, 1d
|
||||||
ST r32, r254, 0a, 8h
|
ST r32, r254, 0a, 8h
|
||||||
JAL r31, r0, :modify
|
JAL r31, r0, :modify
|
||||||
CP r2, r32
|
CP r2, r32
|
||||||
|
|
|
@ -37,14 +37,13 @@ main:
|
||||||
ADDI64 r254, r254, 8d
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
request_page:
|
request_page:
|
||||||
CP r12, r2
|
LRA r4, r0, :"\0\u{1}xxxxxxxx\0"
|
||||||
|
ST r2, r4, 1a, 1h
|
||||||
LI64 r5, 12d
|
LI64 r5, 12d
|
||||||
LI64 r3, 2d
|
LI64 r3, 2d
|
||||||
LI64 r2, 3d
|
LI64 r2, 3d
|
||||||
LRA r4, r0, :"\0\u{1}xxxxxxxx\0"
|
|
||||||
ST r12, r4, 1a, 1h
|
|
||||||
ECA
|
ECA
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 339
|
code size: 336
|
||||||
ret: 42
|
ret: 42
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -6,16 +6,16 @@ main:
|
||||||
ST r1, r254, 4a, 4h
|
ST r1, r254, 4a, 4h
|
||||||
ADDI64 r5, r254, 0d
|
ADDI64 r5, r254, 0d
|
||||||
BMC r32, r5, 4h
|
BMC r32, r5, 4h
|
||||||
LD r3, r254, 3a, 1h
|
LD r9, r254, 1a, 1h
|
||||||
ANDI r5, r3, 255d
|
LD r1, r254, 2a, 1h
|
||||||
LD r2, r254, 2a, 1h
|
ANDI r12, r9, 255d
|
||||||
ANDI r4, r2, 255d
|
LD r11, r254, 0a, 8h
|
||||||
LD r1, r254, 1a, 1h
|
LD r7, r254, 3a, 1h
|
||||||
ANDI r3, r1, 255d
|
ANDI r6, r1, 255d
|
||||||
LD r2, r254, 0a, 8h
|
ADD64 r5, r11, r12
|
||||||
ADD64 r6, r2, r3
|
ANDI r11, r7, 255d
|
||||||
ADD64 r10, r6, r4
|
ADD64 r10, r5, r6
|
||||||
ADD64 r1, r10, r5
|
ADD64 r1, r10, r11
|
||||||
LD r31, r254, 8a, 16h
|
LD r31, r254, 8a, 16h
|
||||||
ADDI64 r254, r254, 24d
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
|
|
|
@ -1,10 +1,10 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -4d
|
ADDI64 r254, r254, -4d
|
||||||
LRA r3, r0, :white
|
LRA r1, r0, :black
|
||||||
LRA r2, r0, :black
|
ADDI64 r3, r254, 0d
|
||||||
ADDI64 r4, r254, 0d
|
LRA r5, r0, :white
|
||||||
BMC r2, r4, 4h
|
BMC r1, r3, 4h
|
||||||
BMC r3, r4, 4h
|
BMC r5, r3, 4h
|
||||||
LD r9, r254, 3a, 1h
|
LD r9, r254, 3a, 1h
|
||||||
ANDI r1, r9, 255d
|
ANDI r1, r9, 255d
|
||||||
ADDI64 r254, r254, 4d
|
ADDI64 r254, r254, 4d
|
||||||
|
|
|
@ -16,21 +16,21 @@ main:
|
||||||
JNE r10, r6, :3
|
JNE r10, r6, :3
|
||||||
CP r7, r9
|
CP r7, r9
|
||||||
JMP :4
|
JMP :4
|
||||||
3: ADDI64 r12, r254, 32d
|
3: ADD64 r3, r10, r8
|
||||||
MUL64 r11, r7, r6
|
MUL64 r12, r7, r6
|
||||||
SUB64 r1, r6, r9
|
SUB64 r11, r6, r9
|
||||||
MUL64 r1, r1, r6
|
ADD64 r9, r12, r10
|
||||||
ADD64 r9, r10, r8
|
MUL64 r11, r11, r6
|
||||||
ADD64 r1, r1, r10
|
MULI64 r9, r9, 8d
|
||||||
MULI64 r1, r1, 8d
|
ADD64 r11, r11, r10
|
||||||
ADD64 r1, r1, r5
|
ADD64 r9, r9, r5
|
||||||
ADD64 r2, r11, r10
|
MULI64 r11, r11, 8d
|
||||||
MULI64 r10, r2, 8d
|
ADDI64 r10, r254, 32d
|
||||||
ADD64 r10, r10, r5
|
ADD64 r12, r11, r5
|
||||||
|
BMC r9, r10, 8h
|
||||||
|
BMC r12, r9, 8h
|
||||||
BMC r10, r12, 8h
|
BMC r10, r12, 8h
|
||||||
BMC r1, r10, 8h
|
CP r10, r3
|
||||||
BMC r12, r1, 8h
|
|
||||||
CP r10, r9
|
|
||||||
JMP :5
|
JMP :5
|
||||||
0: ADD64 r2, r9, r8
|
0: ADD64 r2, r9, r8
|
||||||
MULI64 r12, r9, 8d
|
MULI64 r12, r9, 8d
|
||||||
|
|
|
@ -1,93 +1,93 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -168d
|
ADDI64 r254, r254, -168d
|
||||||
LI8 r11, 4b
|
LI8 r1, 0b
|
||||||
LI8 r5, 1b
|
ADDI64 r3, r254, 148d
|
||||||
LI8 r3, 0b
|
ST r1, r254, 148a, 1h
|
||||||
ADDI64 r6, r254, 144d
|
ST r1, r254, 149a, 1h
|
||||||
ADDI64 r6, r254, 148d
|
ST r1, r254, 150a, 1h
|
||||||
ST r3, r254, 148a, 1h
|
ST r1, r254, 151a, 1h
|
||||||
ST r3, r254, 149a, 1h
|
LI8 r10, 1b
|
||||||
ST r3, r254, 150a, 1h
|
ADDI64 r11, r254, 144d
|
||||||
ST r3, r254, 151a, 1h
|
ST r10, r254, 144a, 1h
|
||||||
ST r5, r254, 144a, 1h
|
ST r10, r254, 145a, 1h
|
||||||
ST r5, r254, 145a, 1h
|
ST r10, r254, 146a, 1h
|
||||||
ST r5, r254, 146a, 1h
|
ST r10, r254, 147a, 1h
|
||||||
ST r5, r254, 147a, 1h
|
LD r6, r254, 144a, 1h
|
||||||
LD r7, r254, 144a, 1h
|
LD r7, r254, 148a, 1h
|
||||||
LD r8, r254, 148a, 1h
|
ADD8 r9, r6, r7
|
||||||
ADD8 r10, r7, r8
|
ST r9, r254, 148a, 1h
|
||||||
ST r10, r254, 148a, 1h
|
LD r1, r254, 145a, 1h
|
||||||
LD r2, r254, 145a, 1h
|
LD r2, r254, 149a, 1h
|
||||||
LD r3, r254, 149a, 1h
|
ADD8 r4, r2, r1
|
||||||
ADD8 r5, r3, r2
|
ST r4, r254, 149a, 1h
|
||||||
ST r5, r254, 149a, 1h
|
LD r8, r254, 146a, 1h
|
||||||
LD r9, r254, 146a, 1h
|
LD r9, r254, 150a, 1h
|
||||||
LD r10, r254, 150a, 1h
|
ADD8 r11, r9, r8
|
||||||
ADD8 r12, r10, r9
|
ST r11, r254, 150a, 1h
|
||||||
ST r12, r254, 150a, 1h
|
LD r3, r254, 147a, 1h
|
||||||
LD r4, r254, 147a, 1h
|
LD r4, r254, 151a, 1h
|
||||||
LD r5, r254, 151a, 1h
|
ADD8 r6, r4, r3
|
||||||
ADD8 r7, r5, r4
|
ST r6, r254, 151a, 1h
|
||||||
ST r7, r254, 151a, 1h
|
LD r10, r254, 149a, 1h
|
||||||
LD r2, r254, 151a, 1h
|
LD r11, r254, 150a, 1h
|
||||||
LD r12, r254, 150a, 1h
|
ADD8 r1, r11, r10
|
||||||
LD r3, r254, 148a, 1h
|
LD r3, r254, 148a, 1h
|
||||||
LD r4, r254, 149a, 1h
|
ADD8 r6, r3, r1
|
||||||
ADD8 r4, r12, r4
|
LD r7, r254, 151a, 1h
|
||||||
ADD8 r8, r3, r4
|
LI8 r9, 4b
|
||||||
ADD8 r12, r2, r8
|
ADD8 r11, r7, r6
|
||||||
ANDI r12, r12, 255d
|
|
||||||
ANDI r11, r11, 255d
|
ANDI r11, r11, 255d
|
||||||
JEQ r12, r11, :0
|
ANDI r9, r9, 255d
|
||||||
|
JEQ r11, r9, :0
|
||||||
LI64 r1, 1008d
|
LI64 r1, 1008d
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LI64 r1, 0d
|
0: LI64 r5, 1d
|
||||||
LI64 r10, 4d
|
ADDI64 r8, r254, 80d
|
||||||
LI64 r2, 3d
|
ST r5, r254, 80a, 8h
|
||||||
LI64 r9, 2d
|
LI64 r9, 2d
|
||||||
LI64 r3, 1d
|
|
||||||
ADDI64 r5, r254, 0d
|
|
||||||
ADDI64 r4, r254, 32d
|
|
||||||
ADDI64 r4, r254, 48d
|
|
||||||
ADDI64 r12, r4, 16d
|
|
||||||
ADDI64 r4, r254, 80d
|
|
||||||
ADDI64 r6, r254, 96d
|
|
||||||
ADDI64 r11, r254, 112d
|
|
||||||
ST r3, r254, 80a, 8h
|
|
||||||
ST r9, r254, 88a, 8h
|
ST r9, r254, 88a, 8h
|
||||||
ST r2, r254, 32a, 8h
|
LI64 r1, 3d
|
||||||
ST r10, r254, 40a, 8h
|
ADDI64 r4, r254, 32d
|
||||||
LD r6, r254, 80a, 8h
|
ST r1, r254, 32a, 8h
|
||||||
LD r7, r254, 32a, 8h
|
LI64 r5, 4d
|
||||||
ADD64 r8, r7, r6
|
ST r5, r254, 40a, 8h
|
||||||
ST r8, r254, 0a, 8h
|
LD r12, r254, 32a, 8h
|
||||||
LD r2, r254, 40a, 8h
|
LD r1, r254, 80a, 8h
|
||||||
LD r3, r254, 88a, 8h
|
ADDI64 r11, r254, 0d
|
||||||
ADD64 r3, r2, r3
|
ADD64 r3, r12, r1
|
||||||
ST r3, r254, 8a, 8h
|
ST r3, r254, 0a, 8h
|
||||||
LD r6, r254, 32a, 8h
|
LD r7, r254, 40a, 8h
|
||||||
LD r8, r254, 80a, 8h
|
LD r9, r254, 88a, 8h
|
||||||
SUB64 r10, r6, r8
|
ADD64 r10, r7, r9
|
||||||
ST r10, r254, 16a, 8h
|
ST r10, r254, 8a, 8h
|
||||||
LD r2, r254, 88a, 8h
|
LD r2, r254, 80a, 8h
|
||||||
LD r3, r254, 40a, 8h
|
LD r3, r254, 32a, 8h
|
||||||
SUB64 r6, r3, r2
|
SUB64 r5, r3, r2
|
||||||
ST r6, r254, 24a, 8h
|
ST r5, r254, 16a, 8h
|
||||||
BMC r5, r11, 32h
|
LD r9, r254, 88a, 8h
|
||||||
ST r1, r254, 96a, 8h
|
LD r10, r254, 40a, 8h
|
||||||
ST r1, r254, 104a, 8h
|
SUB64 r12, r10, r9
|
||||||
|
ST r12, r254, 24a, 8h
|
||||||
|
ADDI64 r3, r254, 112d
|
||||||
|
BMC r11, r3, 32h
|
||||||
|
LI64 r6, 0d
|
||||||
|
ADDI64 r9, r254, 96d
|
||||||
|
ST r6, r254, 96a, 8h
|
||||||
|
ST r6, r254, 104a, 8h
|
||||||
|
LD r1, r254, 32a, 8h
|
||||||
LD r2, r254, 96a, 8h
|
LD r2, r254, 96a, 8h
|
||||||
LD r5, r254, 32a, 8h
|
ADDI64 r9, r254, 48d
|
||||||
SUB64 r6, r2, r5
|
SUB64 r5, r2, r1
|
||||||
ST r6, r254, 48a, 8h
|
ST r5, r254, 48a, 8h
|
||||||
LD r10, r254, 40a, 8h
|
LD r10, r254, 40a, 8h
|
||||||
LD r11, r254, 104a, 8h
|
LD r11, r254, 104a, 8h
|
||||||
SUB64 r1, r11, r10
|
SUB64 r12, r11, r10
|
||||||
ST r1, r254, 56a, 8h
|
ST r12, r254, 56a, 8h
|
||||||
BMC r4, r12, 16h
|
ADDI64 r10, r9, 16d
|
||||||
LD r6, r254, 48a, 8h
|
BMC r8, r10, 16h
|
||||||
LD r8, r254, 112a, 8h
|
LD r7, r254, 112a, 8h
|
||||||
ADD64 r10, r6, r8
|
LD r8, r254, 48a, 8h
|
||||||
|
ADD64 r10, r8, r7
|
||||||
ST r10, r254, 48a, 8h
|
ST r10, r254, 48a, 8h
|
||||||
LD r2, r254, 120a, 8h
|
LD r2, r254, 120a, 8h
|
||||||
LD r3, r254, 56a, 8h
|
LD r3, r254, 56a, 8h
|
||||||
|
@ -101,11 +101,11 @@ main:
|
||||||
LD r6, r254, 72a, 8h
|
LD r6, r254, 72a, 8h
|
||||||
ADD64 r8, r5, r6
|
ADD64 r8, r5, r6
|
||||||
ST r8, r254, 72a, 8h
|
ST r8, r254, 72a, 8h
|
||||||
LD r11, r254, 48a, 8h
|
LD r12, r254, 64a, 8h
|
||||||
LD r1, r254, 64a, 8h
|
LD r1, r254, 48a, 8h
|
||||||
ADD64 r3, r1, r11
|
ADDI64 r7, r254, 152d
|
||||||
ADDI64 r8, r254, 152d
|
ADD64 r4, r12, r1
|
||||||
ST r3, r254, 152a, 8h
|
ST r4, r254, 152a, 8h
|
||||||
LD r8, r254, 72a, 8h
|
LD r8, r254, 72a, 8h
|
||||||
LD r9, r254, 56a, 8h
|
LD r9, r254, 56a, 8h
|
||||||
ADD64 r11, r8, r9
|
ADD64 r11, r8, r9
|
||||||
|
|
|
@ -1,12 +1,12 @@
|
||||||
foo:
|
foo:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -16d
|
||||||
LI32 r3, 2w
|
LI64 r3, 3d
|
||||||
LI64 r5, 3d
|
ADDI64 r2, r254, 0d
|
||||||
ADDI64 r4, r254, 0d
|
ST r3, r254, 0a, 8h
|
||||||
ST r5, r254, 0a, 8h
|
LI32 r6, 2w
|
||||||
ST r3, r254, 8a, 4h
|
ST r6, r254, 8a, 4h
|
||||||
ST r3, r254, 12a, 4h
|
ST r6, r254, 12a, 4h
|
||||||
LD r1, r4, 0a, 16h
|
LD r1, r2, 0a, 16h
|
||||||
ADDI64 r254, r254, 16d
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
|
@ -21,15 +21,15 @@ main:
|
||||||
ADDI64 r2, r254, 0d
|
ADDI64 r2, r254, 0d
|
||||||
JAL r31, r0, :foo
|
JAL r31, r0, :foo
|
||||||
ST r1, r254, 0a, 16h
|
ST r1, r254, 0a, 16h
|
||||||
LI64 r7, 7d
|
LD r2, r254, 24a, 4h
|
||||||
LD r8, r254, 12a, 4h
|
LD r7, r254, 12a, 4h
|
||||||
ANDI r9, r8, 4294967295d
|
ANDI r5, r2, 4294967295d
|
||||||
LD r5, r254, 24a, 4h
|
LD r1, r254, 32a, 8h
|
||||||
ANDI r8, r5, 4294967295d
|
ANDI r11, r7, 4294967295d
|
||||||
LD r3, r254, 32a, 8h
|
ADD64 r10, r1, r5
|
||||||
ADD64 r11, r3, r8
|
ADD64 r2, r10, r11
|
||||||
ADD64 r3, r11, r9
|
LI64 r3, 7d
|
||||||
SUB64 r1, r7, r3
|
SUB64 r1, r3, r2
|
||||||
LD r31, r254, 48a, 8h
|
LD r31, r254, 48a, 8h
|
||||||
ADDI64 r254, r254, 56d
|
ADDI64 r254, r254, 56d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
|
|
|
@ -1,21 +1,21 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -96d
|
ADDI64 r254, r254, -96d
|
||||||
ST r31, r254, 64a, 32h
|
ST r31, r254, 64a, 32h
|
||||||
LI64 r32, 3d
|
LI64 r2, 4d
|
||||||
LI64 r3, 4d
|
ADDI64 r32, r254, 48d
|
||||||
ADDI64 r33, r254, 0d
|
ST r2, r254, 48a, 8h
|
||||||
ADDI64 r34, r254, 48d
|
LI64 r33, 3d
|
||||||
ST r3, r254, 48a, 8h
|
ST r33, r254, 56a, 8h
|
||||||
ST r32, r254, 56a, 8h
|
ADDI64 r34, r254, 0d
|
||||||
LD r3, r34, 0a, 16h
|
LD r3, r32, 0a, 16h
|
||||||
JAL r31, r0, :odher_pass
|
JAL r31, r0, :odher_pass
|
||||||
ST r1, r254, 0a, 16h
|
ST r1, r254, 0a, 16h
|
||||||
ADDI64 r11, r254, 16d
|
ADDI64 r11, r254, 16d
|
||||||
|
BMC r32, r11, 16h
|
||||||
ADDI64 r2, r254, 32d
|
ADDI64 r2, r254, 32d
|
||||||
BMC r34, r11, 16h
|
BMC r34, r2, 16h
|
||||||
BMC r33, r2, 16h
|
|
||||||
LD r7, r254, 40a, 8h
|
LD r7, r254, 40a, 8h
|
||||||
JNE r7, r32, :0
|
JNE r7, r33, :0
|
||||||
JAL r31, r0, :pass
|
JAL r31, r0, :pass
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LI64 r1, 0d
|
0: LI64 r1, 0d
|
||||||
|
|
|
@ -1,8 +1,8 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -48d
|
ADDI64 r254, r254, -48d
|
||||||
ST r31, r254, 32a, 16h
|
ST r31, r254, 32a, 16h
|
||||||
LI64 r4, 0d
|
|
||||||
ADDI64 r32, r254, 16d
|
ADDI64 r32, r254, 16d
|
||||||
|
LI64 r4, 0d
|
||||||
CP r3, r4
|
CP r3, r4
|
||||||
JAL r31, r0, :maina
|
JAL r31, r0, :maina
|
||||||
ST r1, r254, 16a, 16h
|
ST r1, r254, 16a, 16h
|
||||||
|
@ -21,27 +21,27 @@ maina:
|
||||||
ADDI64 r32, r254, 36d
|
ADDI64 r32, r254, 36d
|
||||||
JAL r31, r0, :small_struct
|
JAL r31, r0, :small_struct
|
||||||
ST r1, r254, 36a, 4h
|
ST r1, r254, 36a, 4h
|
||||||
LI8 r2, 1b
|
ADDI64 r9, r254, 32d
|
||||||
LI8 r3, 3b
|
BMC r32, r9, 4h
|
||||||
LI8 r1, 0b
|
LI8 r2, 0b
|
||||||
ADDI64 r6, r254, 0d
|
ADDI64 r1, r254, 24d
|
||||||
ADDI64 r8, r6, 8d
|
ST r2, r254, 24a, 1h
|
||||||
ADDI64 r7, r254, 16d
|
ST r2, r254, 25a, 1h
|
||||||
ADDI64 r4, r254, 24d
|
ST r2, r254, 26a, 1h
|
||||||
ADDI64 r5, r254, 32d
|
LI8 r7, 3b
|
||||||
BMC r32, r5, 4h
|
ST r7, r254, 27a, 1h
|
||||||
ST r1, r254, 24a, 1h
|
LI8 r10, 1b
|
||||||
ST r1, r254, 25a, 1h
|
ST r10, r254, 28a, 1h
|
||||||
ST r1, r254, 26a, 1h
|
ST r2, r254, 29a, 1h
|
||||||
ST r3, r254, 27a, 1h
|
ST r2, r254, 30a, 1h
|
||||||
ST r2, r254, 28a, 1h
|
ST r2, r254, 31a, 1h
|
||||||
ST r1, r254, 29a, 1h
|
ADDI64 r4, r254, 16d
|
||||||
ST r1, r254, 30a, 1h
|
BMC r1, r4, 8h
|
||||||
ST r1, r254, 31a, 1h
|
ADDI64 r7, r254, 0d
|
||||||
BMC r4, r7, 8h
|
BMC r1, r7, 8h
|
||||||
BMC r4, r6, 8h
|
ADDI64 r10, r7, 8d
|
||||||
BMC r7, r8, 8h
|
BMC r4, r10, 8h
|
||||||
LD r1, r6, 0a, 16h
|
LD r1, r7, 0a, 16h
|
||||||
LD r31, r254, 40a, 16h
|
LD r31, r254, 40a, 16h
|
||||||
ADDI64 r254, r254, 56d
|
ADDI64 r254, r254, 56d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
|
|
Loading…
Reference in a new issue