Softpage improvements
This commit is contained in:
parent
600528434b
commit
d282b3d111
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@ -1,2 +1,3 @@
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[workspace]
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[workspace]
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members = ["hbasm", "hbbytecode", "hbvm"]
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resolver = "2"
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members = ["hbasm", "hbbytecode", "hbvm"]
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@ -134,34 +134,29 @@ constmod!(pub opcode(u8) {
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#[repr(packed)]
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#[repr(packed)]
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pub struct ParamBBBB(pub u8, pub u8, pub u8, pub u8);
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pub struct ParamBBBB(pub u8, pub u8, pub u8, pub u8);
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#[repr(packed)]
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#[repr(packed)]
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pub struct ParamBBB(pub u8, pub u8, pub u8);
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pub struct ParamBBB(pub u8, pub u8, pub u8);
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#[repr(packed)]
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#[repr(packed)]
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pub struct ParamBBDH(pub u8, pub u8, pub u64, pub u16);
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pub struct ParamBBDH(pub u8, pub u8, pub u64, pub u16);
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#[repr(packed)]
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#[repr(packed)]
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pub struct ParamBBD(pub u8, pub u8, pub u64);
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pub struct ParamBBD(pub u8, pub u8, pub u64);
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#[repr(packed)]
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#[repr(packed)]
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pub struct ParamBBW(pub u8, pub u8, pub u32);
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pub struct ParamBBW(pub u8, pub u8, pub u32);
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#[repr(packed)]
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#[repr(packed)]
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pub struct ParamBB(pub u8, pub u8);
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pub struct ParamBB(pub u8, pub u8);
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#[repr(packed)]
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#[repr(packed)]
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pub struct ParamBD(pub u8, pub u64);
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pub struct ParamBD(pub u8, pub u64);
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/// # Safety
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/// # Safety
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/// Has to be valid to be decoded from bytecode.
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/// Has to be valid to be decoded from bytecode.
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pub unsafe trait OpParam {}
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pub unsafe trait ProgramVal {}
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unsafe impl OpParam for ParamBBBB {}
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unsafe impl ProgramVal for ParamBBBB {}
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unsafe impl OpParam for ParamBBB {}
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unsafe impl ProgramVal for ParamBBB {}
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unsafe impl OpParam for ParamBBDH {}
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unsafe impl ProgramVal for ParamBBDH {}
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unsafe impl OpParam for ParamBBD {}
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unsafe impl ProgramVal for ParamBBD {}
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unsafe impl OpParam for ParamBBW {}
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unsafe impl ProgramVal for ParamBBW {}
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unsafe impl OpParam for ParamBB {}
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unsafe impl ProgramVal for ParamBB {}
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unsafe impl OpParam for ParamBD {}
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unsafe impl ProgramVal for ParamBD {}
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unsafe impl OpParam for u64 {}
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unsafe impl ProgramVal for u64 {}
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unsafe impl OpParam for () {}
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unsafe impl ProgramVal for u8 {} // Opcode
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unsafe impl ProgramVal for () {}
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@ -16,10 +16,11 @@ fuzz_target!(|data: &[u8]| {
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if validate(data).is_ok() {
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if validate(data).is_ok() {
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let mut vm = unsafe {
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let mut vm = unsafe {
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Vm::<_, 16384>::new(
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Vm::<_, 16384>::new(
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SoftPagedMem {
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SoftPagedMem::<_, true> {
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pf_handler: TestTrapHandler,
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pf_handler: TestTrapHandler,
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program: data,
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program: data,
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root_pt: Box::into_raw(Default::default()),
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root_pt: Box::into_raw(Default::default()),
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icache: Default::default(),
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},
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},
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0,
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0,
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)
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)
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@ -31,6 +32,8 @@ fuzz_target!(|data: &[u8]| {
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alloc_and_map(&mut vm.memory, 4096),
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alloc_and_map(&mut vm.memory, 4096),
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];
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];
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unsafe { vm.memory.write() };
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// Run VM
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// Run VM
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let _ = vm.run();
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let _ = vm.run();
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@ -38,6 +41,8 @@ fuzz_target!(|data: &[u8]| {
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for (i, page) in pages.into_iter().enumerate() {
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for (i, page) in pages.into_iter().enumerate() {
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unmap_and_dealloc(&mut vm.memory, page, i as u64 * 4096);
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unmap_and_dealloc(&mut vm.memory, page, i as u64 * 4096);
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}
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}
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let _ = unsafe { Box::from_raw(vm.memory.root_pt) };
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}
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}
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});
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});
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@ -26,7 +26,9 @@ use {
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bmc::BlockCopier,
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bmc::BlockCopier,
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core::{cmp::Ordering, mem::size_of, ops},
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core::{cmp::Ordering, mem::size_of, ops},
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derive_more::Display,
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derive_more::Display,
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hbbytecode::{OpParam, ParamBB, ParamBBB, ParamBBBB, ParamBBD, ParamBBDH, ParamBBW, ParamBD},
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hbbytecode::{
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ParamBB, ParamBBB, ParamBBBB, ParamBBD, ParamBBDH, ParamBBW, ParamBD, ProgramVal,
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},
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value::{Value, ValueVariant},
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value::{Value, ValueVariant},
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};
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};
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@ -366,7 +368,7 @@ where
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/// Decode instruction operands
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/// Decode instruction operands
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#[inline(always)]
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#[inline(always)]
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unsafe fn decode<T: OpParam>(&mut self) -> T {
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unsafe fn decode<T: ProgramVal>(&mut self) -> T {
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let pc1 = self.pc + 1;
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let pc1 = self.pc + 1;
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let data = self.memory.prog_read_unchecked::<T>(pc1 as _);
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let data = self.memory.prog_read_unchecked::<T>(pc1 as _);
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self.pc += 1 + size_of::<T>();
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self.pc += 1 + size_of::<T>();
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@ -515,13 +517,13 @@ pub trait Memory {
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///
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///
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/// # Safety
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/// # Safety
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/// - Data read have to be valid
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/// - Data read have to be valid
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unsafe fn prog_read<T>(&mut self, addr: u64) -> Option<T>;
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unsafe fn prog_read<T: ProgramVal>(&mut self, addr: u64) -> Option<T>;
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/// Read from program memory to exectue
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/// Read from program memory to exectue
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///
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///
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/// # Safety
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/// # Safety
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/// - You have to be really sure that these bytes are there, understand?
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/// - You have to be really sure that these bytes are there, understand?
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unsafe fn prog_read_unchecked<T>(&mut self, addr: u64) -> T;
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unsafe fn prog_read_unchecked<T: ProgramVal>(&mut self, addr: u64) -> T;
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}
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}
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/// Unhandled load access trap
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/// Unhandled load access trap
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@ -17,10 +17,11 @@ fn main() -> Result<(), Box<dyn std::error::Error>> {
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} else {
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} else {
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unsafe {
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unsafe {
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let mut vm = Vm::<_, 0>::new(
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let mut vm = Vm::<_, 0>::new(
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SoftPagedMem {
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SoftPagedMem::<_, true> {
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pf_handler: TestTrapHandler,
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pf_handler: TestTrapHandler,
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program: &prog,
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program: &prog,
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root_pt: Box::into_raw(Default::default()),
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root_pt: Box::into_raw(Default::default()),
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icache: Default::default(),
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},
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},
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4,
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4,
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);
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);
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@ -46,12 +47,12 @@ fn main() -> Result<(), Box<dyn std::error::Error>> {
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println!("Program interrupt: {:?}", vm.run());
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println!("Program interrupt: {:?}", vm.run());
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println!("{:?}", vm.registers);
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println!("{:?}", vm.registers);
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println!("{:?}", core::slice::from_raw_parts(data, 4096));
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std::alloc::dealloc(
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std::alloc::dealloc(
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data,
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data,
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std::alloc::Layout::from_size_align_unchecked(4096, 4096),
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std::alloc::Layout::from_size_align_unchecked(4096, 4096),
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);
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);
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vm.memory.unmap(8192).unwrap();
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vm.memory.unmap(8192).unwrap();
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let _ = Box::from_raw(vm.memory.root_pt);
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}
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}
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}
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}
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Ok(())
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Ok(())
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103
hbvm/src/mem/softpaging/icache.rs
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103
hbvm/src/mem/softpaging/icache.rs
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@ -0,0 +1,103 @@
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//! Program instruction cache
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use {
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super::{lookup::AddrPageLookuper, paging::PageTable, PageSize},
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core::{
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mem::{size_of, MaybeUninit},
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ptr::{copy_nonoverlapping, NonNull},
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},
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};
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/// Instruction cache
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#[derive(Clone, Debug)]
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pub struct ICache {
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/// Current page address base
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base: u64,
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/// Curent page pointer
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data: Option<NonNull<u8>>,
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/// Current page size
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size: PageSize,
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/// Address mask
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mask: u64,
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}
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impl Default for ICache {
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fn default() -> Self {
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Self {
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base: Default::default(),
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data: Default::default(),
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size: PageSize::Size4K,
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mask: Default::default(),
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}
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}
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}
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impl ICache {
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/// Fetch instruction from cache
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///
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/// # Safety
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/// `T` should be valid to read from instruction memory
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pub(super) unsafe fn fetch<T>(&mut self, addr: u64, root_pt: *const PageTable) -> Option<T> {
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let mut ret = MaybeUninit::<T>::uninit();
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let pbase = self
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.data
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.or_else(|| self.fetch_page(self.base.checked_add(self.size as _)?, root_pt))?;
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// Get address base
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let base = addr & self.mask;
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// Base not matching, fetch anew
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if base != self.base {
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self.fetch_page(base, root_pt)?;
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};
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let offset = addr & !self.mask;
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let requ_size = size_of::<T>();
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// Page overflow
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let rem = (offset as usize)
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.saturating_add(requ_size)
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.saturating_sub(self.size as _);
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let first_copy = requ_size.saturating_sub(rem);
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// Copy non-overflowing part
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copy_nonoverlapping(pbase.as_ptr(), ret.as_mut_ptr().cast::<u8>(), first_copy);
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// Copy overflow
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if rem != 0 {
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let pbase = self.fetch_page(self.base.checked_add(self.size as _)?, root_pt)?;
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// Unlikely, unsupported scenario
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if rem > self.size as _ {
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return None;
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}
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copy_nonoverlapping(
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pbase.as_ptr(),
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ret.as_mut_ptr().cast::<u8>().add(first_copy),
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rem,
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);
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}
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Some(ret.assume_init())
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}
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/// Fetch a page
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unsafe fn fetch_page(&mut self, addr: u64, pt: *const PageTable) -> Option<NonNull<u8>> {
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let res = AddrPageLookuper::new(addr, 0, pt).next()?.ok()?;
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if !super::perm_check::executable(res.perm) {
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return None;
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}
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(self.size, self.mask) = match res.size {
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4096 => (PageSize::Size4K, !((1 << 8) - 1)),
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2097152 => (PageSize::Size2M, !((1 << (8 * 2)) - 1)),
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1073741824 => (PageSize::Size1G, !((1 << (8 * 3)) - 1)),
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_ => return None,
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};
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self.data = Some(NonNull::new(res.ptr)?);
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self.base = addr & self.mask;
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self.data
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}
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}
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@ -111,7 +111,7 @@ impl Iterator for AddrPageLookuper {
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};
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};
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// Get available byte count in the selected page with offset
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// Get available byte count in the selected page with offset
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let avail = (size as usize - offset).clamp(0, self.size);
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let avail = (size as usize).saturating_sub(offset).clamp(0, self.size);
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self.bump(size);
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self.bump(size);
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Some(Ok(AddrPageLookupOk {
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Some(Ok(AddrPageLookupOk {
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@ -10,7 +10,7 @@ use {
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derive_more::Display,
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derive_more::Display,
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};
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};
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impl<'p, A> SoftPagedMem<'p, A> {
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impl<'p, A, const OUT_PROG_EXEC: bool> SoftPagedMem<'p, A, OUT_PROG_EXEC> {
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/// Maps host's memory into VM's memory
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/// Maps host's memory into VM's memory
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///
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///
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/// # Safety
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/// # Safety
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@ -2,6 +2,9 @@
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use core::mem::size_of;
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use core::mem::size_of;
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use self::icache::ICache;
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pub mod icache;
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pub mod lookup;
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pub mod lookup;
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pub mod paging;
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pub mod paging;
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@ -15,17 +18,25 @@ use {
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};
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};
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/// HoleyBytes software paged memory
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/// HoleyBytes software paged memory
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///
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/// - `OUT_PROG_EXEC`: set to `false` to disable executing program
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/// not contained in initially provided program, even the pages
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/// are executable
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#[derive(Clone, Debug)]
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#[derive(Clone, Debug)]
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pub struct SoftPagedMem<'p, PfH> {
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pub struct SoftPagedMem<'p, PfH, const OUT_PROG_EXEC: bool = true> {
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/// Root page table
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/// Root page table
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pub root_pt: *mut PageTable,
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pub root_pt: *mut PageTable,
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/// Page fault handler
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/// Page fault handler
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pub pf_handler: PfH,
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pub pf_handler: PfH,
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/// Program memory segment
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/// Program memory segment
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pub program: &'p [u8],
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pub program: &'p [u8],
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/// Program instruction cache
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pub icache: ICache,
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}
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}
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impl<'p, PfH: HandlePageFault> Memory for SoftPagedMem<'p, PfH> {
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impl<'p, PfH: HandlePageFault, const OUT_PROG_EXEC: bool> Memory
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for SoftPagedMem<'p, PfH, OUT_PROG_EXEC>
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{
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/// Load value from an address
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/// Load value from an address
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///
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///
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/// # Safety
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/// # Safety
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@ -65,6 +76,10 @@ impl<'p, PfH: HandlePageFault> Memory for SoftPagedMem<'p, PfH> {
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#[inline(always)]
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#[inline(always)]
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unsafe fn prog_read<T>(&mut self, addr: u64) -> Option<T> {
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unsafe fn prog_read<T>(&mut self, addr: u64) -> Option<T> {
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if OUT_PROG_EXEC && addr as usize > self.program.len() {
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return self.icache.fetch::<T>(addr, self.root_pt);
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}
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let addr = addr as usize;
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let addr = addr as usize;
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self.program
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self.program
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.get(addr..addr + size_of::<T>())
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.get(addr..addr + size_of::<T>())
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@ -73,11 +88,18 @@ impl<'p, PfH: HandlePageFault> Memory for SoftPagedMem<'p, PfH> {
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#[inline(always)]
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#[inline(always)]
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unsafe fn prog_read_unchecked<T>(&mut self, addr: u64) -> T {
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unsafe fn prog_read_unchecked<T>(&mut self, addr: u64) -> T {
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if OUT_PROG_EXEC && addr as usize > self.program.len() {
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return self
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.icache
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.fetch::<T>(addr as _, self.root_pt)
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.unwrap_or_else(|| core::mem::zeroed());
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}
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self.program.as_ptr().add(addr as _).cast::<T>().read()
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self.program.as_ptr().add(addr as _).cast::<T>().read()
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}
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}
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}
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}
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impl<'p, PfH: HandlePageFault> SoftPagedMem<'p, PfH> {
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impl<'p, PfH: HandlePageFault, const OUT_PROG_EXEC: bool> SoftPagedMem<'p, PfH, OUT_PROG_EXEC> {
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// Everyone behold, the holy function, the god of HBVM memory accesses!
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// Everyone behold, the holy function, the god of HBVM memory accesses!
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/// Split address to pages, check their permissions and feed pointers with offset
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/// Split address to pages, check their permissions and feed pointers with offset
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