From 65e05c809c4f194db96da13ffb236cdb41dd8678 Mon Sep 17 00:00:00 2001 From: Erin Date: Fri, 15 Sep 2023 08:42:56 +0200 Subject: [PATCH] Changed CMP handling and added simple JMP --- hbbytecode/hbbytecode.h | 18 +++++++-------- hbbytecode/src/lib.rs | 37 +++++++++++++++--------------- hbvm/src/vmrun.rs | 10 +++++---- spec.md | 50 +++++++++++++++++++++++------------------ 4 files changed, 62 insertions(+), 53 deletions(-) diff --git a/hbbytecode/hbbytecode.h b/hbbytecode/hbbytecode.h index c5c78afc..d59e002e 100644 --- a/hbbytecode/hbbytecode.h +++ b/hbbytecode/hbbytecode.h @@ -13,15 +13,15 @@ static_assert(CHAR_BIT == 8, "Cursed architectures are not supported"); enum hbbc_Opcode: uint8_t { - hbbc_Op_UN , hbbc_Op_TX , hbbc_Op_NOP , hbbc_Op_ADD , hbbc_Op_SUB , hbbc_Op_MUL , - hbbc_Op_AND , hbbc_Op_OR , hbbc_Op_XOR , hbbc_Op_SL , hbbc_Op_SR , hbbc_Op_SRS , - hbbc_Op_CMP , hbbc_Op_CMPU , hbbc_Op_DIR , hbbc_Op_NEG , hbbc_Op_NOT , hbbc_Op_ADDI , - hbbc_Op_MULI , hbbc_Op_ANDI , hbbc_Op_ORI , hbbc_Op_XORI , hbbc_Op_SLI , hbbc_Op_SRI , - hbbc_Op_SRSI , hbbc_Op_CMPI , hbbc_Op_CMPUI , hbbc_Op_CP , hbbc_Op_SWA , hbbc_Op_LI , - hbbc_Op_LD , hbbc_Op_ST , hbbc_Op_BMC , hbbc_Op_BRC , hbbc_Op_JMP , hbbc_Op_JEQ , - hbbc_Op_JNE , hbbc_Op_JLT , hbbc_Op_JGT , hbbc_Op_JLTU , hbbc_Op_JGTU , hbbc_Op_ECALL , - hbbc_Op_ADDF , hbbc_Op_SUBF , hbbc_Op_MULF , hbbc_Op_DIRF , hbbc_Op_FMAF , hbbc_Op_NEGF , - hbbc_Op_ITF , hbbc_Op_FTI , hbbc_Op_ADDFI , hbbc_Op_MULFI , + hbbc_Op_UN , hbbc_Op_TX , hbbc_Op_NOP , hbbc_Op_ADD , hbbc_Op_SUB , hbbc_Op_MUL , + hbbc_Op_AND , hbbc_Op_OR , hbbc_Op_XOR , hbbc_Op_SL , hbbc_Op_SR , hbbc_Op_SRS , + hbbc_Op_CMP , hbbc_Op_CMPU , hbbc_Op_DIR , hbbc_Op_NEG , hbbc_Op_NOT , hbbc_Op_ADDI , + hbbc_Op_MULI , hbbc_Op_ANDI , hbbc_Op_ORI , hbbc_Op_XORI , hbbc_Op_SLI , hbbc_Op_SRI , + hbbc_Op_SRSI , hbbc_Op_CMPI , hbbc_Op_CMPUI , hbbc_Op_CP , hbbc_Op_SWA , hbbc_Op_LI , + hbbc_Op_LD , hbbc_Op_ST , hbbc_Op_BMC , hbbc_Op_BRC , hbbc_Op_JMP , hbbc_Op_JAL , + hbbc_Op_JEQ , hbbc_Op_JNE , hbbc_Op_JLT , hbbc_Op_JGT , hbbc_Op_JLTU , hbbc_Op_JGTU , + hbbc_Op_ECALL , hbbc_Op_ADDF , hbbc_Op_SUBF , hbbc_Op_MULF , hbbc_Op_DIRF , hbbc_Op_FMAF , + hbbc_Op_NEGF , hbbc_Op_ITF , hbbc_Op_FTI , hbbc_Op_ADDFI , hbbc_Op_MULFI , } typedef hbbc_Opcode; static_assert(sizeof(hbbc_Opcode) == 1); diff --git a/hbbytecode/src/lib.rs b/hbbytecode/src/lib.rs index 3f1c14b0..fe59ee28 100644 --- a/hbbytecode/src/lib.rs +++ b/hbbytecode/src/lib.rs @@ -110,26 +110,27 @@ constmod!(pub opcode(u8) { BMC = 32, "BBD; [#0] ← [#1], imm #2 bytes"; BRC = 33, "BBB; #0 ← #1, imm #2 registers"; - JAL = 34, "BD; Copy PC to #0 and unconditional jump [#1 + imm #2]"; - JEQ = 35, "BBD; if #0 = #1 → jump imm #2"; - JNE = 36, "BBD; if #0 ≠ #1 → jump imm #2"; - JLT = 37, "BBD; if #0 < #1 → jump imm #2"; - JGT = 38, "BBD; if #0 > #1 → jump imm #2"; - JLTU = 39, "BBD; if #0 < #1 → jump imm #2 (unsigned)"; - JGTU = 40, "BBD; if #0 > #1 → jump imm #2 (unsigned)"; - ECALL = 41, "N; Issue system call"; + JMP = 34, "D; Unconditional, non-linking absolute jump"; + JAL = 35, "BD; Copy PC to #0 and unconditional jump [#1 + imm #2]"; + JEQ = 36, "BBD; if #0 = #1 → jump imm #2"; + JNE = 37, "BBD; if #0 ≠ #1 → jump imm #2"; + JLT = 38, "BBD; if #0 < #1 → jump imm #2"; + JGT = 39, "BBD; if #0 > #1 → jump imm #2"; + JLTU = 40, "BBD; if #0 < #1 → jump imm #2 (unsigned)"; + JGTU = 41, "BBD; if #0 > #1 → jump imm #2 (unsigned)"; + ECALL = 42, "N; Issue system call"; - ADDF = 42, "BBB; #0 ← #1 +. #2"; - SUBF = 43, "BBB; #0 ← #1 -. #2"; - MULF = 44, "BBB; #0 ← #1 +. #2"; - DIRF = 45, "BBBB; #0 ← #2 / #3, #1 ← #2 % #3"; - FMAF = 46, "BBBB; #0 ← (#1 * #2) + #3"; - NEGF = 47, "BB; #0 ← -#1"; - ITF = 48, "BB; #0 ← #1 as float"; - FTI = 49, "BB; #0 ← #1 as int"; + ADDF = 43, "BBB; #0 ← #1 +. #2"; + SUBF = 44, "BBB; #0 ← #1 -. #2"; + MULF = 45, "BBB; #0 ← #1 +. #2"; + DIRF = 46, "BBBB; #0 ← #2 / #3, #1 ← #2 % #3"; + FMAF = 47, "BBBB; #0 ← (#1 * #2) + #3"; + NEGF = 48, "BB; #0 ← -#1"; + ITF = 49, "BB; #0 ← #1 as float"; + FTI = 50, "BB; #0 ← #1 as int"; - ADDFI = 50, "BBD; #0 ← #1 +. imm #2"; - MULFI = 51, "BBD; #0 ← #1 *. imm #2"; + ADDFI = 51, "BBD; #0 ← #1 +. imm #2"; + MULFI = 52, "BBD; #0 ← #1 *. imm #2"; }); #[repr(packed)] diff --git a/hbvm/src/vmrun.rs b/hbvm/src/vmrun.rs index ecbeb124..10f60578 100644 --- a/hbvm/src/vmrun.rs +++ b/hbvm/src/vmrun.rs @@ -73,9 +73,9 @@ where SRS => self.binary_op(|l, r| i64::wrapping_shl(l, r as u32)), CMP => { // Compare a0 <=> a1 - // < → -1 + // < → 0 // > → 1 - // = → 0 + // = → 2 let ParamBBB(tg, a0, a1) = self.decode(); self.write_reg( @@ -83,7 +83,8 @@ where self.read_reg(a0) .cast::() .cmp(&self.read_reg(a1).cast::()) - as i64, + as i64 + + 1, ); } CMPU => { @@ -94,7 +95,8 @@ where self.read_reg(a0) .cast::() .cmp(&self.read_reg(a1).cast::()) - as i64, + as i64 + + 1, ); } NOT => { diff --git a/spec.md b/spec.md index b9aad2aa..6aee9211 100644 --- a/spec.md +++ b/spec.md @@ -56,7 +56,7 @@ | 7 | OR | Bitor | | 8 | XOR | Bitxor | | 9 | SL | Unsigned left bitshift | -| 10 | SR | Unsigned right bitshift | +| 10 | SR | Unsigned right bitshift | | 11 | SRS | Signed right bitshift | ### Comparsion @@ -68,9 +68,9 @@ #### Comparsion table | #1 *op* #2 | Result | |:----------:|:------:| -| < | -1 | -| = | 0 | -| > | 1 | +| < | 0 | +| = | 1 | +| > | 2 | ### Division-remainder - Type BBBB @@ -179,11 +179,17 @@ ## Control flow ### Unconditional jump +- Type D +| Opcode | Name | Action | +|:------:|:----:|:-------------------------------:| +| 34 | JMP | Unconditional, non-linking jump | + +### Unconditional linking jump - Type BBD | Opcode | Name | Action | |:------:|:----:|:--------------------------------------------------:| -| 34 | JAL | Save PC past JAL to `#0` and jump at `#1 + imm #2` | +| 35 | JAL | Save PC past JAL to `#0` and jump at `#1 + imm #2` | ### Conditional jumps - Type BBD @@ -191,19 +197,19 @@ | Opcode | Name | Comparsion | |:------:|:----:|:------------:| -| 35 | JEQ | = | -| 36 | JNE | ≠ | -| 37 | JLT | < (signed) | -| 38 | JGT | > (signed) | -| 39 | JLTU | < (unsigned) | -| 40 | JGTU | > (unsigned) | +| 36 | JEQ | = | +| 37 | JNE | ≠ | +| 38 | JLT | < (signed) | +| 39 | JGT | > (signed) | +| 40 | JLTU | < (unsigned) | +| 41 | JGTU | > (unsigned) | ### Environment call - Type N | Opcode | Name | Action | |:------:|:-----:|:-------------------------------------:| -| 41 | ECALL | Cause an trap to the host environment | +| 42 | ECALL | Cause an trap to the host environment | ## Floating point operations - Type BBB @@ -211,29 +217,29 @@ | Opcode | Name | Action | |:------:|:----:|:--------------:| -| 42 | ADDF | Addition | -| 43 | SUBF | Subtraction | -| 44 | MULF | Multiplication | +| 43 | ADDF | Addition | +| 44 | SUBF | Subtraction | +| 45 | MULF | Multiplication | ### Division-remainder - Type BBBB | Opcode | Name | Action | |:------:|:----:|:-------------------------:| -| 45 | DIRF | Same as for integer `DIR` | +| 46 | DIRF | Same as for integer `DIR` | ### Fused Multiply-Add - Type BBBB | Opcode | Name | Action | |:------:|:----:|:---------------------:| -| 46 | FMAF | `#0 ← (#1 * #2) + #3` | +| 47 | FMAF | `#0 ← (#1 * #2) + #3` | ### Negation - Type BB | Opcode | Name | Action | |:------:|:----:|:----------:| -| 47 | NEGF | `#0 ← -#1` | +| 48 | NEGF | `#0 ← -#1` | ### Conversion - Type BB @@ -242,8 +248,8 @@ | Opcode | Name | Action | |:------:|:----:|:------------:| -| 48 | ITF | Int to Float | -| 49 | FTI | Float to Int | +| 49 | ITF | Int to Float | +| 50 | FTI | Float to Int | ## Floating point immediate operations - Type BBD @@ -251,8 +257,8 @@ | Opcode | Name | Action | |:------:|:-----:|:--------------:| -| 50 | ADDFI | Addition | -| 51 | MULFI | Multiplication | +| 51 | ADDFI | Addition | +| 52 | MULFI | Multiplication | # Registers - There is 255 registers + one zero register (with index 0)