diff --git a/hbbytecode/src/lib.rs b/hbbytecode/src/lib.rs index 6dda4da4..3f1c14b0 100644 --- a/hbbytecode/src/lib.rs +++ b/hbbytecode/src/lib.rs @@ -35,12 +35,12 @@ macro_rules! constmod { /// - I: Immediate /// - L: Memory load / store size (u16) /// - Other types are identity-mapped -/// +/// /// # BRC special-case /// BRC's 3rd operand is plain byte, not a register. Encoding is the same, but for some cases it may matter. -/// +/// /// Please, if you distinguish in your API between byte and register, special case this one. -/// +/// /// Sorry for that :( #[macro_export] macro_rules! invoke_with_def { @@ -134,34 +134,29 @@ constmod!(pub opcode(u8) { #[repr(packed)] pub struct ParamBBBB(pub u8, pub u8, pub u8, pub u8); - #[repr(packed)] pub struct ParamBBB(pub u8, pub u8, pub u8); - #[repr(packed)] pub struct ParamBBDH(pub u8, pub u8, pub u64, pub u16); - #[repr(packed)] pub struct ParamBBD(pub u8, pub u8, pub u64); - #[repr(packed)] pub struct ParamBBW(pub u8, pub u8, pub u32); - #[repr(packed)] pub struct ParamBB(pub u8, pub u8); - #[repr(packed)] pub struct ParamBD(pub u8, pub u64); /// # Safety /// Has to be valid to be decoded from bytecode. -pub unsafe trait OpParam {} -unsafe impl OpParam for ParamBBBB {} -unsafe impl OpParam for ParamBBB {} -unsafe impl OpParam for ParamBBDH {} -unsafe impl OpParam for ParamBBD {} -unsafe impl OpParam for ParamBBW {} -unsafe impl OpParam for ParamBB {} -unsafe impl OpParam for ParamBD {} -unsafe impl OpParam for u64 {} -unsafe impl OpParam for () {} +pub unsafe trait ProgramVal {} +unsafe impl ProgramVal for ParamBBBB {} +unsafe impl ProgramVal for ParamBBB {} +unsafe impl ProgramVal for ParamBBDH {} +unsafe impl ProgramVal for ParamBBD {} +unsafe impl ProgramVal for ParamBBW {} +unsafe impl ProgramVal for ParamBB {} +unsafe impl ProgramVal for ParamBD {} +unsafe impl ProgramVal for u64 {} +unsafe impl ProgramVal for u8 {} // Opcode +unsafe impl ProgramVal for () {} diff --git a/hbvm/src/lib.rs b/hbvm/src/lib.rs index a87366b8..22d39fe7 100644 --- a/hbvm/src/lib.rs +++ b/hbvm/src/lib.rs @@ -26,7 +26,9 @@ use { bmc::BlockCopier, core::{cmp::Ordering, mem::size_of, ops}, derive_more::Display, - hbbytecode::{OpParam, ParamBB, ParamBBB, ParamBBBB, ParamBBD, ParamBBDH, ParamBBW, ParamBD}, + hbbytecode::{ + ParamBB, ParamBBB, ParamBBBB, ParamBBD, ParamBBDH, ParamBBW, ParamBD, ProgramVal, + }, value::{Value, ValueVariant}, }; @@ -366,7 +368,7 @@ where /// Decode instruction operands #[inline(always)] - unsafe fn decode(&mut self) -> T { + unsafe fn decode(&mut self) -> T { let pc1 = self.pc + 1; let data = self.memory.prog_read_unchecked::(pc1 as _); self.pc += 1 + size_of::(); @@ -515,13 +517,13 @@ pub trait Memory { /// /// # Safety /// - Data read have to be valid - unsafe fn prog_read(&mut self, addr: u64) -> Option; + unsafe fn prog_read(&mut self, addr: u64) -> Option; /// Read from program memory to exectue /// /// # Safety /// - You have to be really sure that these bytes are there, understand? - unsafe fn prog_read_unchecked(&mut self, addr: u64) -> T; + unsafe fn prog_read_unchecked(&mut self, addr: u64) -> T; } /// Unhandled load access trap diff --git a/hbvm/src/mem/softpaging/icache.rs b/hbvm/src/mem/softpaging/icache.rs index e3cfce32..049d26b0 100644 --- a/hbvm/src/mem/softpaging/icache.rs +++ b/hbvm/src/mem/softpaging/icache.rs @@ -1,7 +1,7 @@ //! Program instruction cache use { - super::{lookup::AddrPageLookuper, paging::PageTable, HandlePageFault, PageSize}, + super::{lookup::AddrPageLookuper, paging::PageTable, PageSize}, core::{ mem::{size_of, MaybeUninit}, ptr::{copy_nonoverlapping, NonNull}, @@ -37,11 +37,7 @@ impl ICache { /// /// # Safety /// `T` should be valid to read from instruction memory - pub(super) unsafe fn fetch( - &mut self, - addr: u64, - root_pt: *const PageTable, - ) -> Option { + pub(super) unsafe fn fetch(&mut self, addr: u64, root_pt: *const PageTable) -> Option { let mut ret = MaybeUninit::::uninit(); let pbase = self