From 12bb7029b4bafd1edff77ed9a12888374cc7f8be Mon Sep 17 00:00:00 2001
From: Jakub Doka <jakub.doka2@gmail.com>
Date: Sat, 16 Nov 2024 21:38:10 +0100
Subject: [PATCH] fixed float comparison in the vm

---
 lang/src/son.rs |  2 +-
 vm/src/vmrun.rs | 19 +++++++++++--------
 2 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/lang/src/son.rs b/lang/src/son.rs
index 080638e6..9208ed07 100644
--- a/lang/src/son.rs
+++ b/lang/src/son.rs
@@ -4844,7 +4844,7 @@ mod tests {
     fn generate(ident: &'static str, input: &'static str, output: &mut String) {
         _ = log::set_logger(&crate::fs::Logger);
         log::set_max_level(log::LevelFilter::Info);
-        log::set_max_level(log::LevelFilter::Trace);
+        //log::set_max_level(log::LevelFilter::Trace);
 
         let mut ctx = CodegenCtx::default();
         let (ref files, embeds) = crate::test_parse_files(ident, input, &mut ctx.parser);
diff --git a/vm/src/vmrun.rs b/vm/src/vmrun.rs
index 9e97df7d..65e9c662 100644
--- a/vm/src/vmrun.rs
+++ b/vm/src/vmrun.rs
@@ -307,10 +307,10 @@ where
                         .write_reg(tg, 1. / self.read_reg(reg).cast::<f32>())),
                     I::FINV64 => handler!(self, |OpsRR(tg, reg)| self
                         .write_reg(tg, 1. / self.read_reg(reg).cast::<f64>())),
-                    I::FCMPLT32 => self.fcmp::<f32>(Ordering::Less),
-                    I::FCMPLT64 => self.fcmp::<f64>(Ordering::Less),
-                    I::FCMPGT32 => self.fcmp::<f32>(Ordering::Greater),
-                    I::FCMPGT64 => self.fcmp::<f64>(Ordering::Greater),
+                    I::FCMPLT32 => self.fcmp::<f32>(false, Ordering::Less),
+                    I::FCMPLT64 => self.fcmp::<f64>(false, Ordering::Less),
+                    I::FCMPGT32 => self.fcmp::<f32>(true, Ordering::Greater),
+                    I::FCMPGT64 => self.fcmp::<f64>(true, Ordering::Greater),
                     I::ITF32 => handler!(self, |OpsRR(tg, reg)| self
                         .write_reg(tg, self.read_reg(reg).cast::<i64>() as f32)),
                     I::ITF64 => handler!(self, |OpsRR(tg, reg)| self
@@ -512,12 +512,15 @@ where
 
     /// Float comparsion
     #[inline(always)]
-    unsafe fn fcmp<T: PartialOrd + ValueVariant>(&mut self, nan: Ordering) {
+    unsafe fn fcmp<T: PartialOrd + ValueVariant>(&mut self, swapped: bool, expected: Ordering) {
         unsafe {
             handler!(self, |OpsRRR(tg, a0, a1)| {
-                let a0 = self.read_reg(a0).cast::<T>();
-                let a1 = self.read_reg(a1).cast::<T>();
-                self.write_reg(tg, (a0.partial_cmp(&a1).unwrap_or(nan) as i8 + 1) as u8)
+                let mut a0 = self.read_reg(a0).cast::<T>();
+                let mut a1 = self.read_reg(a1).cast::<T>();
+                if swapped {
+                    core::mem::swap(&mut a0, &mut a1);
+                }
+                self.write_reg(tg, a0.partial_cmp(&a1).map_or(false, |v| v == expected) as u8)
             });
         }
     }