From f990f05c4c13e7d6b083a0390d816408f73dbcbb Mon Sep 17 00:00:00 2001 From: able Date: Wed, 24 May 2023 08:07:29 -0500 Subject: [PATCH] Begin work on a revamped HBVM --- DESIGN_DOC.md | 63 +++++++++++++----------------------- hbvm/src/bytecode/ops.rs | 14 ++++---- hbvm/src/engine/regs.rs | 20 ++++++------ hbvm/src/engine/tests/mod.rs | 28 ++++++++++------ hbvm/src/memory.rs | 2 +- 5 files changed, 60 insertions(+), 67 deletions(-) diff --git a/DESIGN_DOC.md b/DESIGN_DOC.md index eea8b58c..5face2ed 100644 --- a/DESIGN_DOC.md +++ b/DESIGN_DOC.md @@ -1,45 +1,28 @@ -Holey Bytes has two bit widths -8 bit to help with byte level manipulation and 64 bit numbers because nothing else should ever be used in a modern setting +# Math operations +``` +MATH_OP + Add + Sub + Mul + Div + Mod +``` +``` +MATH_TYPE + Unsigned + Signed + FloatingPoint +``` -this leaves us with an amount of registers that should be defined -I'd like to use a letter and a number to represent registers -like `a0` or `d0` the first of which would be reserved for 8 bit numbers and the later of which 64 bit. - - - -holeybytes will be a load-store machine +``` +MATH_OP_SIDES + Register Constant + Register Register + Constant Constant + Constant Register +``` +`[MATH_OP] [MATH_OP_SIDES] [MATH_TYPE] [IMM_LHS] [IMM_RHS] [REG]` - -instructions -### NOP -`0` - -### ADD_8 TYPE LHS RHS LOCATION -`1` -### SUB TYPE LHS RHS LOCATION -`2` -### MUL TYPE LHS RHS LOCATION -`3` -### MUL TYPE LHS RHS LOCATION -`4` -### DIV TYPE LHS RHS LOCATION -`5` - -### JUMP ADDR -`100` -an unconditional jump to an address - -### JUMP_EQ LHS RHS ADDR -`101` -A conditional jump -if LHS is equal to RHS then jump to address -### JUMP_NEQ LHS RHS ADDR -`102` -A conditional jump -if LHS is not equal to RHS then jump to address - -### RET -pop off the callstack \ No newline at end of file diff --git a/hbvm/src/bytecode/ops.rs b/hbvm/src/bytecode/ops.rs index f82c868e..2b23ae8a 100644 --- a/hbvm/src/bytecode/ops.rs +++ b/hbvm/src/bytecode/ops.rs @@ -1,6 +1,7 @@ #[repr(u8)] pub enum Operations { NOP = 0, + ADD = 1, SUB = 2, MUL = 3, @@ -37,18 +38,19 @@ pub enum PageMapTypes { RealPage = 1, } -pub enum SubTypes { - EightBit = 1, - SixtyFourBit = 2, - Register8 = 3, - Register64 = 4, -} pub enum MathOpSubTypes { Unsigned = 0, Signed = 1, FloatingPoint = 2, } +pub enum MathOpSides { + RegisterConstant = 0, + RegisterRegister = 1, + ConstantConstant = 2, + ConstantRegister = 3, +} + pub enum RWSubTypes { AddrToReg = 0, RegToAddr, diff --git a/hbvm/src/engine/regs.rs b/hbvm/src/engine/regs.rs index 84427dd0..11d51c0a 100644 --- a/hbvm/src/engine/regs.rs +++ b/hbvm/src/engine/regs.rs @@ -1,16 +1,16 @@ #[rustfmt::skip] #[derive(Debug, Clone, Copy)] pub struct Registers { - pub a0: u8, pub b0: u8, pub c0: u8, pub d0: u64, pub e0: u64, pub f0: u64, - pub a1: u8, pub b1: u8, pub c1: u8, pub d1: u64, pub e1: u64, pub f1: u64, - pub a2: u8, pub b2: u8, pub c2: u8, pub d2: u64, pub e2: u64, pub f2: u64, - pub a3: u8, pub b3: u8, pub c3: u8, pub d3: u64, pub e3: u64, pub f3: u64, - pub a4: u8, pub b4: u8, pub c4: u8, pub d4: u64, pub e4: u64, pub f4: u64, - pub a5: u8, pub b5: u8, pub c5: u8, pub d5: u64, pub e5: u64, pub f5: u64, - pub a6: u8, pub b6: u8, pub c6: u8, pub d6: u64, pub e6: u64, pub f6: u64, - pub a7: u8, pub b7: u8, pub c7: u8, pub d7: u64, pub e7: u64, pub f7: u64, - pub a8: u8, pub b8: u8, pub c8: u8, pub d8: u64, pub e8: u64, pub f8: u64, - pub a9: u8, pub b9: u8, pub c9: u8, pub d9: u64, pub e9: u64, pub f9: u64, + pub a0: u64, pub b0: u64, pub c0: u64, pub d0: u64, pub e0: u64, pub f0: u64, + pub a1: u64, pub b1: u64, pub c1: u64, pub d1: u64, pub e1: u64, pub f1: u64, + pub a2: u64, pub b2: u64, pub c2: u64, pub d2: u64, pub e2: u64, pub f2: u64, + pub a3: u64, pub b3: u64, pub c3: u64, pub d3: u64, pub e3: u64, pub f3: u64, + pub a4: u64, pub b4: u64, pub c4: u64, pub d4: u64, pub e4: u64, pub f4: u64, + pub a5: u64, pub b5: u64, pub c5: u64, pub d5: u64, pub e5: u64, pub f5: u64, + pub a6: u64, pub b6: u64, pub c6: u64, pub d6: u64, pub e6: u64, pub f6: u64, + pub a7: u64, pub b7: u64, pub c7: u64, pub d7: u64, pub e7: u64, pub f7: u64, + pub a8: u64, pub b8: u64, pub c8: u64, pub d8: u64, pub e8: u64, pub f8: u64, + pub a9: u64, pub b9: u64, pub c9: u64, pub d9: u64, pub e9: u64, pub f9: u64, } impl Registers { diff --git a/hbvm/src/engine/tests/mod.rs b/hbvm/src/engine/tests/mod.rs index 11ff7a04..6049a562 100644 --- a/hbvm/src/engine/tests/mod.rs +++ b/hbvm/src/engine/tests/mod.rs @@ -7,10 +7,10 @@ use { #[test] fn invalid_program() { - let prog = vec![1, 23]; + let prog = vec![1, 0]; let mut eng = Engine::new(prog); let ret = eng.run(); - assert_eq!(ret, Err(InvalidOpcodePair(1, 23))); + assert_eq!(ret, Err(InvalidOpcodePair(1, 0))); } #[test] @@ -52,9 +52,9 @@ fn invalid_system_call() { #[test] fn add_u8() { - use crate::bytecode::ops::{Operations::ADD, SubTypes::EightBit}; + use crate::bytecode::ops::{MathOpSides::ConstantConstant, Operations::ADD}; - let prog = vec![ADD as u8, EightBit as u8, 1, 1, 0xA0]; + let prog = vec![ADD as u8, ConstantConstant as u8, 100, 98, 0xA0]; let mut eng = Engine::new(prog); let _ = eng.run(); assert_eq!(eng.registers.a0, 2); @@ -62,18 +62,18 @@ fn add_u8() { #[test] fn sub_u8() { - use crate::bytecode::ops::{Operations::SUB, SubTypes::EightBit}; + use crate::bytecode::ops::Operations::SUB; - let prog = vec![SUB as u8, EightBit as u8, 2, 1, 0xA0]; + let prog = vec![SUB as u8]; let mut eng = Engine::new(prog); let _ = eng.run(); assert_eq!(eng.registers.a0, 1); } #[test] fn mul_u8() { - use crate::bytecode::ops::{Operations::MUL, SubTypes::EightBit}; + use crate::bytecode::ops::{MathOpSides::ConstantConstant, Operations::MUL}; - let prog = vec![MUL as u8, EightBit as u8, 1, 1, 0xA0]; + let prog = vec![MUL as u8, ConstantConstant as u8, 1, 2, 0xA0]; let mut eng = Engine::new(prog); let _ = eng.run(); assert_eq!(eng.registers.a0, 2); @@ -81,9 +81,9 @@ fn mul_u8() { #[test] fn div_u8() { - use crate::bytecode::ops::{Operations::DIV, SubTypes::EightBit}; + use crate::bytecode::ops::Operations::DIV; - let prog = vec![DIV as u8, EightBit as u8, 1, 1, 0xA0]; + let prog = vec![DIV as u8]; let mut eng = Engine::new(prog); let _ = eng.run(); assert_eq!(eng.registers.a0, 2); @@ -123,3 +123,11 @@ fn set_memory_8() { let ret = eng.memory.set_addr8(256, 1); assert_eq!(ret, Ok(())); } + +#[test] +fn set_memory_64() { + let prog = vec![]; + let mut eng = Engine::new(prog); + let ret = eng.memory.set_addr64(256, 1); + assert_eq!(ret, Ok(())); +} diff --git a/hbvm/src/memory.rs b/hbvm/src/memory.rs index 4477c1ea..5d7425d9 100644 --- a/hbvm/src/memory.rs +++ b/hbvm/src/memory.rs @@ -60,7 +60,7 @@ impl Memory { } Ok(()) } - pub fn set_addr64(&mut self, address: u64, value: u64) -> u64 { + pub fn set_addr64(&mut self, address: u64, value: u64) -> Result<(), RuntimeErrors> { unimplemented!() } }