forked from AbleOS/holey-bytes
374 lines
14 KiB
Rust
374 lines
14 KiB
Rust
//! HoleyBytes Virtual Machine
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//!
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//! All unsafe code here should be sound, if input bytecode passes validation.
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// # General safety notice:
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// - Validation has to assure there is 256 registers (r0 - r255)
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// - Instructions have to be valid as specified (values and sizes)
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// - Mapped pages should be at least 4 KiB
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// - Yes, I am aware of the UB when jumping in-mid of instruction where
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// the read byte corresponds to an instruction whose lenght exceets the
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// program size. If you are (rightfully) worried about the UB, for now just
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// append your program with 11 zeroes.
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use self::trap::HandleTrap;
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pub mod mem;
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pub mod trap;
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pub mod value;
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use {
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crate::validate,
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core::ops,
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hbbytecode::{OpParam, ParamBB, ParamBBB, ParamBBBB, ParamBBD, ParamBBDH, ParamBD},
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mem::Memory,
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static_assertions::assert_impl_one,
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value::Value,
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};
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/// Extract a parameter from program
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macro_rules! param {
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($self:expr, $ty:ty) => {{
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assert_impl_one!($ty: OpParam);
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let data = $self
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.program
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.as_ptr()
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.add($self.pc + 1)
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.cast::<$ty>()
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.read();
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$self.pc += 1 + core::mem::size_of::<$ty>();
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data
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}};
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}
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/// Perform binary operation `#0 ← #1 OP #2`
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macro_rules! binary_op {
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($self:expr, $ty:ident, $handler:expr) => {{
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let ParamBBB(tg, a0, a1) = param!($self, ParamBBB);
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$self.write_reg(
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tg,
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$handler(
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Value::$ty(&$self.read_reg(a0)),
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Value::$ty(&$self.read_reg(a1)),
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),
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);
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}};
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}
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/// Perform binary operation with immediate `#0 ← #1 OP imm #2`
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macro_rules! binary_op_imm {
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($self:expr, $ty:ident, $handler:expr) => {{
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let ParamBBD(tg, a0, imm) = param!($self, ParamBBD);
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$self.write_reg(
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tg,
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$handler(Value::$ty(&$self.read_reg(a0)), Value::$ty(&imm.into())),
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);
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}};
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}
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/// Jump at `#3` if ordering on `#0 <=> #1` is equal to expected
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macro_rules! cond_jump {
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($self:expr, $ty:ident, $expected:ident) => {{
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let ParamBBD(a0, a1, jt) = param!($self, ParamBBD);
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if core::cmp::Ord::cmp(&$self.read_reg(a0).as_u64(), &$self.read_reg(a1).as_u64())
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== core::cmp::Ordering::$expected
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{
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$self.pc = jt as usize;
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}
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}};
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}
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/// HoleyBytes Virtual Machine
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pub struct Vm<'a, T, const TIMER_QUOTIENT: usize> {
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/// Holds 256 registers
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///
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/// Writing to register 0 is considered undefined behaviour
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/// in terms of HoleyBytes program execution
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pub registers: [Value; 256],
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/// Memory implementation
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pub memory: Memory,
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/// Trap handler
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pub traph: T,
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// Program counter
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pc: usize,
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/// Program
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program: &'a [u8],
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/// Program timer
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timer: usize,
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}
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impl<'a, T: HandleTrap, const TIMER_QUOTIENT: usize> Vm<'a, T, TIMER_QUOTIENT> {
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/// Create a new VM with program and trap handler
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///
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/// # Safety
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/// Program code has to be validated
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pub unsafe fn new_unchecked(program: &'a [u8], traph: T) -> Self {
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Self {
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registers: [Value::from(0_u64); 256],
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memory: Default::default(),
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traph,
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pc: 0,
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program,
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timer: 0,
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}
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}
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/// Create a new VM with program and trap handler only if it passes validation
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pub fn new_validated(program: &'a [u8], traph: T) -> Result<Self, validate::Error> {
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validate::validate(program)?;
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Ok(unsafe { Self::new_unchecked(program, traph) })
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}
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/// Execute program
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///
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/// Program can return [`VmRunError`] if a trap handling failed
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pub fn run(&mut self) -> Result<VmRunOk, VmRunError> {
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use hbbytecode::opcode::*;
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loop {
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// Fetch instruction
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let Some(&opcode) = self.program.get(self.pc)
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else { return Ok(VmRunOk::End) };
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// Big match
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unsafe {
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match opcode {
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NOP => param!(self, ()),
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ADD => binary_op!(self, as_u64, u64::wrapping_add),
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SUB => binary_op!(self, as_u64, u64::wrapping_sub),
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MUL => binary_op!(self, as_u64, u64::wrapping_mul),
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AND => binary_op!(self, as_u64, ops::BitAnd::bitand),
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OR => binary_op!(self, as_u64, ops::BitOr::bitor),
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XOR => binary_op!(self, as_u64, ops::BitXor::bitxor),
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SL => binary_op!(self, as_u64, ops::Shl::shl),
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SR => binary_op!(self, as_u64, ops::Shr::shr),
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SRS => binary_op!(self, as_i64, ops::Shr::shr),
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CMP => {
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let ParamBBB(tg, a0, a1) = param!(self, ParamBBB);
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self.write_reg(
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tg,
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self.read_reg(a0).as_i64().cmp(&self.read_reg(a1).as_i64()) as i64,
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);
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}
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CMPU => {
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let ParamBBB(tg, a0, a1) = param!(self, ParamBBB);
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self.write_reg(
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tg,
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self.read_reg(a0).as_u64().cmp(&self.read_reg(a1).as_u64()) as i64,
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);
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}
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NOT => {
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let param = param!(self, ParamBB);
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self.write_reg(param.0, !self.read_reg(param.1).as_u64());
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}
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NEG => {
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let param = param!(self, ParamBB);
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self.write_reg(
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param.0,
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match self.read_reg(param.1).as_u64() {
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0 => 1_u64,
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_ => 0,
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},
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);
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}
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DIR => {
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let ParamBBBB(dt, rt, a0, a1) = param!(self, ParamBBBB);
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let a0 = self.read_reg(a0).as_u64();
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let a1 = self.read_reg(a1).as_u64();
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self.write_reg(dt, a0.checked_div(a1).unwrap_or(u64::MAX));
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self.write_reg(rt, a0.checked_rem(a1).unwrap_or(u64::MAX));
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}
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ADDI => binary_op_imm!(self, as_u64, ops::Add::add),
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MULI => binary_op_imm!(self, as_u64, ops::Mul::mul),
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ANDI => binary_op_imm!(self, as_u64, ops::BitAnd::bitand),
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ORI => binary_op_imm!(self, as_u64, ops::BitOr::bitor),
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XORI => binary_op_imm!(self, as_u64, ops::BitXor::bitxor),
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SLI => binary_op_imm!(self, as_u64, ops::Shl::shl),
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SRI => binary_op_imm!(self, as_u64, ops::Shr::shr),
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SRSI => binary_op_imm!(self, as_i64, ops::Shr::shr),
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CMPI => {
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let ParamBBD(tg, a0, imm) = param!(self, ParamBBD);
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self.write_reg(
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tg,
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self.read_reg(a0).as_i64().cmp(&Value::from(imm).as_i64()) as i64,
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);
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}
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CMPUI => {
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let ParamBBD(tg, a0, imm) = param!(self, ParamBBD);
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self.write_reg(tg, self.read_reg(a0).as_u64().cmp(&imm) as i64);
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}
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CP => {
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let param = param!(self, ParamBB);
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self.write_reg(param.0, self.read_reg(param.1));
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}
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SWA => {
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let ParamBB(src, dst) = param!(self, ParamBB);
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if src + dst != 0 {
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core::ptr::swap(
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self.registers.get_unchecked_mut(usize::from(src)),
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self.registers.get_unchecked_mut(usize::from(dst)),
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);
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}
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}
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LI => {
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let param = param!(self, ParamBD);
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self.write_reg(param.0, param.1);
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}
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LD => {
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let ParamBBDH(dst, base, off, count) = param!(self, ParamBBDH);
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let n: usize = match dst {
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0 => 1,
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_ => 0,
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};
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self.memory.load(
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self.read_reg(base).as_u64() + off + n as u64,
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self.registers.as_mut_ptr().add(usize::from(dst) + n).cast(),
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usize::from(count).saturating_sub(n),
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&mut self.traph,
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)?;
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}
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ST => {
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let ParamBBDH(dst, base, off, count) = param!(self, ParamBBDH);
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self.memory.store(
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self.read_reg(base).as_u64() + off,
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self.registers.as_ptr().add(usize::from(dst)).cast(),
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count.into(),
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&mut self.traph,
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)?;
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}
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BMC => {
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let ParamBBD(src, dst, count) = param!(self, ParamBBD);
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self.memory.block_copy(
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self.read_reg(src).as_u64(),
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self.read_reg(dst).as_u64(),
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count as _,
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&mut self.traph,
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)?;
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}
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BRC => {
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let ParamBBB(src, dst, count) = param!(self, ParamBBB);
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core::ptr::copy(
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self.registers.get_unchecked(usize::from(src)),
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self.registers.get_unchecked_mut(usize::from(dst)),
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usize::from(count * 8),
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);
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}
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JMP => {
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let ParamBD(reg, offset) = param!(self, ParamBD);
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self.pc = (self.read_reg(reg).as_u64() + offset) as usize;
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}
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JEQ => cond_jump!(self, int, Equal),
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JNE => {
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let ParamBBD(a0, a1, jt) = param!(self, ParamBBD);
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if self.read_reg(a0).as_u64() != self.read_reg(a1).as_u64() {
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self.pc = jt as usize;
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}
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}
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JLT => cond_jump!(self, int, Less),
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JGT => cond_jump!(self, int, Greater),
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JLTU => cond_jump!(self, sint, Less),
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JGTU => cond_jump!(self, sint, Greater),
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ECALL => {
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param!(self, ());
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self.traph
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.ecall(&mut self.registers, &mut self.pc, &mut self.memory);
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}
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ADDF => binary_op!(self, as_f64, ops::Add::add),
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SUBF => binary_op!(self, as_f64, ops::Sub::sub),
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MULF => binary_op!(self, as_f64, ops::Mul::mul),
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DIRF => {
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let ParamBBBB(dt, rt, a0, a1) = param!(self, ParamBBBB);
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let a0 = self.read_reg(a0).as_f64();
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let a1 = self.read_reg(a1).as_f64();
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self.write_reg(dt, a0 / a1);
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self.write_reg(rt, a0 % a1);
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}
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FMAF => {
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let ParamBBBB(dt, a0, a1, a2) = param!(self, ParamBBBB);
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self.write_reg(
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dt,
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self.read_reg(a0).as_f64() * self.read_reg(a1).as_f64()
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+ self.read_reg(a2).as_f64(),
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);
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}
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NEGF => {
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let ParamBB(dt, a0) = param!(self, ParamBB);
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self.write_reg(dt, -self.read_reg(a0).as_f64());
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}
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ITF => {
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let ParamBB(dt, a0) = param!(self, ParamBB);
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self.write_reg(dt, self.read_reg(a0).as_i64() as f64);
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}
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FTI => {
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let ParamBB(dt, a0) = param!(self, ParamBB);
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self.write_reg(dt, self.read_reg(a0).as_f64() as i64);
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}
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ADDFI => binary_op_imm!(self, as_f64, ops::Add::add),
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MULFI => binary_op_imm!(self, as_f64, ops::Mul::mul),
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op => {
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if !self.traph.invalid_op(
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&mut self.registers,
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&mut self.pc,
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&mut self.memory,
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op,
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) {
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return Err(VmRunError::InvalidOpcodeEx(op));
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}
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}
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}
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}
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if TIMER_QUOTIENT != 0 {
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self.timer = self.timer.wrapping_add(1);
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if self.timer % TIMER_QUOTIENT == 0 {
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return Ok(VmRunOk::Timer);
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}
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}
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}
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}
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/// Read register
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#[inline]
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unsafe fn read_reg(&self, n: u8) -> Value {
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*self.registers.get_unchecked(n as usize)
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}
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/// Write a register.
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/// Writing to register 0 is no-op.
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#[inline]
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unsafe fn write_reg(&mut self, n: u8, value: impl Into<Value>) {
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if n != 0 {
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*self.registers.get_unchecked_mut(n as usize) = value.into();
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}
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}
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}
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/// Virtual machine halt error
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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#[repr(u8)]
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pub enum VmRunError {
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/// Unhandled invalid opcode exceptions
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InvalidOpcodeEx(u8),
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/// Unhandled load access exception
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LoadAccessEx(u64),
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/// Unhandled store access exception
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StoreAccessEx(u64),
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}
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/// Virtual machine halt ok
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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pub enum VmRunOk {
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/// Program has eached its end
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End,
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/// Program was interrupted by a timer
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Timer,
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}
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