diff --git a/ableos/src/arch/x86_64/drivers/sysinfo.rs b/ableos/src/arch/x86_64/drivers/sysinfo.rs
index 05ca9da6..f7fef882 100644
--- a/ableos/src/arch/x86_64/drivers/sysinfo.rs
+++ b/ableos/src/arch/x86_64/drivers/sysinfo.rs
@@ -16,7 +16,6 @@
     not(any(target_arch = "x86_64", target_arch = "x86")),
     allow(dead_code)
 )]
-pub fn sysinfo() {}
 
 use core::arch::asm;
 use core::ops::Deref;
@@ -74,52 +73,6 @@ pub enum RequestType {
     PhysicalAddressSize = 0x80000008,
 }
 
-pub fn cpuid(code: RequestType) -> (u32, u32, u32, u32) {
-    let eax;
-    let ebx;
-    let ecx;
-    let edx;
-
-    unsafe {
-        asm!(
-            "movq %rbx, {0:r}",
-            "cpuid",
-            "xchgq %rbx, {0:r}",
-            lateout(reg) ebx,
-            inlateout("eax") code as u32 => eax,
-            inlateout("ecx") 0 => ecx,
-            lateout("edx") edx,
-            options(nostack, preserves_flags, att_syntax),
-        );
-    }
-
-    (eax, ebx, ecx, edx)
-}
-
-/// The main entrypoint to the CPU information
-#[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
-pub fn master() -> Option<Master> {
-    Some(Master::new())
-}
-
-// This matches the Intel Architecture guide, with bits 31 -> 0.
-// The bit positions are inclusive.
-fn bits_of(val: u32, start_bit: u8, end_bit: u8) -> u32 {
-    let mut silly = 0;
-    for _ in start_bit..end_bit + 1 {
-        silly <<= 1;
-        silly |= 1;
-    }
-
-    (val >> start_bit) & silly
-}
-
-pub fn as_bytes(v: &u32) -> &[u8] {
-    let start = v as *const u32 as *const u8;
-    // TODO: use u32::BYTES
-    unsafe { slice::from_raw_parts(start, 4) }
-}
-
 #[derive(Copy, Clone)]
 pub struct VersionInformation {
     eax: u32,
@@ -930,6 +883,54 @@ impl Default for Master {
     }
 }
 
+/// The main entrypoint to the CPU information
+#[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
+pub fn master() -> Option<Master> {
+    Some(Master::new())
+}
+
+pub fn sysinfo() {}
+
+pub fn as_bytes(v: &u32) -> &[u8] {
+    let start = v as *const u32 as *const u8;
+    // TODO: use u32::BYTES
+    unsafe { slice::from_raw_parts(start, 4) }
+}
+
+pub fn cpuid(code: RequestType) -> (u32, u32, u32, u32) {
+    let eax;
+    let ebx;
+    let ecx;
+    let edx;
+
+    unsafe {
+        asm!(
+            "movq %rbx, {0:r}",
+            "cpuid",
+            "xchgq %rbx, {0:r}",
+            lateout(reg) ebx,
+            inlateout("eax") code as u32 => eax,
+            inlateout("ecx") 0 => ecx,
+            lateout("edx") edx,
+            options(nostack, preserves_flags, att_syntax),
+        );
+    }
+
+    (eax, ebx, ecx, edx)
+}
+
+// This matches the Intel Architecture guide, with bits 31 -> 0.
+// The bit positions are inclusive.
+fn bits_of(val: u32, start_bit: u8, end_bit: u8) -> u32 {
+    let mut silly = 0;
+    for _ in start_bit..end_bit + 1 {
+        silly <<= 1;
+        silly |= 1;
+    }
+
+    (val >> start_bit) & silly
+}
+
 /*
 cfg_if! {
     if #[cfg(any(target_arch = "x86_64", target_arch = "x86"))] {
diff --git a/ableos/src/experiments/kinfo.rs b/ableos/src/experiments/kinfo.rs
index c729f341..46646db5 100644
--- a/ableos/src/experiments/kinfo.rs
+++ b/ableos/src/experiments/kinfo.rs
@@ -1,8 +1,6 @@
-use core::fmt::Display;
-
-use crate::{arch::drivers::sysinfo::master, ALLOCATOR};
-
 use super::systeminfo::SystemMemory;
+use crate::{arch::drivers::sysinfo::master, ALLOCATOR};
+use core::fmt::Display;
 use versioning::Version;
 use x86_64::instructions::interrupts::{disable, enable};
 
diff --git a/ableos/src/lib.rs b/ableos/src/lib.rs
index 36add599..911b3e33 100644
--- a/ableos/src/lib.rs
+++ b/ableos/src/lib.rs
@@ -7,8 +7,7 @@
 #![feature(abi_x86_interrupt)]
 #![feature(alloc_error_handler)]
 #![feature(prelude_import)]
-// Needed for riscv
-#![feature(asm_sym)]
+#![feature(asm_sym)] // Needed for riscv
 #![feature(naked_functions)]
 
 #[macro_use]
diff --git a/ableos/src/rhai_shell/mod.rs b/ableos/src/rhai_shell/mod.rs
index 6582abc4..20421428 100644
--- a/ableos/src/rhai_shell/mod.rs
+++ b/ableos/src/rhai_shell/mod.rs
@@ -1,5 +1,4 @@
-use crate::arch::drivers::sysinfo::{master, sysinfo};
-
+use crate::arch::drivers::sysinfo::master;
 use crate::filesystem::FILE_SYSTEM;
 use crate::time::fetch_time;
 use crate::wasm_jumploader::interp;
diff --git a/ableos/src/wasm_jumploader/host_functions.rs b/ableos/src/wasm_jumploader/host_functions.rs
index adcf4733..81910eb0 100644
--- a/ableos/src/wasm_jumploader/host_functions.rs
+++ b/ableos/src/wasm_jumploader/host_functions.rs
@@ -167,8 +167,7 @@ impl Externals for HostExternals {
             }
 
             GET_INPUT_INDEX => {
-                let input = 
-                // None;
+                let input = None;
                 x86_64::instructions::interrupts::without_interrupts(|| KEYBUFF.lock().pop());
                 if let Some(chr) = input {
                     trace!("SYSCALL: input: {}", chr);
diff --git a/shadeable/src/lib.rs b/shadeable/src/lib.rs
index 68baa3dc..3979e806 100644
--- a/shadeable/src/lib.rs
+++ b/shadeable/src/lib.rs
@@ -6,9 +6,9 @@ pub mod pixel_format;
 mod engine_internals;
 
 use alloc::boxed::Box;
+use core::result::Result;
 use engine_internals::engine_startup;
 use pixel_format::Rgba64;
-use core::result::Result;
 use rhai::{EvalAltResult, Scope};
 
 pub const SHADER: &str = include_str!("../shaders/simple.shade");