forked from AbleOS/ableos
IDE: Implement writing using Bus Mastering DMA
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9329059510
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@ -76,9 +76,15 @@ const CMD_IDENTIFY: u8 = 0xEC;
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/// ATA read using LBA28 DMA command
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const CMD_READ_DMA: u8 = 0xC8;
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/// ATA write using LBA28 DMA command
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const CMD_WRITE_DMA: u8 = 0xCA;
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/// ATA read using LBA48 DMA command
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const CMD_READ_DMA_EXT: u8 = 0x25;
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/// ATA write using LBA48 DMA command
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const CMD_WRITE_DMA_EXT: u8 = 0x35;
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pub struct PciIde {
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device_info: PciDeviceInfo,
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ide_devices: Vec<IdeDevice>,
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@ -311,14 +317,14 @@ impl PciIde {
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loop {
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let status = unsafe { self.bmi_status(channel) };
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// FIXME: error handling
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// Bit 2 (INT) set?
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if (status >> 2) & 1 == 1 {
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break;
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}
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}
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// FIXME: error handling
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unsafe {
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// Stop DMA
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self.stop(channel);
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@ -335,6 +341,91 @@ impl PciIde {
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Ok(())
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}
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pub fn write(
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&mut self,
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channel: Channel,
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drive: Drive,
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lba: u64,
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data: &[u8],
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) -> Result<(), TryFromIntError> {
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// FIXME: make this an error
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assert!(data.len() % SECTOR_SIZE as usize == 0);
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let lba48_support = self
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.ide_devices
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.iter()
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.find(|d| d.channel == channel && d.drive == drive)
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.map(|d| d.lba48_support)
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.unwrap(); // FIXME: make this an error
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let lba48 = lba > 0xFFFFFFF && lba48_support;
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// FIXME: make this an error
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assert!((lba48 && lba > 0xFFFFFFF) || (!lba48 && lba <= 0xFFFFFFF));
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let byte_count = data.len() as u16;
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let sector_count = byte_count / SECTOR_SIZE;
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// prepare PRD table
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let prd = PRDT_START as *mut PhysRegionDescriptor;
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unsafe {
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(*prd).data_buffer = self.buffer_frames.as_ref().unwrap()[0]
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.start_address()
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.as_u64()
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.try_into()?;
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(*prd).byte_count = byte_count;
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// this is the end of table
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(*prd).eot = 1 << 7;
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// this byte is reserved, we should probably set it to 0
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(*prd)._0 = 0;
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}
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// copy the data over to the DMA buffer
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for i in 0..byte_count {
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let addr = (BUFFER_START + i as u64) as *mut u8;
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unsafe {
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*addr = *data.get(i as usize).unwrap_or(&0);
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}
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}
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unsafe {
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self.load_prdt(channel);
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self.stop(channel);
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self.set_write(channel);
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self.clear_bmi_status(channel);
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select_drive(drive, channel);
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set_lba(channel, lba, sector_count, lba48);
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if lba48 {
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ata_send_command(CMD_WRITE_DMA_EXT, channel);
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} else {
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ata_send_command(CMD_WRITE_DMA, channel);
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}
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self.start(channel);
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}
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loop {
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let status = unsafe { self.bmi_status(channel) };
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// FIXME: error handling
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// Bit 2 (INT) set?
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if (status >> 2) & 1 == 1 {
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break;
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}
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}
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unsafe {
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// Stop DMA
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self.stop(channel);
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// Clear the interrupt bit
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self.clear_bmi_status(channel);
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}
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Ok(())
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}
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pub fn device_info(&self) -> PciDeviceInfo {
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self.device_info
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}
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