Testing performance with different write modes
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@ -41,6 +41,12 @@ pub enum Color16Bit {
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White = 0xF,
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}
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impl From<Color16Bit> for u8 {
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fn from(value: Color16Bit) -> u8 {
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value as u8
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}
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}
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/// Represents a color for vga text modes.
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#[derive(Debug, Copy, Clone)]
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#[repr(transparent)]
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32
src/vga.rs
32
src/vga.rs
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@ -1,7 +1,7 @@
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//! Provides access to the vga graphics card.
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use super::{
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colors::PALETTE_SIZE,
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colors::{Color16Bit, PALETTE_SIZE},
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configurations::{
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VgaConfiguration, MODE_40X25_CONFIGURATION, MODE_40X50_CONFIGURATION,
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MODE_640X480X16_CONFIGURATION, MODE_80X25_CONFIGURATION,
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@ -89,6 +89,8 @@ impl From<ReadPlane> for u8 {
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bitflags! {
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/// Represents the plane masks of the `SequencerIndex::PlaneMask` register.
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pub struct PlaneMask: u8 {
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/// Represents none of the plane masks of vga memory.
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const NONE = 0b0000_0000;
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/// Represents `Plane0` of vga memory.
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const PLANE0 = 0b0000_0001;
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/// Represents `Plane1` of vga memory.
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@ -97,7 +99,7 @@ bitflags! {
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const PLANE2 = 0b0000_0100;
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/// Represents `Plane3` of vga memory.
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const PLANE3 = 0b0000_1000;
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/// Represents a combination of all the plane masks.
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/// Represents all of the plane masks of vga memory.
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const ALL_PLANES = Self::PLANE0.bits() | Self::PLANE1.bits() | Self::PLANE2.bits() | Self::PLANE3.bits();
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}
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}
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@ -351,6 +353,32 @@ impl Vga {
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.write(GraphicsControllerIndex::ReadPlaneSelect, read_plane);
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}
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/// Sets the value to use for `GraphicsControllerIndex::SetReset`,
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/// as spcified by `color`.
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pub fn set_graphics_set_reset(&mut self, color: Color16Bit) {
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let original_value = self
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.graphics_controller_registers
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.read(GraphicsControllerIndex::SetReset)
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& 0xF0;
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self.graphics_controller_registers.write(
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GraphicsControllerIndex::SetReset,
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original_value | u8::from(color),
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);
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}
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/// Sets which planes are effected by `GraphicsControllerIndex::SetReset`,
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/// as specified by `plane_mask`.
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pub fn set_graphics_enable_set_reset(&mut self, plane_mask: PlaneMask) {
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let original_value = self
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.graphics_controller_registers
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.read(GraphicsControllerIndex::EnableSetReset)
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& 0xF0;
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self.graphics_controller_registers.write(
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GraphicsControllerIndex::EnableSetReset,
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original_value | u8::from(plane_mask),
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);
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}
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fn set_registers(&mut self, configuration: &VgaConfiguration) {
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let emulation_mode = self.get_emulation_mode();
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@ -2,7 +2,6 @@ use crate::{
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colors::{Color16Bit, DEFAULT_PALETTE},
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vga::{PlaneMask, Vga, VideoMode, VGA},
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};
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use core::convert::TryInto;
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use spinning_top::SpinlockGuard;
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const WIDTH: usize = 640;
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@ -36,6 +35,7 @@ impl Graphics640x480x16 {
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pub fn clear_screen(&self) {
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let (mut vga, frame_buffer) = self.get_frame_buffer();
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vga.set_plane_mask(PlaneMask::ALL_PLANES);
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vga.set_graphics_enable_set_reset(PlaneMask::NONE);
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for offset in 0..ALL_PLANES_SCREEN_SIZE {
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unsafe {
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frame_buffer
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@ -50,24 +50,20 @@ impl Graphics640x480x16 {
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let (mut vga, frame_buffer) = self.get_frame_buffer();
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let offset = x / 8 + (WIDTH / 8) * y;
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// Store the current value for masking.
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let x = x & 7;
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let mask = 0x80 >> (x & 7);
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let mut plane_mask = 0x01;
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// Write to all 4 planes
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vga.set_plane_mask(PlaneMask::ALL_PLANES);
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for plane in 0u8..4u8 {
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vga.set_read_plane(plane.try_into().unwrap());
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vga.set_plane_mask(plane.try_into().unwrap());
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let current_value = unsafe { frame_buffer.add(offset).read_volatile() };
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let new_value = if plane_mask & color as u8 != 0 {
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current_value | mask
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} else {
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current_value & !mask
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};
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// Set the bits we want set/reset to the color
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vga.set_graphics_set_reset(color);
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// Enable set/reset for all planes
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vga.set_graphics_enable_set_reset(PlaneMask::ALL_PLANES);
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unsafe {
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frame_buffer.add(offset).write_volatile(new_value);
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}
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plane_mask <<= 1;
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// In write mode 0, when enable set/reset is turned on, cpu data
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// is replaced with the data from the set/reset register. Since
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// we're using set/reset for all 4 planes, it doesn't matter what value
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// we write to the memory address.
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frame_buffer.add(offset).write(0x0);
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}
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}
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