diff --git a/lib/metalkit/pci.c b/lib/metalkit/pci.c index a2e660d..068ed2b 100644 --- a/lib/metalkit/pci.c +++ b/lib/metalkit/pci.c @@ -207,13 +207,18 @@ PCI_SetBAR(const PCIAddress *addr, int index, uint32 value) * PCI_GetBARAddr -- * * Get the current address set in one of the device's Base Address Registers. - * (We mask off the lower 2 bits, which hold memory type flags.) + * We mask off the lower bits that are not part of the address. IO bars are + * 4 byte aligned so we mask lower 2 bits, and memory bars are 16-byte aligned + * so we mask the lower 4 bits. */ fastcall uint32 PCI_GetBARAddr(const PCIAddress *addr, int index) { - return PCI_ConfigRead32(addr, offsetof(PCIConfigSpace, BAR[index])) & ~3; + uint32 bar = PCI_ConfigRead32(addr, offsetof(PCIConfigSpace, BAR[index])); + uint32 mask = (bar & PCI_CONF_BAR_IO) ? 0x3 : 0xf; + + return bar & ~mask; } diff --git a/lib/metalkit/pci.h b/lib/metalkit/pci.h index a36f74a..3463c8c 100644 --- a/lib/metalkit/pci.h +++ b/lib/metalkit/pci.h @@ -76,6 +76,11 @@ typedef struct PCIScanState { PCIAddress addr; } PCIScanState; +// BAR bits +#define PCI_CONF_BAR_IO 0x01 +#define PCI_CONF_BAR_64BIT 0x04 +#define PCI_CONF_BAR_PREFETCH 0x08 + fastcall uint32 PCI_ConfigRead32(const PCIAddress *addr, uint16 offset); fastcall uint16 PCI_ConfigRead16(const PCIAddress *addr, uint16 offset); fastcall uint8 PCI_ConfigRead8(const PCIAddress *addr, uint16 offset); diff --git a/lib/metalkit/vbe.c b/lib/metalkit/vbe.c index 9c84526..12bb67e 100644 --- a/lib/metalkit/vbe.c +++ b/lib/metalkit/vbe.c @@ -56,8 +56,6 @@ VBE_Init() /* Let the BIOS know we support VBE2 */ cInfo->signature = SIGNATURE_VBE2; - Console_WriteString("Foo\n"); - /* "Get SuperVGA Information" command */ reg.ax = 0x4f00; reg.di = PTR_32_TO_NEAR(cInfo, 0); @@ -65,7 +63,6 @@ VBE_Init() if (reg.ax != 0x004F) { return FALSE; } - Console_WriteString("Bar\n"); /* * Make a copy of the VBEControllerInfo struct itself, and of the