249 lines
7 KiB
C
249 lines
7 KiB
C
/* -*- Mode: C; c-basic-offset: 3 -*-
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*
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* intr.h - Interrupt vector management and interrupt routing.
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*
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* This file is part of Metalkit, a simple collection of modules for
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* writing software that runs on the bare metal. Get the latest code
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* at http://svn.navi.cx/misc/trunk/metalkit/
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*
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* Copyright (c) 2008-2009 Micah Dowty
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __INTR_H__
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#define __INTR_H__
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#include "types.h"
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#include "io.h"
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#define NUM_INTR_VECTORS 256
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#define NUM_FAULT_VECTORS 0x20
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#define NUM_IRQ_VECTORS 0x10
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#define IRQ_VECTOR_BASE NUM_FAULT_VECTORS
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#define IRQ_VECTOR(irq) ((irq) + IRQ_VECTOR_BASE)
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#define USER_VECTOR_BASE (IRQ_VECTOR_BASE + NUM_IRQ_VECTORS)
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#define USER_VECTOR(n) ((n) + USER_VECTOR_BASE)
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#define IRQ_TIMER 0
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#define IRQ_KEYBOARD 1
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#define FAULT_DE 0x00 // Divide error
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#define FAULT_NMI 0x02 // Non-maskable interrupt
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#define FAULT_BP 0x03 // Breakpoint
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#define FAULT_OF 0x04 // Overflow
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#define FAULT_BR 0x05 // Bound range
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#define FAULT_UD 0x06 // Undefined opcode
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#define FAULT_NM 0x07 // No FPU
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#define FAULT_DF 0x08 // Double Fault
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#define FAULT_TS 0x0A // Invalid TSS
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#define FAULT_NP 0x0B // Segment not present
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#define FAULT_SS 0x0C // Stack-segment fault
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#define FAULT_GP 0x0D // General Protection Fault
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#define FAULT_PF 0x0E // Page fault
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#define FAULT_MF 0x10 // Math fault
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#define FAULT_AC 0x11 // Alignment check
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#define FAULT_MC 0x12 // Machine check
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#define FAULT_XM 0x13 // SIMD floating point exception
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#define PIC1_COMMAND_PORT 0x20
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#define PIC1_DATA_PORT 0x21
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#define PIC2_COMMAND_PORT 0xA0
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#define PIC2_DATA_PORT 0xA1
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typedef void (*IntrHandler)(int vector);
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typedef void (*IntrContextFn)(void);
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fastcall void Intr_Init(void);
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fastcall void Intr_SetFaultHandlers(IntrHandler handler);
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static inline void
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Intr_Enable(void) {
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asm volatile ("sti");
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}
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static inline void
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Intr_Disable(void) {
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asm volatile ("cli");
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}
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static inline Bool
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Intr_Save(void) {
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uint32 eflags;
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asm volatile ("pushf; pop %0" : "=r" (eflags));
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return (eflags & 0x200) != 0;
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}
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static inline void
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Intr_Restore(Bool flag) {
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if (flag) {
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Intr_Enable();
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} else {
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Intr_Disable();
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}
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}
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static inline void
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Intr_Halt(void) {
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asm volatile ("hlt");
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}
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static inline void
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Intr_Break(void) {
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asm volatile ("int3");
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}
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/*
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* This structure describes all execution state that's saved when an
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* interrupt or a setjmp occurs. In the case of an interrupt, this
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* structure actually describes the stack frame of the interrupt
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* trampoline.
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*
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* An interrupt handler can get a pointer to its IntrContext by
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* passing its first argument to the Intr_GetContext macro. This
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* allows an interrupt handler to examine the execution context in
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* which the interrupt occurred, to modify the interrupt's return
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* address, or even to implement input and output for OS traps.
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*
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* This module also provides functions for directly saving and
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* restoring IntrContext structures. This can be used much like
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* setjmp/longjmp, or it can even be used for simple cooperative or
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* preemptive multithreading. An interrupt handler can perform a
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* context switch by overwriting its IntrContext with a saved context.
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*
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* The definition of this structure must be kept in sync with the
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* machine code in our interrupt trampolines, and with the
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* assembly-language implementation of SaveContext and RestoreContext.
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*/
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typedef struct IntrContext {
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/*
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* General purpose registers. These are all saved after the value
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* of %esp is captured.
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*/
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uint32 edi;
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uint32 esi;
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uint32 ebp;
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uint32 esp;
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uint32 ebx;
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uint32 edx;
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uint32 ecx;
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uint32 eax;
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/*
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* These values are save by the CPU during an interrupt. By
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* convention, these values are at the top of the stack when %esp
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* was saved.
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*
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* The values of cs and eflags are ignored by Intr_SaveContext
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* and Intr_RestoreContext.
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*/
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uint32 eip;
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uint32 cs;
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uint32 eflags;
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} IntrContext;
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/*
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* Always use the 'volatile' keyword when storing the result
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* of Intr_GetContext. GCC can erroneously decide to optimize
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* out any copies to this pointer, because it doesn't know the
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* values will be used by our trampoline.
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*/
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#define Intr_GetContext(arg) ((IntrContext*) &(&arg)[1])
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uint32 Intr_SaveContext(IntrContext *ctx);
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void Intr_RestoreContext(IntrContext *ctx);
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fastcall void Intr_InitContext(IntrContext *ctx, uint32 *stack, IntrContextFn main);
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/*
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* To save space, we don't include assembly-language trampolines for
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* each interrupt vector. Instead, we allocate a table in the BSS
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* segment which we can fill in at runtime with simple trampoline
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* functions. This structure actually describes executable 32-bit
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* code.
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*/
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typedef struct {
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uint16 code1;
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uint32 arg;
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uint8 code2;
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IntrHandler handler;
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uint32 code3;
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uint32 code4;
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uint32 code5;
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uint32 code6;
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uint32 code7;
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uint32 code8;
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} PACKED IntrTrampolineType;
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extern IntrTrampolineType ALIGNED(4) IntrTrampoline[NUM_INTR_VECTORS];
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/*
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* Intr_SetHandler --
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*
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* Set a C-language interrupt handler for a particular vector.
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* Note that the argument is a vector number, not an IRQ.
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*/
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static inline void
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Intr_SetHandler(int vector, IntrHandler handler)
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{
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IntrTrampoline[vector].handler = handler;
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}
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/*
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* Intr_SetMask --
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*
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* (Un)mask a particular IRQ.
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*/
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static inline void
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Intr_SetMask(int irq, Bool enable)
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{
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uint8 port, bit, mask;
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if (irq >= 8) {
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bit = 1 << (irq - 8);
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port = PIC2_DATA_PORT;
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} else {
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bit = 1 << irq;
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port = PIC1_DATA_PORT;
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}
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mask = IO_In8(port);
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/* A '1' bit in the mask inhibits the interrupt. */
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if (enable) {
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mask &= ~bit;
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} else {
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mask |= bit;
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}
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IO_Out8(port, mask);
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}
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#endif /* __INTR_H__ */
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