420 lines
11 KiB
C
420 lines
11 KiB
C
/* -*- Mode: C; c-basic-offset: 3 -*-
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*
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* intr.c - Interrupt vector management, interrupt routing,
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* and low-level building blocks for multithreading.
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*
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* This file is part of Metalkit, a simple collection of modules for
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* writing software that runs on the bare metal. Get the latest code
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* at http://svn.navi.cx/misc/trunk/metalkit/
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*
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* Copyright (c) 2008-2009 Micah Dowty
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "intr.h"
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#include "boot.h"
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#include "io.h"
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/*
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* Definitions for the two PIC chips.
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*/
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#define PIC1_COMMAND_PORT 0x20
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#define PIC1_DATA_PORT 0x21
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#define PIC2_COMMAND_PORT 0xA0
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#define PIC2_DATA_PORT 0xA1
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/*
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* IDT table and IDT table descriptor. The table itself lives in the
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* BSS segment, the descriptor lives in the data segment.
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*/
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typedef union {
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struct {
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uint16 offsetLow;
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uint16 segment;
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uint16 flags;
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uint16 offsetHigh;
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};
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struct {
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uint32 offsetLowSeg;
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uint32 flagsOffsetHigh;
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};
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} PACKED IDTType;
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/*
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* Note the IDT is page-aligned. Only 8-byte alignment is actually
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* necessary, though page alignment may help performance in some
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* environments.
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*/
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static IDTType ALIGNED(4096) IDT[NUM_INTR_VECTORS];
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const struct {
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uint16 limit;
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void *address;
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} PACKED IDTDesc = {
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.limit = NUM_INTR_VECTORS * 8 - 1,
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.address = IDT,
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};
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/*
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* To save space, we don't include assembly-language trampolines for
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* each interrupt vector. Instead, we allocate a table in the BSS
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* segment which we can fill in at runtime with simple trampoline
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* functions. This structure actually describes executable 32-bit
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* code.
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*/
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typedef struct {
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uint16 code1;
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uint32 arg;
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uint8 code2;
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IntrHandler handler;
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uint32 code3;
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uint32 code4;
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uint32 code5;
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uint32 code6;
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uint32 code7;
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uint32 code8;
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} PACKED IntrTrampolineType;
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static IntrTrampolineType ALIGNED(4) IntrTrampoline[NUM_INTR_VECTORS];
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/*
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* IntrDefaultHandler --
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*
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* Default no-op interrupt handler.
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*/
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static void
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IntrDefaultHandler(int vector)
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{
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/* Do nothing. */
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}
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/*
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* Intr_Init --
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*
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* Initialize the interrupt descriptor table and the programmable
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* interrupt controller (PIC). On return, interrupts are enabled
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* but all handlers are no-ops.
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*/
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fastcall void
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Intr_Init(void)
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{
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int i;
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Intr_Disable();
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IDTType *idt = IDT;
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IntrTrampolineType *tramp = IntrTrampoline;
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for (i = 0; i < NUM_INTR_VECTORS; i++) {
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uint32 trampolineAddr = (uint32) tramp;
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/*
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* Set up the IDT entry as a 32-bit interrupt gate, pointing at
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* our trampoline for this vector. Fill in the IDT with two 32-bit
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* writes, since GCC generates significantly smaller code for this
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* than when writing four 16-bit fields separately.
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*/
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idt->offsetLowSeg = (trampolineAddr & 0x0000FFFF) | (BOOT_CODE_SEG << 16);
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idt->flagsOffsetHigh = (trampolineAddr & 0xFFFF0000) | 0x00008E00;
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/*
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* Set up the trampoline, pointing it at the default handler.
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* The trampoline function wraps our C interrupt handler, and
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* handles placing a vector number onto the stack. It also allows
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* interrupt handlers to switch stacks upon return by writing
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* to the saved 'esp' register.
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*
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* Note that the old stack and new stack may actually be different
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* stack frames on the same stack. We require that the new stack
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* is in a higher or equal stack frame, but the two stacks may
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* overlap. This is why the trampoline does its copy in reverse.
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*
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* Keep the trampoline function consistent with the definition
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* of IntrContext in intr.h.
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*
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* Stack layout:
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*
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* 8 eflags
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* 4 cs
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* 0 eip <- esp on entry to IRQ handler
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* -4 eax
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* -8 ecx
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* -12 edx
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* -16 ebx
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* -20 esp
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* -24 ebp
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* -28 esi
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* -32 edi
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* -36 <arg> <- esp on entry to handler function
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*
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* Our trampolines each look like:
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*
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* 60 pusha // Save general-purpose regs
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* 68 <32-bit arg> push <arg> // Call handler(arg)
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* b8 <32-bit addr> mov <addr>, %eax
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* ff d0 call *%eax
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* 58 pop %eax // Remove arg from stack
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* 8b 7c 24 0c mov 12(%esp), %edi // Load new stack address
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* 8d 74 24 28 lea 40(%esp), %esi // Addr of eflags on old stack
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* 83 c7 08 add $8, %edi // Addr of eflags on new stack
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* fd std // Copy backwards
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* a5 movsl // Copy eflags
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* a5 movsl // Copy cs
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* a5 movsl // Copy eip
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* 61 popa // Restore general-purpose regs
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* 8b 64 24 ec mov -20(%esp), %esp // Switch stacks
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* cf iret // Restore eip, cs, eflags
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*
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* Note: Surprisingly enough, it's actually more size-efficient to initialize
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* the structure in code like this than it is to memcpy() the trampoline from
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* a template in the data segment.
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*/
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tramp->code1 = 0x6860;
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tramp->code2 = 0xb8;
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tramp->code3 = 0x8b58d0ff;
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tramp->code4 = 0x8d0c247c;
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tramp->code5 = 0x83282474;
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tramp->code6 = 0xa5fd08c7;
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tramp->code7 = 0x8b61a5a5;
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tramp->code8 = 0xcfec2464;
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tramp->handler = IntrDefaultHandler;
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tramp->arg = i;
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idt++;
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tramp++;
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}
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asm volatile ("lidt IDTDesc");
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typedef struct {
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uint8 port, data;
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} PortData8;
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static const PortData8 pitInit[] = {
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/*
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* Program the PIT to map all IRQs linearly starting at
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* IRQ_VECTOR_BASE.
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*/
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{ PIC1_COMMAND_PORT, 0x11 }, // Begin init, use 4 command words
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{ PIC2_COMMAND_PORT, 0x11 },
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{ PIC1_DATA_PORT, IRQ_VECTOR_BASE },
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{ PIC2_DATA_PORT, IRQ_VECTOR_BASE + 8 },
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{ PIC1_DATA_PORT, 0x04 },
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{ PIC2_DATA_PORT, 0x02 },
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{ PIC1_DATA_PORT, 0x03 }, // 8086 mode, auto-end-of-interrupt.
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{ PIC2_DATA_PORT, 0x03 },
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/*
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* All IRQs start out masked, except for the cascade IRQs 2 and 4.
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*/
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{ PIC1_DATA_PORT, 0xEB },
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{ PIC2_DATA_PORT, 0xFF },
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};
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const PortData8 *p = pitInit;
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for (i = arraysize(pitInit); i; i--, p++) {
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IO_Out8(p->port, p->data);
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}
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Intr_Enable();
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}
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/*
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* Intr_SetHandler --
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*
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* Set a C-language interrupt handler for a particular vector.
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* Note that the argument is a vector number, not an IRQ.
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*/
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fastcall void
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Intr_SetHandler(int vector, IntrHandler handler)
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{
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IntrTrampoline[vector].handler = handler;
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}
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/*
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* Intr_SetMask --
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*
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* (Un)mask a particular IRQ.
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*/
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fastcall void
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Intr_SetMask(int irq, Bool enable)
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{
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uint8 port, bit, mask;
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if (irq >= 8) {
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bit = 1 << (irq - 8);
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port = PIC2_DATA_PORT;
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} else {
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bit = 1 << irq;
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port = PIC1_DATA_PORT;
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}
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mask = IO_In8(port);
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/* A '1' bit in the mask inhibits the interrupt. */
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if (enable) {
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mask &= ~bit;
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} else {
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mask |= bit;
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}
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IO_Out8(port, mask);
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}
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/*
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* Intr_SetFaultHandlers --
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*
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* Set all processor fault handlers to the provided function.
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*/
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fastcall void
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Intr_SetFaultHandlers(IntrHandler handler)
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{
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int vector;
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for (vector = 0; vector < NUM_FAULT_VECTORS; vector++) {
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Intr_SetHandler(vector, handler);
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}
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}
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/*
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* Intr_InitContext --
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*
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* Create an IntrContext representing a brand new thread of
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* execution. This can be used as a primitive to implement
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* light-weight cooperative or pre-emptive multithreading.
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*
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* 'Stack' points to the initial value of the stack pointer.
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* Stacks grow downward, so this should point to the top word of
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* the allocated stack memory.
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*/
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fastcall void
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Intr_InitContext(IntrContext *ctx, uint32 *stack, IntrContextFn main)
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{
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Intr_SaveContext(ctx);
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ctx->esp = (uint32) stack;
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ctx->eip = (uint32) main;
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}
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/*
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* Intr_SaveContext --
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*
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* This is a C-callable function which constructs an
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* IntrContext representing the current execution
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* context. This is nearly equivalent to invoking
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* software interrupt and saving the interrupt's
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* IntrContext, but this implementation doesn't have the
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* overhead of an actual interrupt invocation.
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*/
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asm (".global Intr_SaveContext \n Intr_SaveContext:"
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"pusha \n"
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/*
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* Adjust the saved stack pointer. IntrContexts always
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* store an %esp which has three words on the stack
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* prior to the general-purpose regs, but since we don't
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* use cs or eflags we only have 1.
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*/
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"sub $8, 12(%esp) \n"
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/*
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* The stack now matches the layout of the first 9 words
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* of IntrContext. Copy these, then manually save CS and
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* eflags.
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*/
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"mov %esp, %esi \n"
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"mov 36(%esp), %edi \n"
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"mov $9, %ecx \n"
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"rep movsl \n"
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"xor %eax, %eax \n"
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"mov %cs, %ax \n"
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"stosl \n"
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"pushf \n"
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"pop %eax \n"
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"stosl \n"
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/* Return 0 when this function is called directly. */
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"popa \n"
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"xor %eax, %eax \n"
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"ret" );
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/*
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* Intr_RestoreContext --
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*
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* This is the inverse of Intr_SaveContext: copy the
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* IntrContext onto the target context's stack frame,
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* switch stacks, then restore the rest of the context's
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* saved state.
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*/
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asm(".global Intr_RestoreContext \n Intr_RestoreContext:"
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"mov 4(%esp), %esi \n" // Load pointer to IntrContext
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"mov 12(%esi), %esp \n" // Switch stacks
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/*
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* esp was saved with 3 words on the stack (eip, cs, cflags).
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* Position esp so we have 9 words instead. (General purpose
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* regs plus eip, but no cs/eflags.)
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*/
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"sub $24, %esp \n"
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// Copy the first 9 words of Intrcontext back onto the stack.
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"mov %esp, %edi \n"
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"mov $9, %ecx \n"
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"rep movsl \n"
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// Restore the general purpose regs and eip
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"popa \n"
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"ret" );
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