124 lines
3.5 KiB
C
124 lines
3.5 KiB
C
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/*++
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Copyright (c) 1990 Microsoft Corporation
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Module Name:
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ixkdcom.h
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Abstract:
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This module contains the header file for comport detection code.
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The code is extracted from NT Hal for kernel debugger.
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Author:
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Shie-Lin Tzong (shielint) Dec-23-1991.
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Revision History:
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--*/
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#define MAX_COM_PORTS 4 // Max. number of comports detectable
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#define MAX_LPT_PORTS 3 // Max. number of LPT ports detectable
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#define COM1_PORT 0x03f8
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#define COM2_PORT 0x02f8
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#define COM3_PORT
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#define COM4_PORT
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#define BAUD_RATE_9600_MSB 0x0
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#define BAUD_RATE_9600_LSB 0xC
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#define IER_TEST_VALUE 0xF
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//
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// Offsets from the base register address of the
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// various registers for the 8250 family of UARTS.
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//
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#define RECEIVE_BUFFER_REGISTER (0x00u)
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#define TRANSMIT_HOLDING_REGISTER (0x00u)
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#define INTERRUPT_ENABLE_REGISTER (0x01u)
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#define INTERRUPT_IDENT_REGISTER (0x02u)
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#define FIFO_CONTROL_REGISTER (0x02u)
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#define LINE_CONTROL_REGISTER (0x03u)
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#define MODEM_CONTROL_REGISTER (0x04u)
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#define LINE_STATUS_REGISTER (0x05u)
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#define MODEM_STATUS_REGISTER (0x06u)
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#define DIVISOR_LATCH_LSB (0x00u)
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#define DIVISOR_LATCH_MSB (0x01u)
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#define SERIAL_REGISTER_LENGTH (7)
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//
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// These masks define access to the line control register.
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//
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//
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// This defines the bit used to control the definition of the "first"
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// two registers for the 8250. These registers are the input/output
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// register and the interrupt enable register. When the DLAB bit is
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// enabled these registers become the least significant and most
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// significant bytes of the divisor value.
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//
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#define SERIAL_LCR_DLAB 0x80
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//
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// This defines the bit used to control whether the device is sending
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// a break. When this bit is set the device is sending a space (logic 0).
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//
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// Most protocols will assume that this is a hangup.
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//
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#define SERIAL_LCR_BREAK 0x40
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//
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// This macro writes to the modem control register
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//
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// Arguments:
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//
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// BaseAddress - A pointer to the address from which the hardware
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// device registers are located.
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//
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// ModemControl - The control bits to send to the modem control.
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//
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//
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#define WRITE_MODEM_CONTROL(BaseAddress,ModemControl) \
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do \
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{ \
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WRITE_PORT_UCHAR( \
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(BaseAddress)+MODEM_CONTROL_REGISTER, \
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(ModemControl) \
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); \
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} while (0)
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//
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// This macro reads the modem control register
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//
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// Arguments:
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//
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// BaseAddress - A pointer to the address from which the hardware
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// device registers are located.
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//
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//
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#define READ_MODEM_CONTROL(BaseAddress) \
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(READ_PORT_UCHAR((BaseAddress)+MODEM_CONTROL_REGISTER))
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//
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// This macro reads the interrupt identification register
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//
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// Arguments:
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//
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// BaseAddress - A pointer to the address from which the hardware
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// device registers are located.
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//
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// Note that this routine potententially quites a transmitter
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// empty interrupt. This is because one way that the transmitter
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// empty interrupt is cleared is to simply read the interrupt id
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// register.
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//
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//
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#define READ_INTERRUPT_ID_REG(BaseAddress) \
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(READ_PORT_UCHAR((BaseAddress)+INTERRUPT_IDENT_REGISTER))
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