371 lines
8.1 KiB
C
371 lines
8.1 KiB
C
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/*
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* VLSI.C - VLSI Wildcat PCI chipset routines.
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*
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* Notes:
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* Algorithms from VLSI VL82C596/7 spec.
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*
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*/
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#include "local.h"
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#define NUM_VLSI_IRQ (sizeof(rgbIndexToIRQ)/sizeof(rgbIndexToIRQ[0]))
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const UCHAR rgbIndexToIRQ[] = { 3, 5, 9, 10, 11, 12, 14, 15 };
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#define INDEX_UNUSED ((ULONG)-1)
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/****************************************************************************
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*
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* VLSISetIRQ - Set a VLSI PCI link to a specific IRQ
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*
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* Exported.
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*
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* ENTRY: bIRQNumber is the new IRQ to be used.
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*
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* bLink is the Link to be set.
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*
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* EXIT: Standard PCIMP return value.
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*
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***************************************************************************/
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PCIMPRET CDECL
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VLSISetIRQ(UCHAR bIRQNumber, UCHAR bLink)
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{
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ULONG ulNewIRQIndex;
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ULONG rgbIRQSteering[NUM_IRQ_PINS];
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ULONG ulMask;
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ULONG ulUnusedIndex;
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ULONG ulVLSIRegister;
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ULONG ulIRQIndex;
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ULONG i;
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//
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// Make link number 0 based, and validate.
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//
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bLink--;
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if (bLink > 3) {
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return(PCIMP_INVALID_LINK);
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}
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//
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// Find the VLSI index of the new IRQ.
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//
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if (bIRQNumber) {
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//
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// Look through the list of valid indicies.
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//
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for (ulNewIRQIndex=0; ulNewIRQIndex<NUM_VLSI_IRQ; ulNewIRQIndex++)
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{
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if (rgbIndexToIRQ[ulNewIRQIndex] == bIRQNumber)
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break;
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}
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//
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// If there is no VLSI equivalent, bail.
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//
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if (ulNewIRQIndex==NUM_VLSI_IRQ) {
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return(PCIMP_INVALID_IRQ);
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}
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} else {
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//
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// Blowing away this interrupt.
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//
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ulNewIRQIndex = INDEX_UNUSED;
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}
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//
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// Read in the VLSI Interrupt Steering Register.
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//
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ulVLSIRegister=ReadConfigUlong(bBusPIC, bDevFuncPIC, 0x74);
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//
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// Compute the complete IRQ mapping.
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//
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for (i=0, ulMask=0x07; i<NUM_IRQ_PINS; i++, ulMask<<=4)
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{
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ulIRQIndex = (ulVLSIRegister & ulMask) >> (i * 4);
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if ((ulVLSIRegister & (1 << (ulIRQIndex + 16))) != 0)
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{
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rgbIRQSteering[i] = ulIRQIndex;
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}
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else
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{
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rgbIRQSteering[i] = INDEX_UNUSED;
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}
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}
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//
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// Update the IRQ Mapping with the new IRQ.
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//
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rgbIRQSteering[bLink] = ulNewIRQIndex;
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//
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// Find an unused IRQ index.
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//
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for (ulUnusedIndex=0; ulUnusedIndex<NUM_VLSI_IRQ; ulUnusedIndex++)
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{
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for (i=0; i<NUM_IRQ_PINS; i++)
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{
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if (rgbIRQSteering[i] == ulUnusedIndex)
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break;
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}
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if (i == NUM_IRQ_PINS)
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break;
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}
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//
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// Compute the new VLSI Interrupt Steering Register.
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//
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ulVLSIRegister = 0x00000000;
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for (i=0; i<NUM_IRQ_PINS; i++)
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{
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if (rgbIRQSteering[i] == INDEX_UNUSED)
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{
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ulVLSIRegister |= ulUnusedIndex << (4*i);
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}
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else
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{
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ulVLSIRegister |= rgbIRQSteering[i] << (4*i);
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ulVLSIRegister |= 1 << (rgbIRQSteering[i] + 16);
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}
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}
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//
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// Write out the new VLSI Interrupt Steering Register.
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//
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WriteConfigUlong(bBusPIC, bDevFuncPIC, 0x74, ulVLSIRegister);
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return(PCIMP_SUCCESS);
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}
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/****************************************************************************
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*
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* VLSIGetIRQ - Get the IRQ of a VLSI PCI link
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*
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* Exported.
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*
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* ENTRY: pbIRQNumber is the buffer to fill.
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*
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* bLink is the Link to be read.
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*
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* EXIT: Standard PCIMP return value.
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*
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***************************************************************************/
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PCIMPRET CDECL
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VLSIGetIRQ(PUCHAR pbIRQNumber, UCHAR bLink)
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{
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ULONG ulVLSIRegister;
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ULONG ulIndex;
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UCHAR bIRQ;
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//
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// Make link number 0 based, and validate.
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//
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bLink--;
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if (bLink > 3) {
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return(PCIMP_INVALID_LINK);
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}
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//
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// Read in the VLSI Interrupt Steering Register.
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//
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ulVLSIRegister=ReadConfigUchar(bBusPIC, bDevFuncPIC, 0x74);
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//
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// Find the link's IRQ value.
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//
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ulIndex = (ulVLSIRegister >> (bLink*4)) & 0x7;
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bIRQ = rgbIndexToIRQ[ulIndex];
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//
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// Make sure the IRQ is marked as in use.
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//
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if ((ulVLSIRegister & (1 << (ulIndex + 16))) == 0)
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{
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bIRQ = 0;
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}
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//
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// Set the return buffer.
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//
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*pbIRQNumber = bIRQ;
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return(PCIMP_SUCCESS);
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}
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/****************************************************************************
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*
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* VLSISetTrigger - Set the IRQ triggering values for the VLSI.
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*
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* Exported.
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*
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* ENTRY: ulTrigger has bits set for Level triggered IRQs.
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*
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* EXIT: Standard PCIMP return value.
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*
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***************************************************************************/
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PCIMPRET CDECL
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VLSISetTrigger(ULONG ulTrigger)
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{
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ULONG ulAssertionRegister;
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ULONG ulPMAssertionRegister;
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ULONG i;
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//
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// Read in the Interrupt Assertion Level register.
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//
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ulAssertionRegister = ReadConfigUlong(bBusPIC, bDevFuncPIC, 0x5C);
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//
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// Clear off the old edge/level settings.
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//
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ulAssertionRegister &= ~0xff;
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//
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// For each VLSI interrupt...
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//
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for (i=0; i<NUM_VLSI_IRQ; i++)
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{
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//
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// If the corresponding bit is set to level...
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//
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if (ulTrigger & (1 << rgbIndexToIRQ[i]))
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{
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//
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// Set the corresponding bit in the
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// Assertion Register.
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//
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ulAssertionRegister |= 1 << i;
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//
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// And clear the bit from ulTrigger.
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//
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ulTrigger &= ~(1 << rgbIndexToIRQ[i]);
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}
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}
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//
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// If the caller wanted some non-VLSI IRQs level, bail.
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//
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if (ulTrigger)
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{
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return(PCIMP_INVALID_IRQ);
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}
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//
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// Set the Assertion Register.
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//
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WriteConfigUlong(bBusPIC, bDevFuncPIC, 0x5C, ulAssertionRegister);
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//
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// Read in the Power Mgmt edge/level setting.
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//
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ulPMAssertionRegister = ReadConfigUlong(bBusPIC, bDevFuncPIC, 0x78);
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//
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// Clear off the old edge/level settings.
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//
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ulPMAssertionRegister &= ~0xff;
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//
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// Copy the new edge/level settings.
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//
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ulPMAssertionRegister |= ulAssertionRegister & 0xff;
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//
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// Set the Power Mgmt Assertion Register.
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//
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WriteConfigUlong(bBusPIC, bDevFuncPIC, 0x78, ulPMAssertionRegister);
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return(PCIMP_SUCCESS);
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}
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/****************************************************************************
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*
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* VLSIGetTrigger - Get the IRQ triggering values for the VLSI.
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*
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* Exported.
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*
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* ENTRY: pulTrigger will have bits set for Level triggered IRQs.
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*
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* EXIT: TRUE if successful.
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*
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***************************************************************************/
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PCIMPRET CDECL
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VLSIGetTrigger(PULONG pulTrigger)
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{
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ULONG ulAssertionRegister;
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ULONG i;
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//
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// Read in the Interrupt Assertion Level register.
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//
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ulAssertionRegister = ReadConfigUchar(bBusPIC, bDevFuncPIC, 0x5C);
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//
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// Clear the return buffer.
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//
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*pulTrigger = 0;
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//
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// For each VLSI interrupt...
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//
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for (i=0; i<NUM_VLSI_IRQ; i++)
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{
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//
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// If the corresponding bit is set to level...
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//
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if (ulAssertionRegister & (1 << i))
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{
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//
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// Set the corresponding bit in the
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// return buffer.
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//
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*pulTrigger |= 1 << rgbIndexToIRQ[i];
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}
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}
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return(PCIMP_SUCCESS);
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}
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/****************************************************************************
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*
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* VLSIValidateTable - Validate an IRQ table
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*
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* Exported.
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*
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* ENTRY: piihIRQInfoHeader points to an IRQInfoHeader followed
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* by an IRQ Routing Table.
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*
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* ulFlags are PCIMP_VALIDATE flags.
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*
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* EXIT: Standard PCIMP return value.
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*
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***************************************************************************/
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#ifdef ALLOC_PRAGMA
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PCIMPRET CDECL
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VLSIValidateTable(PIRQINFOHEADER piihIRQInfoHeader, ULONG ulFlags);
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#pragma alloc_text(PAGE, VLSIValidateTable)
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#endif //ALLOC_PRAGMA
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PCIMPRET CDECL
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VLSIValidateTable(PIRQINFOHEADER piihIRQInfoHeader, ULONG ulFlags)
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{
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PAGED_CODE();
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if (GetMaxLink(piihIRQInfoHeader)>0x04) {
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return(PCIMP_FAILURE);
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}
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return(PCIMP_SUCCESS);
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}
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