373 lines
14 KiB
C++
373 lines
14 KiB
C++
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///////////////////////////////////////////////////////////////////////////////
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// Copyright (C) Microsoft Corporation, 2000.
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//
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// psexec.cpp
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//
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// Direct3D Reference Device - Pixel Shader Execution
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//
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///////////////////////////////////////////////////////////////////////////////
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#include "pch.cpp"
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#pragma hdrstop
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//-----------------------------------------------------------------------------
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//
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// ExecShader - Executes the current pixel shader.
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//
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//-----------------------------------------------------------------------------
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void
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RefRast::ExecShader( void )
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{
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#define _InstParam(__INST) (*(__INST##_PARAMS UNALIGNED64*)pRDPSInstBuffer)
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#define _StepOverInst(__INST) pRDPSInstBuffer += sizeof(__INST##_PARAMS);
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#define _DeclArgs(__INST) __INST##_PARAMS& Args = _InstParam(__INST);
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#define _PerChannel(__STATEMENT) \
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for( iChn=0; iChn<4; iChn++ ) \
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{ \
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__STATEMENT \
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} \
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#define _PerChannelMasked(__STATEMENT) \
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for( iChn=0; iChn<4; iChn++ ) \
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{ \
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if( !(Args.WriteMask & ComponentMask[iChn] ) ) \
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continue; \
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__STATEMENT \
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} \
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#define _Dst Args.DstReg.GetRegPtr()[m_iPix][iChn]
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#define _DstC(__chn) Args.DstReg.GetRegPtr()[m_iPix][__chn]
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#define _Src0 Args.SrcReg0.GetRegPtr()[m_iPix][iChn]
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#define _Src1 Args.SrcReg1.GetRegPtr()[m_iPix][iChn]
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#define _Src2 Args.SrcReg2.GetRegPtr()[m_iPix][iChn]
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#define _Src0C(__chn) Args.SrcReg0.GetRegPtr()[m_iPix][__chn]
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#define _Src1C(__chn) Args.SrcReg1.GetRegPtr()[m_iPix][__chn]
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#define _Src2C(__chn) Args.SrcReg2.GetRegPtr()[m_iPix][__chn]
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#define _Src0N (Args.bSrcReg0_Negate?(-_Src0):_Src0)
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#define _Src1N (Args.bSrcReg1_Negate?(-_Src1):_Src1)
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#define _Src2N (Args.bSrcReg2_Negate?(-_Src2):_Src2)
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#define _Src0NC(__chn) (Args.bSrcReg0_Negate?(-_Src0C(__chn)):_Src0C(__chn))
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#define _Src1NC(__chn) (Args.bSrcReg1_Negate?(-_Src1C(__chn)):_Src1C(__chn))
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#define _Src2NC(__chn) (Args.bSrcReg2_Negate?(-_Src2C(__chn)):_Src2C(__chn))
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BYTE ComponentMask[4] = {RDPS_COMPONENTMASK_0, RDPS_COMPONENTMASK_1, RDPS_COMPONENTMASK_2, RDPS_COMPONENTMASK_3};
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BYTE* pRDPSInstBuffer = &m_pCurrentPixelShader->m_RDPSInstBuffer[0]; // Buffer of "RISC" RDPS_* instructions to execute.
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int QueueIndex[4] = {-1,-1,-1,-1}; // For simulating co-issue sequentially ("parallel" writes staged in queue)
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int iChn; // For macros
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#if DBG
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PixelShaderInstruction* pCurrD3DPSInst = NULL; // Current true D3DSIO_ instruction being simulated.
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#endif
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m_bPixelDiscard[0] = m_bPixelDiscard[1] = m_bPixelDiscard[2] = m_bPixelDiscard[3] = FALSE;
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while(RDPSINST_END != _InstParam(RDPSINST_BASE).Inst)
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{
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switch(_InstParam(RDPSINST_BASE).Inst)
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{
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case RDPSINST_EVAL:
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{
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_DeclArgs(RDPSINST_EVAL)
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m_Attr[RDATTR_TEXTURE0+Args.uiCoordSet].Sample( Args.DstReg.GetRegPtr()[m_iPix],
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(FLOAT)m_iX[m_iPix], (FLOAT)m_iY[m_iPix],
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Args.bIgnoreD3DTTFF_PROJECTED, Args.bClamp );
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}
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_StepOverInst(RDPSINST_EVAL)
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break;
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case RDPSINST_SAMPLE:
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{
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_DeclArgs(RDPSINST_SAMPLE)
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ComputeTextureFilter( Args.uiStage, Args.CoordReg.GetRegPtr()[m_iPix] );
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SampleTexture( Args.uiStage, Args.DstReg.GetRegPtr()[m_iPix] );
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}
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_StepOverInst(RDPSINST_SAMPLE)
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break;
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case RDPSINST_KILL:
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{
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_DeclArgs(RDPSINST_KILL)
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DWORD TexKillFlags = 0x0; // TODO: get these from TSS or per-instruction
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_PerChannel(
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// compare against zero according to kill flags
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if ( TexKillFlags & (1<<iChn) )
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{
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if ( _Dst >= 0. )
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m_bPixelDiscard[m_iPix] |= 0x1;
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}
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else
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{
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if ( _Dst < 0. )
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m_bPixelDiscard[m_iPix] |= 0x1;
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}
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)
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}
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_StepOverInst(RDPSINST_KILL)
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break;
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case RDPSINST_BEM:
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{
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_DeclArgs(RDPSINST_BEM)
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RDTextureStageState* pTSS = &m_pRD->m_TextureStageState[Args.uiStage];
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// Just assuming Args.WriteMask is .rg
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_DstC(0) = _Src0NC(0) +
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pTSS->m_fVal[D3DTSS_BUMPENVMAT00] * _Src1NC(0) +
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pTSS->m_fVal[D3DTSS_BUMPENVMAT10] * _Src1NC(1);
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_DstC(1) = _Src0NC(1) +
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pTSS->m_fVal[D3DTSS_BUMPENVMAT01] * _Src1NC(0) +
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pTSS->m_fVal[D3DTSS_BUMPENVMAT11] * _Src1NC(1);
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}
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_StepOverInst(RDPSINST_BEM)
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break;
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case RDPSINST_LUMINANCE:
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{
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_DeclArgs(RDPSINST_LUMINANCE)
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RDTextureStageState* pTSS = &m_pRD->m_TextureStageState[Args.uiStage];
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FLOAT fLum = _Src1NC(2) *
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pTSS->m_fVal[D3DTSS_BUMPENVLSCALE] +
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pTSS->m_fVal[D3DTSS_BUMPENVLOFFSET];
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fLum = min(max(fLum, 0.0f), 1.0F);
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// apply luminance modulation to RGB only
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_DstC(0) = _Src0C(0)*fLum;
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_DstC(1) = _Src0C(1)*fLum;
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_DstC(2) = _Src0C(2)*fLum;
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}
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_StepOverInst(RDPSINST_LUMINANCE)
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break;
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case RDPSINST_DEPTH:
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{
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_DeclArgs(RDPSINST_DEPTH)
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FLOAT result;
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FLOAT* pDstReg = Args.DstReg.GetRegPtr()[m_iPix];
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if( pDstReg[1] )
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result = pDstReg[0] / pDstReg[1];
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else
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result = 1.0f;
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// clamp
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m_Depth[m_iPix] = MAX(0, MIN(1, result));
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// snap off extra bits by converting to/from buffer format - necessary
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// to make depth buffer equality tests function correctly
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SnapDepth();
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do
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{
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m_SampleDepth[m_CurrentSample][m_iPix] = m_Depth[m_iPix];
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}
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while (NextSample());
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}
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_StepOverInst(RDPSINST_DEPTH)
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break;
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case RDPSINST_SRCMOD:
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{
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_DeclArgs(RDPSINST_SRCMOD)
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_PerChannelMasked(
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if( Args.bComplement )
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_Dst = 1 - _Src0;
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else if( Args.bBias && Args.bTimes2 )
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_Dst = 2*(_Src0 - 0.5);
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else if( Args.bBias )
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_Dst = _Src0 - 0.5f;
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else if( Args.bTimes2 )
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_Dst = 2*_Src0;
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else
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_Dst = _Src0;
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_Dst = MAX( _Dst, Args.fRangeMin );
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_Dst = MIN( _Dst, Args.fRangeMax );
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)
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}
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_StepOverInst(RDPSINST_SRCMOD)
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break;
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case RDPSINST_SWIZZLE:
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{
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_DeclArgs(RDPSINST_SWIZZLE)
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BYTE Swizzle = Args.Swizzle;
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_PerChannelMasked(
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_Dst = _Src0C(Swizzle&0x3);
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Swizzle >>= 2;
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)
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}
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_StepOverInst(RDPSINST_SWIZZLE)
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break;
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case RDPSINST_DSTMOD:
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{
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_DeclArgs(RDPSINST_DSTMOD)
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_PerChannelMasked(
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_Dst *= Args.fScale;
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// clamp to range
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_Dst = MAX( _Dst, Args.fRangeMin );
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_Dst = MIN( _Dst, Args.fRangeMax );
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)
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}
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_StepOverInst(RDPSINST_DSTMOD)
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break;
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case RDPSINST_MOV:
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{
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_DeclArgs(RDPSINST_MOV)
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_PerChannelMasked(_Dst = _Src0N;)
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}
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_StepOverInst(RDPSINST_MOV)
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break;
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case RDPSINST_RCP:
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{
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_DeclArgs(RDPSINST_RCP)
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_PerChannelMasked(_Dst = _Src0N ? 1/_Src0N : 1.0f;)
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}
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_StepOverInst(RDPSINST_RCP)
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break;
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case RDPSINST_FRC:
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{
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_DeclArgs(RDPSINST_FRC)
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_PerChannelMasked(_Dst = _Src0N - (float)floor(_Src0N);)
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}
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_StepOverInst(RDPSINST_FRC)
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break;
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case RDPSINST_ADD:
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{
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_DeclArgs(RDPSINST_ADD)
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_PerChannelMasked(_Dst = _Src0N + _Src1N;)
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}
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_StepOverInst(RDPSINST_ADD)
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break;
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case RDPSINST_SUB:
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{
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_DeclArgs(RDPSINST_SUB)
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_PerChannelMasked(_Dst = _Src0N - _Src1N;)
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}
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_StepOverInst(RDPSINST_SUB)
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break;
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case RDPSINST_MUL:
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{
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_DeclArgs(RDPSINST_MUL)
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_PerChannelMasked(_Dst = _Src0N * _Src1N;);
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}
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_StepOverInst(RDPSINST_MUL)
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break;
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case RDPSINST_DP3:
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{
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_DeclArgs(RDPSINST_DP3)
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FLOAT dp3 = _Src0NC(0) * _Src1NC(0) +
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_Src0NC(1) * _Src1NC(1) +
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_Src0NC(2) * _Src1NC(2);
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_PerChannelMasked(_Dst = dp3;)
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}
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_StepOverInst(RDPSINST_DP3)
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break;
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case RDPSINST_DP4:
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{
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_DeclArgs(RDPSINST_DP4)
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FLOAT dp4 = _Src0NC(0) * _Src1NC(0) +
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_Src0NC(1) * _Src1NC(1) +
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_Src0NC(2) * _Src1NC(2) +
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_Src0NC(3) * _Src1NC(3);
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_PerChannelMasked(_Dst = dp4;)
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}
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_StepOverInst(RDPSINST_DP4)
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break;
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case RDPSINST_MAD:
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{
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_DeclArgs(RDPSINST_MAD)
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_PerChannelMasked(_Dst = _Src0N * _Src1N + _Src2N;)
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}
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_StepOverInst(RDPSINST_MAD)
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break;
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case RDPSINST_LRP:
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{
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_DeclArgs(RDPSINST_LRP)
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_PerChannelMasked(_Dst = (_Src0N*(_Src1N - _Src2N)) + _Src2N;)
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}
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_StepOverInst(RDPSINST_LRP)
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break;
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case RDPSINST_CND:
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{
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_DeclArgs(RDPSINST_CND)
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_PerChannelMasked(_Dst = _Src0N > 0.5f ? _Src1N : _Src2N;)
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}
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_StepOverInst(RDPSINST_CND)
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break;
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case RDPSINST_CMP:
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{
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_DeclArgs(RDPSINST_CMP)
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_PerChannelMasked(_Dst = _Src0N >= 0.f ? _Src1N : _Src2N;)
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}
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_StepOverInst(RDPSINST_CMP)
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break;
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case RDPSINST_TEXCOVERAGE:
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{
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_DeclArgs(RDPSINST_TEXCOVERAGE);
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Args.pGradients[0][0] = *Args.pDUDX_0 - *Args.pDUDX_1; // du/dx
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Args.pGradients[0][1] = *Args.pDUDY_0 - *Args.pDUDY_1; // du/dy
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Args.pGradients[1][0] = *Args.pDVDX_0 - *Args.pDVDX_1; // dv/dx
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Args.pGradients[1][1] = *Args.pDVDY_0 - *Args.pDVDY_1; // dv/dy
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Args.pGradients[2][0] = *Args.pDWDX_0 - *Args.pDWDX_1; // dw/dx
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Args.pGradients[2][1] = *Args.pDWDY_0 - *Args.pDWDY_1; // dw/dy
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ComputeTextureCoverage( Args.uiStage, Args.pGradients );
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}
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_StepOverInst(RDPSINST_TEXCOVERAGE)
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break;
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case RDPSINST_QUADLOOPBEGIN:
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m_iPix = 0;
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_StepOverInst(RDPSINST_QUADLOOPBEGIN)
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break;
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case RDPSINST_QUADLOOPEND:
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{
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_DeclArgs(RDPSINST_QUADLOOPEND);
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if( 4 > ++m_iPix )
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pRDPSInstBuffer -= Args.JumpBackByOffset;
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else
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_StepOverInst(RDPSINST_QUADLOOPEND)
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}
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break;
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case RDPSINST_QUEUEWRITE:
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{
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_DeclArgs(RDPSINST_QUEUEWRITE);
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QueueIndex[m_iPix]++;
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m_QueuedWriteDst[QueueIndex[m_iPix]].DstReg = Args.DstReg;
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m_QueuedWriteDst[QueueIndex[m_iPix]].WriteMask = Args.WriteMask;
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}
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_StepOverInst(RDPSINST_QUEUEWRITE)
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|
|
break;
|
||
|
|
case RDPSINST_FLUSHQUEUE:
|
||
|
|
{
|
||
|
|
_ASSERT(QueueIndex[m_iPix] >= 0, "Nothing in pixelshader write queue to flush. Refrast mistranslated this pixelshader." );
|
||
|
|
_ASSERT(QueueIndex[m_iPix] < RDPS_MAX_NUMQUEUEDWRITEREG, "Pixelshader write queue overflow. Refrast mistranslated this pixelshader." );
|
||
|
|
for( int i = 0; i <= QueueIndex[m_iPix]; i++ )
|
||
|
|
{
|
||
|
|
_PerChannel(
|
||
|
|
if (m_QueuedWriteDst[i].WriteMask & ComponentMask[iChn])
|
||
|
|
m_QueuedWriteDst[i].DstReg.GetRegPtr()[m_iPix][iChn] = m_QueuedWriteReg[i][m_iPix][iChn];
|
||
|
|
)
|
||
|
|
}
|
||
|
|
QueueIndex[m_iPix] = -1;
|
||
|
|
}
|
||
|
|
_StepOverInst(RDPSINST_FLUSHQUEUE)
|
||
|
|
break;
|
||
|
|
case RDPSINST_NEXTD3DPSINST:
|
||
|
|
#if DBG
|
||
|
|
if (m_pRD->m_pDbgMon)
|
||
|
|
m_pRD->m_pDbgMon->NextEvent( D3DDM_EVENT_PIXELSHADERINST );
|
||
|
|
pCurrD3DPSInst = _InstParam(RDPSINST_NEXTD3DPSINST).pInst; // Handy to look at when debugging.
|
||
|
|
#endif
|
||
|
|
_StepOverInst(RDPSINST_NEXTD3DPSINST)
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
_ASSERT(FALSE,"Refrast::ExecShader() - Unrecognized micro-instruction!");
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
///////////////////////////////////////////////////////////////////////////////
|
||
|
|
// end
|