293 lines
9.4 KiB
C
293 lines
9.4 KiB
C
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/*++
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Copyright (c) 1994 Microsoft Corporation
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Module Name:
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pcicfg.h
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Abstract:
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Contains defines for vendor specific PCI configuration
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information
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Author(s):
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Ravisankar Pudipeddi (1 Nov 1997)
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Largely derived from pcskhw.h for win 9x
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Revision History:
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--*/
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#ifndef _PCMCIA_PCICFG_H_
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#define _PCMCIA_PCICFG_H_
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//
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// Macros for read/writing to PCI config headers
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//
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//
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// VOID
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// GetPciConfigSpace (IN PVOID Extension,
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// IN UCHAR Offset,
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// IN PUCHAR Buffer,
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// IN ULONG Size)
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//
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#define GetPciConfigSpace(Extension, Offset, Buffer, Size) \
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(Extension)->PciBusInterface.GetBusData( \
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(Extension)->PciBusInterface.Context, \
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PCI_WHICHSPACE_CONFIG, Buffer, Offset, Size);
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//
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// VOID
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// SetPciConfigSpace (IN PVOID Extension,
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// IN UCHAR Offset,
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// IN PUCHAR Buffer,
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// IN ULONG Size)
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//
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#define SetPciConfigSpace(Extension, Offset, Buffer, Size) \
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(Extension)->PciBusInterface.SetBusData( \
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(Extension)->PciBusInterface.Context, \
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PCI_WHICHSPACE_CONFIG, Buffer, Offset, Size);
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//ConfigSpace Registers
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#define CFGSPACE_VENDOR_ID 0x00
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#define CFGSPACE_DEVICE_ID 0x02
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#define CFGSPACE_COMMAND 0x04
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#define CFGSPACE_STATUS 0x06
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#define CFGSPACE_REV_ID 0x08
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#define CFGSPACE_CLASS_CODE 0x09
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#define CFGSPACE_CLASSCODE_PI 0x09
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#define CFGSPACE_CLASSCODE_SUBCLASS 0x0a
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#define CFGSPACE_CLASSCODE_BASECLASS 0x0b
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#define CFGSPACE_CACHE_LINESIZE 0x0c
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#define CFGSPACE_LATENCY_TIMER 0x0d
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#define CFGSPACE_HEADER_TYPE 0x0e
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#define CFGSPACE_BIST 0x0f
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#define CFGSPACE_REGBASE_ADDR 0x10
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#define CFGSPACE_CAPPTR 0x14
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#define CFGSPACE_SECOND_STATUS 0x16
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#define CFGSPACE_PCI_BUSNUM 0x18
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#define CFGSPACE_CARDBUS_BUSNUM 0x19
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#define CFGSPACE_SUB_BUSNUM 0x1a
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#define CFGSPACE_CB_LATENCY_TIMER 0x1b
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#define CFGSPACE_MEMBASE_0 0x1c
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#define CFGSPACE_MEMLIMIT_0 0x20
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#define CFGSPACE_MEMBASE_1 0x24
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#define CFGSPACE_MEMLIMIT_1 0x28
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#define CFGSPACE_IOBASE_0 0x2c
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#define CFGSPACE_IOLIMIT_0 0x30
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#define CFGSPACE_IOBASE_1 0x34
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#define CFGSPACE_IOLIMIT_1 0x38
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#define CFGSPACE_INT_LINE 0x3c
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#define CFGSPACE_INT_PIN 0x3d
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#define CFGSPACE_BRIDGE_CTRL 0x3e
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#define CFGSPACE_SUBSYS_VENDOR_ID 0x40
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#define CFGSPACE_SUBSYS_ID 0x42
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#define CFGSPACE_LEGACY_MODE_BASE_ADDR 0x44
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//ConfigSpace registers for cardbus cards
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#define CBCFG_BAR0 0x10
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#define CBCFG_BAR1 0x14
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#define CBCFG_BAR2 0x18
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#define CBCFG_BAR3 0x1c
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#define CBCFG_BAR4 0x20
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#define CBCFG_BAR5 0x24
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#define CBCFG_CISPTR 0x28
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#define CBCFG_SUBSYS_VENDOR_ID 0x2c
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#define CBCFG_SUBSYS_ID 0x2e
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#define CBCFG_ROMBAR 0x30
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#define CBCFG_CAPPTR 0x34
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//Command Register bits
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#define CMD_IOSPACE_ENABLE 0x0001
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#define CMD_MEMSPACE_ENABLE 0x0002
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#define CMD_BUSMASTER_ENABLE 0x0004
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#define CMD_SPECIALCYCLE_ENABLE 0x0008
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#define CMD_MEMWR_INVALIDATE_ENABLE 0x0010
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#define CMD_VGA_PALETTE_SNOOP 0x0020
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#define CMD_PARITY_ERROR_ENABLE 0x0040
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#define CMD_WAIT_CYCLE_CTRL 0x0080
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#define CMD_SYSTEM_ERROR_ENABLE 0x0100
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#define CMD_FAST_BACKTOBACK_ENABLE 0x0200
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//Bridge Control Register bits
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#define BCTRL_PERR_RESPONSE_ENABLE 0x0001
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#define BCTRL_SERR_ENABLE 0x0002
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#define BCTRL_ISA_ENABLE 0x0004
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#define BCTRL_VGA_ENABLE 0x0008
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#define BCTRL_MASTER_ABORT_MODE 0x0020
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#define BCTRL_CRST 0x0040
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#define BCTRL_IRQROUTING_ENABLE 0x0080
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#define BCTRL_MEMWIN0_PREFETCH_ENABLE 0x0100
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#define BCTRL_MEMWIN1_PREFETCH_ENABLE 0x0200
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#define BCTRL_WRITE_POSTING_ENABLE 0x0400
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#define BCTRL_CL_CSCIRQROUTING_ENABLE 0x0800
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//Power Management control bits
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#define PME_EN 0x0100
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#define PME_STAT 0x8000
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//
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// TI
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//
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//ConfigSpace Registers (TI PCI1130)
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#define CFGSPACE_TI_SYSTEM_CTRL 0x80
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#define CFGSPACE_TI_MM_CTRL 0x84
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#define CFGSPACE_TI_RETRY_STATUS 0x90
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#define CFGSPACE_TI_CARD_CTRL 0x91
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#define CFGSPACE_TI_DEV_CTRL 0x92
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//System Control Register bits (TI PCI1130)
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#define SYSCTRL_PCICLKRUN_ENABLE 0x00000001
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#define SYSCTRL_KEEPCLK_ENABLE 0x00000002
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#define SYSCTRL_ASYNC_INTMODE 0x00000004
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#define SYSCTRL_PCPCI_DMA_ENABLE 0x00000008
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#define SYSCTRL_CBDATAPARITY_SERR 0x00000010
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#define SYSCTRL_EXCAIDREV_READONLY 0x00000020
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#define SYSCTRL_INTERROGATING 0x00000100
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#define SYSCTRL_POWERING_UP 0x00000200
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#define SYSCTRL_POWERING_DOWN 0x00000400
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#define SYSCTRL_POWER_STREAMING 0x00000800
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#define SYSCTRL_SOCKET_ACTIVITY 0x00002000
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#define SYSCTRL_PCPCI_DMA_CHAN_MASK 0x00070000
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#define SYSCTRL_PCPCI_DMA_CHAN_DISABLED 0x00040000
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#define SYSCTRL_PCPCI_DMA_CARD_ENABLE 0x00080000
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#define SYSCTRL_REDUCED_ZV_ENABLE 0x00100000
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#define SYSCTRL_VCC_PROTECT_OVERRIDE 0x00200000
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#define SYSCTRL_SMI_INT_ENABLE 0x01000000
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#define SYSCTRL_SMI_INT_ROUTING_SELECT 0x02000000
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//Multimedia Control Register bits (TI PCI1250/1260)
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#define MMCTRL_ZVEN0 0x01
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#define MMCTRL_ZVEN1 0x02
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#define MMCTRL_PORTSEL 0x40
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#define MMCTRL_ZVOUTEN 0x80
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//Retry Status Register bits (TI PCI1130)
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#define RETRY_PCIM_RETRY_EXPIRED 0x01
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#define RETRY_PCI_RETRY_EXPIRED 0x02
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#define RETRY_CBMA_RETRY_EXPIRED 0x04
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#define RETRY_CBA_RETRY_EXPIRED 0x08
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#define RETRY_CBMB_RETRY_EXPIRED 0x10
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#define RETRY_CBB_RETRY_EXPIRED 0x20
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#define RETRY_CBRETRY_TIMEOUT_ENABLE 0x40
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#define RETRY_PCIRETRY_TIMEOUT_ENABLE 0x80
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//Card Control Register bits (TI PCI1130)
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#define CARDCTRL_PCCARD_INTFLAG 0x01
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#define CARDCTRL_SPKR_ENABLE 0x02
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#define CARDCTRL_CSCINT_ENABLE 0x08
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#define CARDCTRL_FUNCINT_ENABLE 0x10
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#define CARDCTRL_PCIINT_ENABLE 0x20
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#define CARDCTRL_ZV_ENABLE 0x40
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#define CARDCTRL_RIOUT_ENABLE 0x80
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//Device Control Register bits (TI PCI1130)
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#define DEVCTRL_INTMODE_MASK 0x06
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#define DEVCTRL_INTMODE_DISABLED 0x00
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#define DEVCTRL_INTMODE_ISA 0x02
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#define DEVCTRL_INTMODE_COMPAQ 0x04
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#define DEVCTRL_INTMODE_SERIAL 0x06
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#define DEVCTRL_ALWAYS_ONE 0x10
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#define DEVCTRL_3V_ENABLE 0x20
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#define DEVCTRL_5V_ENABLE 0x40
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//
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// TOPIC
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//
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//ConfigSpace Registers (TOPIC95)
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#define CFGSPACE_TO_PC16_SKTCTRL 0x90
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#define CFGSPACE_TO_SLOT_CTRL 0xa0
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#define CFGSPACE_TO_CARD_CTRL 0xa1
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#define CFGSPACE_TO_CD_CTRL 0xa3
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#define CFGSPACE_TO_CBREG_CTRL 0xa4
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//PC Card-16 Socket Control Register bits (TOPIC95)
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#define S16CTRL_CSC_ISAIRQ 0x00000001
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//Card Control Register bits (TOPIC95)
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#define CARDCTRL_INTPIN_ASSIGNMASK 0x30
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#define CARDCTRL_INTPIN_NONE 0x00
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#define CARDCTRL_INTPIN_INTA 0x01
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#define CARDCTRL_INTPIN_INTB 0x02
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//Card Detect Control Register bits (TOPIC95)
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#define CDCTRL_SW_DETECT 0x01
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#define CDCTRL_VS_MASK 0x06
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#define CDCTRL_PCCARD_16_32 0x80
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//CardBus Socket Register Control Register (TOPIC)
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#define CSRCR_TO_CAUDIO_OFF 0x00000002
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//
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// CL
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//
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//ConfigSpace Registers (CL PD6834)
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#define CFGSPACE_CL_CFGMISC1 0x98
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//Cirrus Logic Configuration Miscellaneous 1
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#define CL_CFGMISC1_ISACSC 0x02
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//
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// Opti
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//
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//ConfigSpace Registers (OPTi 82C824)
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#define CFGSPACE_OPTI_HF_CTRL 0x50
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#define HFC_COMBINE_CINT_CSTSCHG 0x01
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#define HFC_SPKROUT_ENABLE 0x02
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#define HFC_CLKRUN_DISBALE 0x04
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#define HFC_CD_DEBOUNCE_250MS 0x00
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#define HFC_CD_DEBOUNCE_1000MS 0x08
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#define HFC_IRQLAT_ON_CLKRUN 0x10
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#define HFC_VENDOR_ID_STRAP 0x20
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#define HFC_LEGACY_MODE_STRAP 0x40
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#define HFC_ZV_SUPPORT 0x80
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//ConfigSpace Register (OPTi 82C824)
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#define CFGSPACE_OPTI_SF_CTRL2 0x52
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#define SFC2_SECOND_IDSEL_ADDR_MASK 0x0f
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#define SFC2_SECOND_PCICLK_SKEW_MASK 0xf0
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//
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// Ricoh
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//
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//ConfigSpace Registers (RICOH RL5C466)
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#define CFGSPACE_RICOH_MISC_CTRL 0x82
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#define CFGSPACE_RICOH_IF16_CTRL 0x84
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#define CFGSPACE_RICOH_IO16_TIMING0 0x88
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#define CFGSPACE_RICOH_MEM16_TIMING0 0x8a
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#define CFGSPACE_RICOH_DMA_SLAVE_CFG 0x90
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//RICOH 16-bit Interface Control Register bits
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#define IF16_INDEX_RANGE_SELECT 0x0008
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#define IF16_LEGACY_LEVEL_1 0x0010
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#define IF16_LEGACY_LEVEL_2 0x0020
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#define IF16_IO16_ENHANCE_TIMING 0x0100
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#define IF16_MEM16_ENHANCE_TIMING 0x0200
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//
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// O2Micro
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//
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//ConfigSpace Registers (O2Micro)
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#define CFGSPACE_O2MICRO_ZVCFG 0x80
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#define ZVCFG_SKTA_SUPPORT 0x01
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#define ZVCFG_SKTB_SUPPORT 0x02
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#endif // _PCMCIA_PCICFG_H_
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