622 lines
16 KiB
C
622 lines
16 KiB
C
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/*++
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Copyright (c) 1989 Microsoft Corporation
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Module Name:
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trapc.c
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Abstract:
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This module contains some trap handling code written in C.
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Only by the kernel.
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Author:
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Ken Reneris 6-9-93
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Revision History:
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--*/
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#include "ki.h"
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NTSTATUS
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Ki386CheckDivideByZeroTrap (
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IN PKTRAP_FRAME UserFrame
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);
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VOID
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KipWorkAroundCompiler (
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USHORT * StatusWord,
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USHORT * ControlWord
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);
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#ifdef ALLOC_PRAGMA
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#pragma alloc_text(PAGE, Ki386CheckDivideByZeroTrap)
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#endif
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#define REG(field) ((ULONG)(&((KTRAP_FRAME *)0)->field))
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#define GETREG(frame,reg) ((PULONG) (((ULONG) frame)+reg))[0]
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typedef struct {
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UCHAR RmDisplaceOnly; // RM of displacment only, no base reg
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UCHAR RmSib; // RM of SIB
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UCHAR RmDisplace; // bit mask of RMs which have a displacement
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UCHAR Disp; // sizeof displacement (in bytes)
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} KMOD, *PKMOD;
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static UCHAR RM32[] = {
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/* 000 */ REG(Eax),
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/* 001 */ REG(Ecx),
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/* 010 */ REG(Edx),
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/* 011 */ REG(Ebx),
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/* 100 */ REG(HardwareEsp),
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/* 101 */ REG(Ebp), // SIB
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/* 110 */ REG(Esi),
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/* 111 */ REG(Edi)
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};
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static UCHAR RM8[] = {
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/* 000 */ REG(Eax), // al
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/* 001 */ REG(Ecx), // cl
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/* 010 */ REG(Edx), // dl
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/* 011 */ REG(Ebx), // bl
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/* 100 */ REG(Eax) + 1, // ah
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/* 101 */ REG(Ecx) + 1, // ch
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/* 110 */ REG(Edx) + 1, // dh
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/* 111 */ REG(Ebx) + 1 // bh
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};
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static KMOD MOD32[] = {
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/* 00 */ 5, 4, 0x20, 4,
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/* 01 */ 0xff, 4, 0xff, 1,
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/* 10 */ 0xff, 4, 0xff, 4,
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/* 11 */ 0xff, 0xff, 0x00, 0
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} ;
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static struct {
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UCHAR Opcode1, Opcode2; // instruction opcode
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UCHAR ModRm, type; // if 2nd part of opcode is encoded in ModRm
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} NoWaitNpxInstructions[] = {
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/* FNINIT */ 0xDB, 0xE3, 0, 1,
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/* FNCLEX */ 0xDB, 0xE2, 0, 1,
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/* FNSTENV */ 0xD9, 0x06, 1, 1,
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/* FNSAVE */ 0xDD, 0x06, 1, 1,
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/* FNSTCW */ 0xD9, 0x07, 1, 2,
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/* FNSTSW */ 0xDD, 0x07, 1, 3,
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/* FNSTSW AX*/ 0xDF, 0xE0, 0, 4,
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0x00, 0x00, 0, 1
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};
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NTSTATUS
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Ki386CheckDivideByZeroTrap (
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IN PKTRAP_FRAME UserFrame
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)
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/*++
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Routine Description:
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This function gains control when the x86 processor generates a
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divide by zero trap. The x86 design generates such a trap on
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divide by zero and on division overflows. In order to determine
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which expection code to dispatch, the divisor of the "div" or "idiv"
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instruction needs to be inspected.
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Arguments:
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UserFrame - Trap frame of the divide by zero trap
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Return Value:
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exception code dispatch
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--*/
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{
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ULONG operandsize, operandmask, i, accum;
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PUCHAR istream, pRM;
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UCHAR ibyte, rm;
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PKMOD Mod;
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BOOLEAN fPrefix;
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NTSTATUS status;
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status = STATUS_INTEGER_DIVIDE_BY_ZERO;
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if (UserFrame->SegCs == KGDT_R0_CODE) {
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//
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// Divide by zero exception from Kernel Mode?
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// Likely bad hardware interrupt and the device or vector table is corrupt.
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// Bugcheck NOW so we can figure out what went wrong. If we try and
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// proceed, then we'll likely fault in reading the top of user space, and then
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// double fault (page fault in the div zero handler.) -- This is a debugging
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// consideration. You can't put breakpoints on the trap labels so this is hard to debug.
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// We cannot recover
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//
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//
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KeBugCheck (UNEXPECTED_KERNEL_MODE_TRAP);
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}
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try {
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//
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// read instruction prefixes
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//
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fPrefix = TRUE;
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pRM = RM32;
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operandsize = 4;
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operandmask = 0xffffffff;
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istream = (PUCHAR) UserFrame->Eip;
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while (fPrefix) {
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ibyte = ProbeAndReadUchar(istream);
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istream++;
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switch (ibyte) {
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case 0x2e: // cs override
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case 0x36: // ss override
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case 0x3e: // ds override
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case 0x26: // es override
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case 0x64: // fs override
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case 0x65: // gs override
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case 0xF3: // rep
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case 0xF2: // rep
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case 0xF0: // lock
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break;
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case 0x66:
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// 16 bit operand override
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operandsize = 2;
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operandmask = 0xffff;
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break;
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case 0x67:
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// 16 bit address size override
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// this is some non-flat code
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goto try_exit;
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default:
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fPrefix = FALSE;
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break;
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}
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}
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//
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// Check instruction opcode
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//
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if (ibyte != 0xf7 && ibyte != 0xf6) {
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// this is not a DIV or IDIV opcode
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goto try_exit;
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}
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if (ibyte == 0xf6) {
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// this is a byte div or idiv
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operandsize = 1;
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operandmask = 0xff;
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}
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//
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// Get Mod R/M
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//
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ibyte = ProbeAndReadUchar (istream);
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istream++;
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Mod = MOD32 + (ibyte >> 6);
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rm = ibyte & 7;
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//
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// put register values into accum
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//
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if (operandsize == 1 && (ibyte & 0xc0) == 0xc0) {
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pRM = RM8;
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}
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accum = 0;
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if (rm != Mod->RmDisplaceOnly) {
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if (rm == Mod->RmSib) {
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// get SIB
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ibyte = ProbeAndReadUchar(istream);
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istream++;
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i = (ibyte >> 3) & 7;
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if (i != 4) {
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accum = GETREG(UserFrame, RM32[i]);
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accum = accum << (ibyte >> 6); // apply scaler
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}
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i = ibyte & 7;
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accum = accum + GETREG(UserFrame, RM32[i]);
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} else {
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// get register's value
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accum = GETREG(UserFrame, pRM[rm]);
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}
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}
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//
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// apply displacement to accum
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//
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if (Mod->RmDisplace & (1 << rm)) {
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if (Mod->Disp == 4) {
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i = ProbeAndReadUlong ((PULONG) istream);
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} else {
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ibyte = ProbeAndReadChar (istream);
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i = (signed long) ((signed char) ibyte); // sign extend
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}
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accum += i;
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}
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//
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// if this is an effective address, go get the data value
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//
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if (Mod->Disp && accum) {
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switch (operandsize) {
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case 1: accum = ProbeAndReadUchar((PUCHAR) accum); break;
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case 2: accum = ProbeAndReadUshort((PUSHORT) accum); break;
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case 4: accum = ProbeAndReadUlong((PULONG) accum); break;
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}
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}
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//
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// accum now contains the instruction operand, see if the
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// operand was really a zero
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//
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if (accum & operandmask) {
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// operand was non-zero, must be an overflow
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status = STATUS_INTEGER_OVERFLOW;
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}
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try_exit: ;
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} except (EXCEPTION_EXECUTE_HANDLER) {
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// do nothing...
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}
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return status;
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}
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UCHAR
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KiNextIStreamByte (
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IN PKTRAP_FRAME UserFrame,
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IN PUCHAR *istream
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)
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/*++
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Routine Description:
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Reads the next byte from the istream pointed to by the UserFrame, and
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advances the EIP.
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Note: this function works for 32 bit code only
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--*/
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{
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UCHAR ibyte;
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if (UserFrame->SegCs == KGDT_R0_CODE) {
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ibyte = **istream;
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} else {
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ibyte = ProbeAndReadUchar (*istream);
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}
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*istream += 1;
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return ibyte;
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}
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BOOLEAN
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Ki386CheckDelayedNpxTrap (
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IN PKTRAP_FRAME UserFrame,
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IN PFX_SAVE_AREA NpxFrame
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)
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/*++
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Routine Description:
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This function gains control from the Trap07 handler. It examines
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the user mode instruction to see if it's a NoWait NPX instruction.
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Such instructions do not generate floating point exceptions - this
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check needs to be done due to the way 80386/80387 systems are
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implemented. Such machines will generate a floating point exception
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interrupt when the kernel performs an FRSTOR to reload the thread's
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NPX context. If the thread's next instruction is a NoWait style
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instruction, then we clear the exception or emulate the instruction.
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AND... due to a different 80386/80387 "feature" the kernel needs
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to use FWAIT at times which can causes 80487's to generate delayed
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exceptions that can lead to the same problem described above.
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Arguments:
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UserFrame - Trap frame of the exception
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NpxFrame - Thread's NpxFrame (WARNING: does not have NpxState)
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Interrupts are disabled
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Return Value:
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FALSE - Dispatch NPX exception to user mode
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TRUE - Exception handled, continue
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--*/
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{
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EXCEPTION_RECORD ExceptionRecord;
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UCHAR ibyte1, ibyte2, inmodrm, status;
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USHORT StatusWord, ControlWord, UsersWord;
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PUCHAR istream;
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BOOLEAN fPrefix;
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UCHAR rm;
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PKMOD Mod;
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ULONG accum, i;
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status = 0;
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//
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// read instruction prefixes
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//
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fPrefix = TRUE;
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istream = (PUCHAR) UserFrame->Eip;
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try {
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while (fPrefix) {
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ibyte1 = KiNextIStreamByte (UserFrame, &istream);
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switch (ibyte1) {
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case 0x2e: // cs override
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case 0x36: // ss override
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case 0x3e: // ds override
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case 0x26: // es override
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case 0x64: // fs override
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case 0x65: // gs override
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break;
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default:
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fPrefix = FALSE;
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break;
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}
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}
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//
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// Check for coprocessor NoWait NPX instruction
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//
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ibyte2 = KiNextIStreamByte (UserFrame, &istream);
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inmodrm = (ibyte2 >> 3) & 0x7;
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for (i=0; NoWaitNpxInstructions[i].Opcode1; i++) {
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if (NoWaitNpxInstructions[i].Opcode1 == ibyte1) {
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//
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// first opcode byte matched - check second part of opcode
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//
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if (NoWaitNpxInstructions[i].ModRm) {
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//
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// modrm only applies for opcode in range 0-0xbf
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//
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if (((ibyte2 & 0xc0) != 0xc0) &&
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(NoWaitNpxInstructions[i].Opcode2 == inmodrm)) {
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//
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// This is a no-wait NPX instruction
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//
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status = NoWaitNpxInstructions[i].type;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
} else {
|
||
|
|
if (NoWaitNpxInstructions[i].Opcode2 == ibyte2) {
|
||
|
|
|
||
|
|
//
|
||
|
|
// This is a no-wait NPX instruction
|
||
|
|
//
|
||
|
|
|
||
|
|
status = NoWaitNpxInstructions[i].type;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
} except (EXCEPTION_EXECUTE_HANDLER) {
|
||
|
|
// do nothing...
|
||
|
|
}
|
||
|
|
|
||
|
|
if (status == 0) {
|
||
|
|
//
|
||
|
|
// Dispatch coprocessor exception to user mode
|
||
|
|
//
|
||
|
|
|
||
|
|
return FALSE;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (status == 1) {
|
||
|
|
//
|
||
|
|
// Ignore pending exception, user mode instruction does not trap
|
||
|
|
// on pending execptions and it will clear/mask the pending exceptions
|
||
|
|
//
|
||
|
|
|
||
|
|
_asm {
|
||
|
|
mov eax, cr0
|
||
|
|
and eax, NOT (CR0_MP+CR0_EM+CR0_TS)
|
||
|
|
mov cr0, eax
|
||
|
|
}
|
||
|
|
|
||
|
|
NpxFrame->Cr0NpxState &= ~CR0_TS;
|
||
|
|
return TRUE;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// This is either FNSTSW or FNSTCW. Both of these instructions get
|
||
|
|
// a value from the coprocessor without effecting the pending exception
|
||
|
|
// state. To do this we emulate the instructions.
|
||
|
|
//
|
||
|
|
|
||
|
|
//
|
||
|
|
// Read the coprocessors Status & Control word state, then re-enable
|
||
|
|
// interrupts. (it's safe to context switch after that point)
|
||
|
|
//
|
||
|
|
|
||
|
|
//
|
||
|
|
// NOTE: The new compiler is generating a FWAIT at the
|
||
|
|
// entry to the try/except block if it sees inline
|
||
|
|
// fp instructions, even if they are only control word accesses.
|
||
|
|
// put this stuff in another function to fool it.
|
||
|
|
//
|
||
|
|
|
||
|
|
KipWorkAroundCompiler (&StatusWord, &ControlWord);
|
||
|
|
|
||
|
|
if (status == 4) {
|
||
|
|
//
|
||
|
|
// Emulate FNSTSW AX
|
||
|
|
//
|
||
|
|
|
||
|
|
UserFrame->Eip = (ULONG)istream;
|
||
|
|
UserFrame->Eax = (UserFrame->Eax & 0xFFFF0000) | StatusWord;
|
||
|
|
return TRUE;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (status == 2) {
|
||
|
|
UsersWord = ControlWord;
|
||
|
|
} else {
|
||
|
|
UsersWord = StatusWord;
|
||
|
|
}
|
||
|
|
|
||
|
|
try {
|
||
|
|
|
||
|
|
//
|
||
|
|
// (PERFNOTE: the operand decode code should really share code with
|
||
|
|
// KiCheckDivideByZeroTrap, but this is a late change therefore the
|
||
|
|
// code was copied to keep the impact of the change localized)
|
||
|
|
//
|
||
|
|
|
||
|
|
//
|
||
|
|
// decode Mod/RM byte
|
||
|
|
//
|
||
|
|
|
||
|
|
Mod = MOD32 + (ibyte2 >> 6);
|
||
|
|
rm = ibyte2 & 7;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Decode the instruction's word pointer into accum
|
||
|
|
//
|
||
|
|
|
||
|
|
accum = 0;
|
||
|
|
if (rm != Mod->RmDisplaceOnly) {
|
||
|
|
if (rm == Mod->RmSib) {
|
||
|
|
// get SIB
|
||
|
|
ibyte1 = KiNextIStreamByte (UserFrame, &istream);
|
||
|
|
i = (ibyte1 >> 3) & 7;
|
||
|
|
if (i != 4) {
|
||
|
|
accum = GETREG(UserFrame, RM32[i]);
|
||
|
|
accum = accum << (ibyte1 >> 6); // apply scaler
|
||
|
|
}
|
||
|
|
i = ibyte1 & 7;
|
||
|
|
accum = accum + GETREG(UserFrame, RM32[i]);
|
||
|
|
} else {
|
||
|
|
// get register's value
|
||
|
|
accum = GETREG(UserFrame, RM32[rm]);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// apply displacement to accum
|
||
|
|
//
|
||
|
|
|
||
|
|
if (Mod->RmDisplace & (1 << rm)) {
|
||
|
|
if (Mod->Disp == 4) {
|
||
|
|
i = (KiNextIStreamByte (UserFrame, &istream) << 0) |
|
||
|
|
(KiNextIStreamByte (UserFrame, &istream) << 8) |
|
||
|
|
(KiNextIStreamByte (UserFrame, &istream) << 16) |
|
||
|
|
(KiNextIStreamByte (UserFrame, &istream) << 24);
|
||
|
|
} else {
|
||
|
|
ibyte1 = KiNextIStreamByte (UserFrame, &istream);
|
||
|
|
i = (signed long) ((signed char) ibyte1); // sign extend
|
||
|
|
}
|
||
|
|
accum += i;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Set the word pointer
|
||
|
|
//
|
||
|
|
|
||
|
|
if (UserFrame->SegCs == KGDT_R0_CODE) {
|
||
|
|
*((PUSHORT) accum) = UsersWord;
|
||
|
|
} else {
|
||
|
|
ProbeAndWriteUshort ((PUSHORT) accum, UsersWord);
|
||
|
|
}
|
||
|
|
UserFrame->Eip = (ULONG)istream;
|
||
|
|
|
||
|
|
} except (KiCopyInformation(&ExceptionRecord,
|
||
|
|
(GetExceptionInformation())->ExceptionRecord)) {
|
||
|
|
|
||
|
|
//
|
||
|
|
// Faulted addressing user's memory.
|
||
|
|
// Set the address of the exception to the current program address
|
||
|
|
// and raise the exception by calling the exception dispatcher.
|
||
|
|
//
|
||
|
|
|
||
|
|
ExceptionRecord.ExceptionAddress = (PVOID)(UserFrame->Eip);
|
||
|
|
KiDispatchException(
|
||
|
|
&ExceptionRecord,
|
||
|
|
NULL, // ExceptionFrame
|
||
|
|
UserFrame,
|
||
|
|
UserMode,
|
||
|
|
TRUE
|
||
|
|
);
|
||
|
|
}
|
||
|
|
|
||
|
|
return TRUE;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Code description is above. We do this here to stop the compiler
|
||
|
|
// from putting fwait in the try/except block
|
||
|
|
//
|
||
|
|
// Read the coprocessor's Status & Control word state, then re-enable
|
||
|
|
// interrupts. (it's safe to context switch after that point)
|
||
|
|
//
|
||
|
|
//
|
||
|
|
|
||
|
|
VOID
|
||
|
|
KipWorkAroundCompiler (
|
||
|
|
IN PUSHORT StatusWord,
|
||
|
|
IN PUSHORT ControlWord
|
||
|
|
)
|
||
|
|
{
|
||
|
|
USHORT sw;
|
||
|
|
USHORT cw;
|
||
|
|
|
||
|
|
sw = *StatusWord;
|
||
|
|
cw = *ControlWord;
|
||
|
|
|
||
|
|
_asm {
|
||
|
|
mov eax, cr0
|
||
|
|
mov ecx, eax
|
||
|
|
and eax, NOT (CR0_MP+CR0_EM+CR0_TS)
|
||
|
|
mov cr0, eax
|
||
|
|
|
||
|
|
fnstsw sw
|
||
|
|
fnstcw cw
|
||
|
|
|
||
|
|
mov cr0, ecx
|
||
|
|
sti
|
||
|
|
}
|
||
|
|
|
||
|
|
*StatusWord = sw;
|
||
|
|
*ControlWord = cw;
|
||
|
|
}
|