366 lines
9.4 KiB
C
366 lines
9.4 KiB
C
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/*++
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Copyright (c) 1992 Microsoft Corporation
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Module Name:
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ia64 pmc
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Abstract:
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KD Extension Api
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Author:
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Thierry Fevrier (v-thief)
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Environment:
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User Mode.
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Revision History:
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--*/
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#include "precomp.h"
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#pragma hdrstop
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#include "ia64.h"
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//
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// EmPmcFields: EM register fields for the Performance Monitor Counter register.
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//
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EM_REG_FIELD EmGenPmcFields[] = {
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{ "plm", "Privilege Level Mask" , 0x4, 0 }, // 0-3
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{ "ev", "External Visibility" , 0x1, 4 }, // 4
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{ "oi", "Overflow Interrupt", 0x1, 5 }, // 5
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{ "pm", "Privileged Monitor", 0x1, 6 }, // 6
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{ "ig", "ignored1", 0x1, 7 }, // 7
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{ "es", "Event Selection", 0x7, 8 }, // 8-14
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{ "ig", "ignored2", 0x1, 15 }, // 15
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{ "umk", "Unit Mask", 0x4, 16 }, // 16-19
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{ "thr", "Event Threshold", 0x3, 20 }, // 20-[21-22]
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{ "ig", "ignored3", 0x1, 23 }, // 23
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{ "ism", "Instruction Set Mask", 0x2, 24 }, // 24-25
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{ "ig", "ignored4", 0x26, 26 } // 26-63
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};
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EM_REG_FIELD EmBtbPmcFields[] = {
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{ "plm", "Privilege Level Mask", 0x4, 0 }, // 0-3
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{ "ign", "ignored1", 0x2, 4 }, // 4-5
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{ "pm" , "Privileged Monitor", 0x1, 6}, // 6
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{ "tar", "Target Address Register", 0x1, 7 }, // 7
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{ "tm" , "Taken Mask", 0x2, 8 }, // 8-9
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{ "ptm", "Predicted Target Address Mask", 0x2, 10 }, // 10-11
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{ "ppm", "Predicted Predicate Mask", 0x2, 12 }, // 12-13
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{ "bpt", "Branch Prediction Table", 0x1, 14 }, // 14
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{ "bac", "Branch Address Calculator", 0x1, 15 }, // 15
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{ "ign", "ignored2", 0x30, 16 } // 16-63
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};
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EM_REG_FIELD EmBtbPmdFields[] = {
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{ "b", "Branch Bit", 0x1, 0 }, // 0
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{ "mp", "Mispredit Bit", 0x1, 1 }, // 1
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{ "slt", "Instruction Slot", 0x2, 2}, // 2-3
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{ "add", "Address", 0x3c, 4 } // 4-63
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};
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EM_REG_FIELD EmBtbIndexPmdFields[] = {
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{ "bbi", "Branch Buffer Index", 0x3, 0 }, // 0-2
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{ "ful", "Full Bit", 0x1, 3 }, // 3
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{ "ign", "ignored", 0x3c, 4 } // 4-63
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};
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typedef
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VOID
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(*PDISPLAY_PMC)(
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IN const PCHAR Header,
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IN ULONG64 PmcValue,
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IN DISPLAY_MODE DisplayMode
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);
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VOID
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DisplayPmcIA64(
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IN const PCHAR Header,
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IN ULONG64 PmcValue,
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IN DISPLAY_MODE DisplayMode
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)
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{
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dprintf("%s0x%I64x\n", ( Header ? Header : " pmc: " ), PmcValue );
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return;
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} // DisplayPmcIA64()
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VOID
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DisplayGenPmcIA64(
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IN const PCHAR Header,
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IN ULONG64 PmcValue,
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IN DISPLAY_MODE DisplayMode
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)
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{
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dprintf("%s", Header ? Header : "" );
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if ( DisplayMode >= DISPLAY_MED ) {
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DisplayFullEmReg( PmcValue, EmGenPmcFields, DisplayMode );
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}
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else {
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EM_PMC emPmc;
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emPmc = ULong64ToEM_PMC( PmcValue );
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dprintf(
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"plm ev oi pm es umk thr ism\n "
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"%1I64x %1I64x %1I64x %1I64x %2I64x %1I64x %1I64x %1I64x\n",
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emPmc.plm,
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emPmc.ev,
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emPmc.oi,
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emPmc.pm,
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emPmc.es,
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emPmc.umask,
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emPmc.threshold,
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emPmc.ism
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);
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}
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return;
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} // DisplayGenPmcIA64()
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VOID
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DisplayBtbPmcIA64(
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IN const PCHAR Header,
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IN ULONG64 PmcValue,
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IN DISPLAY_MODE DisplayMode
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)
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{
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dprintf("%s", Header ? Header : "" );
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if ( DisplayMode >= DISPLAY_MED ) {
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DisplayFullEmReg( PmcValue, EmBtbPmcFields, DisplayMode );
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}
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else {
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EM_BTB_PMC emPmc;
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emPmc = ULong64ToEM_BTB_PMC( PmcValue );
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dprintf(
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"plm pm tar tm ptm ppm bpt bac\n "
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"%1I64x %1I64x %1I64x %1I64x %1I64x %1I64x %1I64x %1I64x\n",
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emPmc.plm,
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emPmc.pm,
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emPmc.tar,
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emPmc.tm,
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emPmc.ptm,
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emPmc.ppm,
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emPmc.bpt,
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emPmc.bac
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);
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}
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return;
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} // DisplayBtbPmcIA64()
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VOID
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DisplayBtbPmdIA64(
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IN const PCHAR Header, // Header string displayed before pmc.
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IN ULONG64 PmdValue, // PMD value.
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IN DISPLAY_MODE DisplayMode // Display mode.
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)
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{
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dprintf("%s", Header ? Header : "" );
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if ( DisplayMode >= DISPLAY_MED ) {
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DisplayFullEmReg( PmdValue, EmBtbPmdFields, DisplayMode );
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}
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else {
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EM_BTB_PMD btbPmd;
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ULONG64 brAddress;
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btbPmd = ULong64ToEM_BTB_PMD( PmdValue );
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#define ITANIUM_PA_ADDRESSING_MASK 0x80000FFFFFFFFFFFUI64
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#define ITANIUM_VA_ADDRESSING_MASK 0xE007FFFFFFFFFFFFUI64
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#define ITANIUM_BTB_PMD_ADDRESS_MASK( _pmdValue) \
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( ((_pmdValue) & 0xfffffffffffffff0UI64) & ITANIUM_VA_ADDRESSING_MASK )
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brAddress = ITANIUM_BTB_PMD_ADDRESS_MASK( PmdValue );
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dprintf(
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"%1I64x %1I64x %1I64x 0x%016I64x ",
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btbPmd.b,
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btbPmd.mp,
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btbPmd.slot,
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brAddress
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);
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#if 0
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// Thierry 03/19/2001 - BUGBUG
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// Itanium Processor Programmer's guide does not present the
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// PMD[8-15] branch/interrupt mode 2 formats.
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// I am disabling this check until I can implement it correctly with a context
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// that can distinguish between mode 1 and mode 2 at the time this history was created.
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if ( (btbPmd.b == 0) && (btbPmd.mp == 0)) {
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dprintf("<invalid entry>");
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}
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else
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#endif
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{
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CCHAR symbol[256];
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PCHAR s;
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ULONG64 displacement;
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symbol[0] = '!';
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GetSymbol( brAddress, symbol, &displacement);
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s = (PCHAR)symbol + strlen( (PCHAR)symbol );
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if (s == (PCHAR)symbol ) {
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sprintf( s, (IsPtr64() ? "0x%016I64x" : "0x%08x"), brAddress );
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}
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else {
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if ( displacement ) {
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sprintf( s, (IsPtr64() ? "+0x%I64x" : "+0x%x"), displacement );
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}
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}
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dprintf( "%s", symbol );
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}
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dprintf("\n");
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}
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return;
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} // DisplayBtbPmdIA64()
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VOID
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DisplayBtbIndexPmdIA64(
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IN const PCHAR Header,
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IN ULONG64 PmcValue,
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IN DISPLAY_MODE DisplayMode
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)
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{
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dprintf("%s", Header ? Header : "" );
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if ( DisplayMode >= DISPLAY_MED ) {
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DisplayFullEmReg( PmcValue, EmBtbIndexPmdFields, DisplayMode );
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}
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else {
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EM_BTB_INDEX_PMD emPmd;
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emPmd = ULong64ToEM_BTB_INDEX_PMD( PmcValue );
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dprintf(
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"bbi full\n "
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"%1I64x %1I64x\n",
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emPmd.bbi,
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emPmd.full
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);
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}
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return;
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} // DisplayBtbIndexPmdIA64()
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PDISPLAY_PMC
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GetPmcDisplayFunction(
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char *Str
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)
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{
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LONG pmc;
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char *c;
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c = Str;
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while( isalnum( (int)(*c) ) ) {
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c++;
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}
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*c = '\0';
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pmc = atol( Str );
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switch( pmc ) {
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case 4:
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case 5:
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case 6:
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case 7:
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return( (PDISPLAY_PMC)DisplayGenPmcIA64 );
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case 12:
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return( (PDISPLAY_PMC)DisplayBtbPmcIA64 );
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default:
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if ( !strcmp( Str, "gen" ) ) {
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return( (PDISPLAY_PMC)DisplayGenPmcIA64 );
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}
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if ( !strcmp( Str, "btb" ) ) {
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return( (PDISPLAY_PMC)DisplayBtbPmcIA64 );
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}
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return ( (PDISPLAY_PMC)DisplayPmcIA64 );
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}
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} // IsPmcSupported()
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DECLARE_API( pmc )
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/*++
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Routine Description:
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Dumps a IA-64 Processor PMC Register.
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// Thierry 11/2000: The following scheme could also be used for PMD registers.
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Arguments:
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args - Supplies the address in hex.
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Return Value:
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None
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--*/
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{
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ULONG64 pmcValue = 0;
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ULONG result;
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ULONG flags = 0;
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char *option = NULL;
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PDISPLAY_PMC displayPmc = DisplayGenPmcIA64; // Default display function.
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char *header;
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if ( TargetMachine != IMAGE_FILE_MACHINE_IA64 )
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{
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dprintf("!pmc not implemented for this architecture.\n");
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return S_OK;
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}
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option = strchr( args, '-' );
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if ( option ) {
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displayPmc = GetPmcDisplayFunction( ++option );
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args += (strlen(option) + 2);
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}
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result = sscanf(args,"%I64lx %lx", &pmcValue, &flags);
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if ((result != 1) && (result != 2)) {
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//
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// If user specified "@kpfc*"...
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//
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char kpfcStr[16];
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BOOLEAN valid = FALSE;
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result = sscanf(args,"%s %lx", kpfcStr, &flags);
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if ( (result == 1) || (result == 2) ) {
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if ( option == NULL ) { // If we did not force the display format.
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char *str;
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str = strstr( kpfcStr, "@kpfc" );
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if ( str ) {
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str += strlen("@kpfc");
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displayPmc = GetPmcDisplayFunction( str );
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}
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}
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}
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else {
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dprintf( "USAGE: !pmc [-opt] 0xValue [display_mode:0,1,2]\n"
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"USAGE: !pmc @kpfc* [display_mode:0,1,2]\n"
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"where currently supported option:\n"
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"\tgen [or 4,5,6,7] - generic PMC registers\n"
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"\tbtb [or 12] - branch trace buffer PMC register\n"
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"\tEx: !pmc -btb @r2 2\n"
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);
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return E_INVALIDARG;
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}
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pmcValue = GetExpression(kpfcStr);
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}
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header = (flags > DISPLAY_MIN) ? NULL : " pmc: ";
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(*displayPmc)( header, pmcValue, flags );
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return S_OK;
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} // !pmc
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