661 lines
21 KiB
C
661 lines
21 KiB
C
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//*************************************************************************
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//** **
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//** AMACH1.H **
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//** **
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//** Copyright (c) 1993, 1995 ATI Technologies Inc. **
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//*************************************************************************
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//
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// Supplemental definitions and data structures which are independent
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// of the ATI accelerator family being used. Mach 8/Mach32 specific
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// definitions and structures are in AMACH.H, while Mach 64 specific
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// definitions and structures are in AMACHCX.H.
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//
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// Created the 68800.inc file which includes equates, macros, etc
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// from the following include files:
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// 8514vesa.inc, vga1regs.inc, m32regs.inc, 8514.inc
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//
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// supplement structures and values to the 68800 Family.
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//
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// This is a "C" only file and is NOT derived from any Assembler INC files.
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/********************** PolyTron RCS Utilities
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$Revision: 1.14 $
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$Date: 23 Apr 1996 17:15:20 $
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$Author: RWolff $
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$Log: S:/source/wnt/ms11/miniport/archive/amach1.h_v $
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*
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* Rev 1.14 23 Apr 1996 17:15:20 RWolff
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* Added new memory types (used by ?T) to memory type enumeration.
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*
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* Rev 1.13 22 Dec 1995 14:51:10 RWolff
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* Added support for Mach 64 GT internal DAC.
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*
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* Rev 1.12 08 Sep 1995 16:36:00 RWolff
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* Added support for AT&T 408 DAC (STG1703 equivalent).
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*
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* Rev 1.11 28 Jul 1995 14:39:24 RWolff
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* Added support for the Mach 64 VT (CT equivalent with video overlay).
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*
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* Rev 1.10 30 Jan 1995 11:56:54 RWOLFF
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* Added support for CT internal DAC.
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*
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* Rev 1.9 18 Jan 1995 15:38:02 RWOLFF
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* Added Chrontel CH8398 to DAC type enumeration.
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*
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* Rev 1.8 23 Dec 1994 10:48:40 ASHANMUG
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* ALPHA/Chrontel-DAC
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*
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* Rev 1.7 18 Nov 1994 11:49:16 RWOLFF
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* Added new DAC type DAC_STG1703. This DAC is equivalent to the STG1702,
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* but has its own clock generator. The STG1702/1703 in native mode are
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* programmed differently in 24BPP than when they are strapped for
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* STG1700 emulation.
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*
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* Rev 1.6 14 Sep 1994 15:25:54 RWOLFF
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* Added "most desirable colour ordering" field to query structure,
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* changed RGB<depth>_<order> definitions from enumeration to flags
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* that can be used in this field.
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*
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* Rev 1.5 31 Aug 1994 16:09:02 RWOLFF
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* Added support for TVP3026 DAC and 1152x864, removed dead code.
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*
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* Rev 1.4 19 Aug 1994 17:03:30 RWOLFF
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* Added support for Graphics Wonder, SC15026 DAC, and pixel clock
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* generator independence.
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*
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* Rev 1.3 20 May 1994 13:56:42 RWOLFF
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* Ajith's change: added field for bus type reported by NT to
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* the query structure.
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*
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* Rev 1.2 12 May 1994 11:15:04 RWOLFF
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* Removed redundant definition, added refresh rate to mode table structure.
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*
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* Rev 1.1 04 May 1994 19:22:58 RWOLFF
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* Fix for block write test corrupting the screen when running display applet
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*
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* Rev 1.0 31 Jan 1994 11:26:48 RWOLFF
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* Initial revision.
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*
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* Rev 1.5 14 Jan 1994 15:17:00 RWOLFF
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* Added flag for 1600x1200 mode.
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*
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* Rev 1.4 15 Dec 1993 15:24:34 RWOLFF
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* Added support for SC15021 DAC.
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*
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* Rev 1.3 30 Nov 1993 18:08:58 RWOLFF
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* Renamed definition for Mach 64.
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*
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* Rev 1.2 05 Nov 1993 13:21:10 RWOLFF
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* Added new DAC types and memory sizes.
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*
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* Rev 1.1 08 Oct 1993 10:59:28 RWOLFF
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* Added colour ordering field to mode table.
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*
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* Rev 1.0 03 Sep 1993 14:26:18 RWOLFF
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* Initial revision.
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End of PolyTron RCS section *****************/
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#ifndef BYTE
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typedef unsigned char BYTE;
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#endif /* BYTE */
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#ifndef WORD
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typedef unsigned short WORD;
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#endif /* WORD */
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#ifndef DWORD
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typedef unsigned long DWORD;
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#endif /* DWORD */
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#ifndef UCHAR
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typedef unsigned char UCHAR; /* At least 8 bits, unsigned */
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#endif /* UCHAR */
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#ifndef BOOL
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typedef int BOOL; /* Most efficient Boolean,
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compare against zero only! */
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#endif /* BOOL */
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#ifndef VOID
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#define VOID void
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#endif /* VOID */
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#ifndef PVOID
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typedef void *PVOID; /* Generic untyped pointer */
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#endif /* PVOID */
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// the eeprom i/o port bits are in different locations depending upon
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// what bus and what class of accelerator. This does NOT cover VGA class.
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struct st_eeprom_data {
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WORD iop_out; // I/O port for output
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WORD iop_in; // I/O port for input
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WORD clock; // clock bit to send data
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WORD select; // select eeprom
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WORD chipselect; // chip select
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WORD addr_size; // Address size (fudge for VGA style)
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WORD data_out;
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WORD data_in;
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VOID (*EEcmd)(); // function to write command to eeprom
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WORD (*EEread)(short); // function to read eeprom
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};
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//-----------------------------------------------------------------------
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struct st_crt_mach8_table { // CRT Parameter Tables 11 Words long
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WORD control; // NOT in table, is 7,8,9, or 10
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WORD info; // VGA or 8514 parm format, clock etc.
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BYTE vmode_sel_2;
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BYTE vmode_sel_1;
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BYTE vmode_sel_4;
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BYTE vmode_sel_3;
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BYTE h_disp;
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BYTE h_total;
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BYTE h_sync_wid;
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BYTE h_sync_strt;
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WORD v_total;
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WORD v_disp;
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WORD v_sync_strt;
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BYTE disp_cntl;
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BYTE v_sync_wid;
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WORD clock_sel;
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WORD resvd;
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};
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// EEprom layout for the 8514/Ultra adapters. 64 words by 16 bits = 1K size
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struct st_ee_8514Ultra {
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WORD page_3_2;
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WORD page_2_0;
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WORD monitor;
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WORD vfifo;
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WORD clock;
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WORD shadow;
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WORD display_cntl; // shadow sets 1,2
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WORD v_sync_width; // shadow sets 1,2
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WORD v_sync_strt2;
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WORD v_sync_strt1;
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WORD v_display2;
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WORD v_display1;
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WORD v_total2;
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WORD v_total1;
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WORD h_sync_width; // shadow sets 1,2
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WORD h_sync_strt;
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WORD h_display;
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WORD h_total;
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WORD crc;
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// Updated 8514/Ultra adds 800 and 1280 resolutions
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WORD ext_vfifo; // 800 and 1280 resolutions
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WORD ext_clock;
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WORD ext_shadow;
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WORD ext_display;
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WORD ext_v_sync_width;
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WORD v_sync_strt_800;
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WORD v_display_800;
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WORD v_total_800;
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WORD ext_h_sync_width; // shadow sets for 800 and 1280
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WORD ext_h_sync_strt;
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WORD ext_h_display;
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WORD ext_h_total;
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WORD custom_mode;
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WORD monitor_name[17]; // words 32-48
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WORD v_sync_strt_1280; // word 49
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WORD v_display_1280; // word 50
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WORD v_total_1280; // word 51
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};
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//-----------------------------------------------------------------------
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// EEprom layout for the Graphics Ultra adapters. 64 words by 16 bits = 1K size
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// This is the brute forcing of the VGA Wonder and the 8514 chips
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// both residing on the same board.
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struct st_ee_GraphicsUltra {
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WORD eeprom_counter;
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WORD mouse;
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WORD powerup_mode;
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WORD resvd1[2]; // word 3,4
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WORD monitor;
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WORD resvd2; // word 6
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WORD hz640_72;
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WORD hz800; // word 8
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WORD hz1024;
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WORD hz1280;
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WORD resvd3[2]; // word 11,12
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struct st_crt_mach8_table r640; // CRT parm Table 0 - 640x480 mode
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struct st_crt_mach8_table r800; // CRT parm Table 1 - 640x480 mode
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struct st_crt_mach8_table r1024; // CRT parm Table 2 - 640x480 mode
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struct st_crt_mach8_table r1280; // Table 3 - 1280 OR 132 column text mode
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};
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//-----------------------------------------------------------------------
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// EEprom layout for the 68800 adapters. 128 words by 16 bits = 2K size
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struct st_crt_mach32_table { // CRT Parameter Tables 15 Words long
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WORD info; // VGA or 8514 parm format, clock etc.
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BYTE vmode_sel_2;
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BYTE vmode_sel_1;
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BYTE vmode_sel_4;
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BYTE vmode_sel_3;
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BYTE h_disp;
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BYTE h_total;
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BYTE h_sync_wid;
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BYTE h_sync_strt;
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WORD v_total;
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WORD v_disp;
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WORD v_sync_strt;
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BYTE disp_cntl;
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BYTE v_sync_wid;
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WORD clock_sel; // same as st_crt_mach8 to here.
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WORD mode_size; // word 10
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WORD horz_ovscan;
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WORD vert_ovscan;
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WORD ov_col_blue; // word 13
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WORD ov_col_grn_red; // word 14
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};
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struct st_ee_68800 {
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WORD eeprom_counter;
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WORD mouse;
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WORD powerup_mode;
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WORD ee_rev; // word 3
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WORD cm_indices; // word 4
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WORD monitor;
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WORD aperture; // word 6
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WORD hz640_72;
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WORD hz800; // word 8
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WORD hz1024;
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WORD hz1280;
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WORD hz1150; // word 11
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WORD resvd3; // word 12
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// example crt tables, there are many for each resolution
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// struct st_crt_mach32_table r640; // CRT parm Table 0 - 640x480 mode
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// struct st_crt_mach32_table r800; // CRT parm Table 1 - 640x480 mode
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// struct st_crt_mach32_table r1024; // CRT parm Table 2 - 640x480 mode
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// struct st_crt_mach32_table r1280; // Table 3 - 1280 OR 132 column text mode
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};
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//-----------------------------------------------------------------------
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//--------------- as defined in \68800\test\services.asm
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#define QUERY_GET_SIZE 0 // return query structure size (varying modes)
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#define QUERY_LONG 1 // return query structure filled in
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#define QUERY_SHORT 2 // return short query
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struct query_structure {
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short q_sizeof_struct; // size of structure in bytes (including mode tables)
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UCHAR q_structure_rev; // structure revision number
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UCHAR q_number_modes; // total number of installed modes
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short q_mode_offset; // offset to 1st mode table
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UCHAR q_sizeof_mode; // size of mode table in bytes
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UCHAR q_asic_rev; // gate array revision number
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UCHAR q_status_flags; // status flags
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UCHAR q_VGA_type; // VGA type (enabled or disabled for now)
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UCHAR q_VGA_boundary; // VGA boundary
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UCHAR q_memory_size; // total memory size (VGA + accelerator)
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UCHAR q_DAC_type; // DAC type
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UCHAR q_memory_type; // memory type
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UCHAR q_bus_type; // bus type
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UCHAR q_monitor_alias; // monitor alias and monitor alias enable
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short q_shadow_1; // shadow set 1 state
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short q_shadow_2; // shadow set 2 state
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short q_aperture_addr; // aperture address
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UCHAR q_aperture_cfg; // aperture size
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UCHAR q_mouse_cfg; // mouse configuration
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UCHAR q_reserved;
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short q_desire_x; // selected screen resolution X value
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short q_desire_y;
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short q_pix_depth; // selected bits per pixel
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BYTE *q_bios; // Base address of the BIOS
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BOOL q_eeprom; // TRUE if eeprom present
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BOOL q_ext_bios_fcn; // TRUE if ATI Extended BIOS fcns present
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BOOL q_ignore1280; // TRUE if ignore 1280 table in Mach8 cards
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BOOL q_m32_aper_calc; // TRUE if mach32 aperture addr needs Extra Bits.
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BOOL q_GraphicsWonder; /* TRUE if this is a Graphics Wonder (restricted Mach 32) */
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short q_screen_pitch; // Pixels per display line
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UCHAR q_BlockWrite; /* Whether or not block write mode is available */
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ULONG q_system_bus_type; // bus type reported by NT
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USHORT q_HiColourSupport; /* Colour orders supported for non-paletted modes */
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};
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// Matches BIOS mode table query function up to and including m_overscan_gr
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struct st_mode_table {
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short m_x_size; // horizontal screen resolution
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short m_y_size; // vertical screen resolution
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UCHAR m_pixel_depth; // maximum pixel depth
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UCHAR m_status_flags; // status flags
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// bit 0: if set, non-linear Y addressing
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// bit 1: if set, MUX mode
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// bit 2: if set, PCLK/2
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short m_reserved;
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UCHAR m_vfifo_16; // 16 bpp vfifo depth
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UCHAR m_vfifo_24; // 24 bpp vfifo depth
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short m_clock_select; // clock select
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UCHAR m_h_total; // horizontal total
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UCHAR m_h_disp; // horizontal displayed
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UCHAR m_h_sync_strt; // horizontal sync start
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UCHAR m_disp_cntl; // display control
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UCHAR m_h_sync_wid; // horizontal sync width
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UCHAR m_v_sync_wid; // vertical sync width
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short m_v_total; // vertical total
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short m_v_disp; // vertical displayed
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short m_v_sync_strt; // vertical sync start
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short m_h_overscan; // horizontal overscan configuration
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short m_v_overscan; // vertical overscan configuration
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short m_overscan_8b; // overscan color for 8 bit and blue
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short m_overscan_gr; // overscan color green and red
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short enabled; // what frequency is enabled (eeprom 7,8,9,10 or 11)
|
||
|
|
short control; // clock and control values (CRT table 0)
|
||
|
|
ULONG ClockFreq; /* Clock frequency (in Hertz) */
|
||
|
|
short m_screen_pitch; // pixels per display line
|
||
|
|
WORD ColourDepthInfo; /* Information about colour depth being used */
|
||
|
|
short Refresh; /* Refresh rate, in hertz */
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Masks and flags for the m_clock_select field.
|
||
|
|
* All the flags will be stripped out when the field
|
||
|
|
* is ANDed with CLOCK_SEL_STRIP.
|
||
|
|
*/
|
||
|
|
#define CLOCK_SEL_STRIP 0xFF83 /* AND to remove clock selector/divisor */
|
||
|
|
#define CLOCK_SEL_MUX 0x0004 /* Use mux mode (2x 8bit pixels in 16 bit path) */
|
||
|
|
#define CLOCK_SEL_DIVIDED 0x0008 /* Clock frequency for mux mode already divided by 2 */
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Flags to put in query_structure.q_HiColourSupport to show that
|
||
|
|
* the corresponding colour order is supported.
|
||
|
|
*/
|
||
|
|
#define RGB16_555 0x0001
|
||
|
|
#define RGB16_565 0x0002
|
||
|
|
#define RGB16_655 0x0004
|
||
|
|
#define RGB16_664 0x0008
|
||
|
|
#define RGB24_RGB 0x0010
|
||
|
|
#define RGB24_BGR 0x0020
|
||
|
|
#define RGB32_RGBx 0x0040
|
||
|
|
#define RGB32_xRGB 0x0080
|
||
|
|
#define RGB32_BGRx 0x0100
|
||
|
|
#define RGB32_xBGR 0x0200
|
||
|
|
|
||
|
|
|
||
|
|
//----- Video Memory details
|
||
|
|
enum {
|
||
|
|
VMEM_DRAM_256Kx4 = 0,
|
||
|
|
VMEM_VRAM_256Kx4_SER512,
|
||
|
|
VMEM_VRAM_256Kx4_SER256, /* 68800-3 only */
|
||
|
|
VMEM_DRAM_256Kx16,
|
||
|
|
VMEM_DRAM_256Kx4_GRAP, /* This and following types on 68800-6 only */
|
||
|
|
VMEM_VRAM_256Kx4_SPLIT512,
|
||
|
|
VMEM_VRAM_256Kx16_SPLIT256,
|
||
|
|
VMEM_GENERIC_DRAM, /* This and following types are for Mach 64 ?T only */
|
||
|
|
VMEM_EDO_DRAM,
|
||
|
|
VMEM_BRRAM,
|
||
|
|
VMEM_SDRAM
|
||
|
|
};
|
||
|
|
|
||
|
|
#define VMEM_VRAM_256Kx16_SER256 VMEM_VRAM_256Kx4_SER256 /* 68800-6 only */
|
||
|
|
|
||
|
|
|
||
|
|
//----- BUS types matches the 68800 CONFIG_STATUS_1.BUS_TYPE
|
||
|
|
enum { BUS_ISA_16,
|
||
|
|
BUS_EISA,
|
||
|
|
BUS_MC_16,
|
||
|
|
BUS_MC_32,
|
||
|
|
BUS_LB_386SX,
|
||
|
|
BUS_LB_386DX,
|
||
|
|
BUS_LB_486,
|
||
|
|
BUS_PCI,
|
||
|
|
BUS_ISA_8
|
||
|
|
};
|
||
|
|
|
||
|
|
//----- RAM DAC details, matches CONFIG_STATUS_1.DACTYPE field
|
||
|
|
enum { DAC_ATI_68830,
|
||
|
|
DAC_SIERRA,
|
||
|
|
DAC_TI34075,
|
||
|
|
DAC_BT47x,
|
||
|
|
DAC_BT48x,
|
||
|
|
DAC_ATI_68860,
|
||
|
|
DAC_STG1700,
|
||
|
|
DAC_SC15021,
|
||
|
|
/*
|
||
|
|
* DAC types below are for cases where incompatible DAC types
|
||
|
|
* report the same code in CONFIG_STATUS_1. Since the DAC type
|
||
|
|
* field is 3 bits and can't grow (bits immediately above and
|
||
|
|
* below are already assigned), DAC types 8 and above will
|
||
|
|
* not conflict with reported DAC types but are still legal
|
||
|
|
* in the query structure's DAC type field (8 bit unsigned integer).
|
||
|
|
*/
|
||
|
|
DAC_ATT491,
|
||
|
|
DAC_ATT498,
|
||
|
|
DAC_SC15026,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* DAC types below are not used on 8514/A-compatible accelerators.
|
||
|
|
* Subsequent additions must be made AFTER DAC_SC15026.
|
||
|
|
*/
|
||
|
|
DAC_TVP3026,
|
||
|
|
DAC_IBM514,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* This DAC is more advanced than the STG1700.
|
||
|
|
*/
|
||
|
|
DAC_STG1702,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* DAC is equivalent to STG1702, but it has its own clock
|
||
|
|
* generator which is programmed differently from the one
|
||
|
|
* normally used on the Mach 64.
|
||
|
|
*/
|
||
|
|
DAC_STG1703,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* DAC with equivalent capabilities to STG1703, but not a
|
||
|
|
* drop-in replacement.
|
||
|
|
*/
|
||
|
|
DAC_CH8398,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Yet another DAC which is equivalent to STG1703 but which
|
||
|
|
* is not a drop-in replacement.
|
||
|
|
*/
|
||
|
|
DAC_ATT408,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Internal DAC on Mach 64 CT ASIC.
|
||
|
|
*/
|
||
|
|
DAC_INTERNAL_CT,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Internal DAC on Mach 64 GT ASIC. This is a CT equivalent
|
||
|
|
* with built-in multimedia and games functionality.
|
||
|
|
*/
|
||
|
|
DAC_INTERNAL_GT,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Internal DAC on Mach 64 VT ASIC. This is a CT equivalent
|
||
|
|
* with built-in video overlay circuitry.
|
||
|
|
*/
|
||
|
|
DAC_INTERNAL_VT,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Size definition for arrays indexed by DAC type (assumes enumerated
|
||
|
|
* types are zero-based). This must be the LAST entry in the
|
||
|
|
* DAC type enumeration.
|
||
|
|
*/
|
||
|
|
HOW_MANY_DACs
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Size definition for 8514/A-compatible accelerator arrays indexed by
|
||
|
|
* DAC type.
|
||
|
|
*/
|
||
|
|
#define MAX_OLD_DAC DAC_TVP3026
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Possible knowledge states for block write capability.
|
||
|
|
*/
|
||
|
|
enum {BLOCK_WRITE_UNKNOWN,
|
||
|
|
BLOCK_WRITE_NO,
|
||
|
|
BLOCK_WRITE_YES
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
//Monitor Descriptions are in IBM style
|
||
|
|
#define MONITOR_ID_8514 0x000A
|
||
|
|
#define MONITOR_ID_8515 0x000B
|
||
|
|
#define MONITOR_ID_VGA8503 0x000D
|
||
|
|
#define MONITOR_ID_VGA8513 0x000E
|
||
|
|
#define MONITOR_ID_VGA8512 0x000E
|
||
|
|
#define MONITOR_ID_8604 0x0009
|
||
|
|
#define MONITOR_ID_8507 0x0009
|
||
|
|
#define MONITOR_ID_NOMON 0x000F
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Give identifiers for the different ATI 8514 Products,
|
||
|
|
* as used in the ModelNumber field of the HW_DEVICE_EXTENSION
|
||
|
|
* structure and returned by Mach8_detect().
|
||
|
|
*/
|
||
|
|
enum { _8514_ULTRA = 1,
|
||
|
|
GRAPHICS_ULTRA,
|
||
|
|
MACH32_ULTRA,
|
||
|
|
MACH64_ULTRA,
|
||
|
|
IBM_VGA,
|
||
|
|
WONDER,
|
||
|
|
IBM_8514,
|
||
|
|
IBM_XGA,
|
||
|
|
NO_ATI_ACCEL // No ATI accelerator available
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Number of ATI 8514 products available.
|
||
|
|
*/
|
||
|
|
#define HOW_MANY_8514_PRODS (NO_ATI_ACCEL - _8514_ULTRA) + 1
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Amount of Video RAM installed. The q_memory_size
|
||
|
|
* field of the query_structure uses these definitions
|
||
|
|
* rather than holding a count of the number of bytes.
|
||
|
|
*/
|
||
|
|
enum { VRAM_256k=1,
|
||
|
|
VRAM_512k,
|
||
|
|
VRAM_768k,
|
||
|
|
VRAM_1mb,
|
||
|
|
VRAM_1_25mb,
|
||
|
|
VRAM_1_50mb,
|
||
|
|
VRAM_2mb=8,
|
||
|
|
VRAM_4mb=16,
|
||
|
|
VRAM_6mb=24,
|
||
|
|
VRAM_8mb=32,
|
||
|
|
VRAM_12mb=48,
|
||
|
|
VRAM_16mb=64
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Define bits for resolutions. The q_status_flags field
|
||
|
|
* of the query_structure uses these.
|
||
|
|
*/
|
||
|
|
#define VRES_640x480 0x0001
|
||
|
|
#define VRES_800x600 0x0002
|
||
|
|
#define VRES_1024x768 0x0004
|
||
|
|
#define VRES_1280x1024 0x0008
|
||
|
|
#define VRES_ALT_1 0x0010 /* Usually 1152x900, 1120x750 */
|
||
|
|
#define VRES_1152x864 VRES_ALT_1
|
||
|
|
#define VRES_RESERVED_6 0x0020
|
||
|
|
#define VRES_RESERVED_7 0x0040
|
||
|
|
#define VRES_RESERVED_8 0x0080
|
||
|
|
#define VRES_1600x1200 VRES_ALT_1
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Predefined Video Resolution Modes
|
||
|
|
*/
|
||
|
|
enum { VRES_UNDEFINED,
|
||
|
|
VRES_640x480x4,
|
||
|
|
VRES_640x480x8,
|
||
|
|
VRES_640x480x16,
|
||
|
|
VRES_640x480x24,
|
||
|
|
VRES_640x480x32,
|
||
|
|
|
||
|
|
VRES_800x600x4,
|
||
|
|
VRES_800x600x8,
|
||
|
|
VRES_800x600x16,
|
||
|
|
VRES_800x600x24,
|
||
|
|
VRES_800x600x32,
|
||
|
|
|
||
|
|
VRES_1024x768x4,
|
||
|
|
VRES_1024x768x8,
|
||
|
|
VRES_1024x768x16,
|
||
|
|
VRES_1024x768x24,
|
||
|
|
VRES_1024x768x32,
|
||
|
|
|
||
|
|
VRES_1280x1024x4,
|
||
|
|
VRES_1280x1024x8,
|
||
|
|
VRES_1280x1024x16,
|
||
|
|
VRES_1280x1024x24,
|
||
|
|
VRES_1280x1024x32,
|
||
|
|
|
||
|
|
VRES_ALTERNATEx4,
|
||
|
|
VRES_ALTERNATEx8,
|
||
|
|
VRES_ALTERNATEx16,
|
||
|
|
VRES_ALTERNATEx24,
|
||
|
|
VRES_ALTERNATEx32
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Number of predefined video resolution modes.
|
||
|
|
*/
|
||
|
|
#define HOW_MANY_RES_MODES (VRES_ALTERNATEx32 - VRES_UNDEFINED) + 1
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Numbers used in memory calculations.
|
||
|
|
*/
|
||
|
|
#define ONE_MEG 1048576L
|
||
|
|
#define HALF_MEG 524288L
|
||
|
|
#define QUARTER_MEG 262144L
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Definitions with an underscore in their name will read or write
|
||
|
|
* a portion of a larger register other than the least significant
|
||
|
|
* byte or word. Due to limitations in the Lio<function> routines,
|
||
|
|
* it is not possible to do this by calling (for example) LioInp(port+1).
|
||
|
|
*
|
||
|
|
* _HBLW Access the high byte of the low word (16 and 32 bit registers)
|
||
|
|
* _LBHW Access the low byte of the high word (32 bit registers only)
|
||
|
|
* _HBHW Access the high byte of the high word (32 bit registers only)
|
||
|
|
* _HW Access the high word (32 bit registers only)
|
||
|
|
*/
|
||
|
|
#define INP(port) LioInp(port, 0)
|
||
|
|
#define INP_HBLW(port) LioInp(port, 1)
|
||
|
|
#define INP_LBHW(port) LioInp(port, 2)
|
||
|
|
#define INP_HBHW(port) LioInp(port, 3)
|
||
|
|
#define INPW(port) LioInpw(port, 0)
|
||
|
|
#define INPW_HW(port) LioInpw(port, 2)
|
||
|
|
#define INPD(port) LioInpd(port)
|
||
|
|
|
||
|
|
#define OUTP(port, val) LioOutp(port, val, 0)
|
||
|
|
#define OUTP_HBLW(port, val) LioOutp(port, val, 1)
|
||
|
|
#define OUTP_LBHW(port, val) LioOutp(port, val, 2)
|
||
|
|
#define OUTP_HBHW(port, val) LioOutp(port, val, 3)
|
||
|
|
#define OUTPW(port, val) LioOutpw(port, val, 0)
|
||
|
|
#define OUTPW_HW(port, val) LioOutpw(port, val, 2)
|
||
|
|
#define OUTPD(port, val) LioOutpd(port, val)
|
||
|
|
|
||
|
|
|
||
|
|
//********************** end of AMACH1.H ****************************
|