328 lines
7.1 KiB
NASM
328 lines
7.1 KiB
NASM
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title "Software Interrupts"
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;++
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;
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; Copyright (c) 1992 Microsoft Corporation
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;
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; Module Name:
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;
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; ixswint.asm
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;
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; Abstract:
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;
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; This module implements the software interrupt handlers
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; for x86 machines
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;
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; Author:
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;
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; John Vert (jvert) 2-Jan-1992
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;
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; Environment:
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;
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; Kernel mode only.
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;
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; Revision History:
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;
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;--
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.386p
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.xlist
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include hal386.inc
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include callconv.inc ; calling convention macros
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include i386\ix8259.inc
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include i386\kimacro.inc
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.list
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EXTRNP _KiDeliverApc,3,IMPORT
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EXTRNP _KiDispatchInterrupt,0,IMPORT
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EXTRNP Kei386EoiHelper,0,IMPORT
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EXTRNP _HalEndSystemInterrupt,2
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extrn SWInterruptHandlerTable:dword
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extrn SWInterruptLookUpTable:byte
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ifdef IRQL_METRICS
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extrn HalApcSoftwareIntCount:dword
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extrn HalDpcSoftwareIntCount:dword
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endif
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_TEXT$02 SEGMENT DWORD PUBLIC 'CODE'
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ASSUME DS:FLAT, ES:FLAT, SS:FLAT, FS:NOTHING, GS:NOTHING
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page ,132
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subttl "Request Software Interrupt"
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;++
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;
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; VOID
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; HalRequestSoftwareInterrupt (
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; IN KIRQL RequestIrql
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; )
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;
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; Routine Description:
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;
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; This routine is used to request a software interrupt to the
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; system. Also, this routine checks to see if any software
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; interrupt should be generated.
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; The following condition will cause software interrupt to
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; be simulated:
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; any software interrupt which has higher priority than
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; current IRQL's is pending.
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;
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; NOTE: This routine simulates software interrupt as long as
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; any pending SW interrupt level is higher than the current
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; IRQL, even when interrupts are disabled.
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;
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; Arguments:
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;
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; (cl) = RequestIrql - Supplies the request IRQL value
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;
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; Return Value:
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;
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; None.
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;
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;--
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cPublicFastCall HalRequestSoftwareInterrupt ,1
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cPublicFpo 0, 1
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mov eax,1
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shl eax, cl ; convert to mask
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pushfd ; save interrupt mode
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cli ; disable interrupt
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or PCR[PcIRR], eax ; set the request bit
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mov cl, PCR[PcIrql] ; get current IRQL
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mov eax, PCR[PcIRR] ; get SW interrupt request register
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and eax, 3 ; mask off pending HW interrupts
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xor edx, edx
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mov dl, SWInterruptLookUpTable[eax] ; get the highest pending
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; software interrupt level
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cmp dl, cl ; Is highest SW int level > irql?
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jbe short KsiExit ; No, jmp ksiexit
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call SWInterruptHandlerTable[edx*4] ; yes, simulate interrupt
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; to the appropriate handler
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KsiExit:
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popfd ; restore original interrupt mode
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fstRET HalRequestSoftwareInterrupt
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fstENDP HalRequestSoftwareInterrupt
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page ,132
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subttl "Request Software Interrupt"
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;++
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;
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; VOID
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; HalClearSoftwareInterrupt (
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; IN KIRQL RequestIrql
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; )
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;
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; Routine Description:
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;
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; This routine is used to clear a possible pending software interrupt.
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; Support for this function is optional, and allows the kernel to
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; reduce the number of spurious software interrupts it receives/
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;
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; Arguments:
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;
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; (cl) = RequestIrql - Supplies the request IRQL value
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;
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; Return Value:
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;
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; None.
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;
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;--
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cPublicFastCall HalClearSoftwareInterrupt ,1
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cPublicFpo 0, 0
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mov eax,1
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shl eax, cl ; convert to mask
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not eax
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and PCR[PcIRR], eax ; clear pending irr bit
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fstRET HalClearSoftwareInterrupt
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fstENDP HalClearSoftwareInterrupt
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page ,132
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subttl "Dispatch Interrupt"
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;++
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;
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; VOID
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; HalpDispatchInterrupt(
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; VOID
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; );
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;
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; Routine Description:
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;
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; This routine is the interrupt handler for a software interrupt generated
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; at DISPATCH_LEVEL. Its function is to save the machine state, raise
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; Irql to DISPATCH_LEVEL, dismiss the interrupt, and call the DPC
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; delivery routine.
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;
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; Arguments:
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;
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; None
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; Interrupt is disabled
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;
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; Return Value:
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;
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; None.
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;
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;--
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ENTER_DR_ASSIST hdpi_a, hdpi_t
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align dword
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public _HalpDispatchInterrupt
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_HalpDispatchInterrupt proc
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ifdef IRQL_METRICS
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lock inc HalDpcSoftwareIntCount
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endif
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;
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; Create IRET frame on stack
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;
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pop eax
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pushfd
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push cs
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push eax
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;
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; Save machine state on trap frame
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;
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ENTER_INTERRUPT hdpi_a, hdpi_t
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.FPO ( FPO_LOCALS+1, 0, 0, 0, 0, FPO_TRAPFRAME )
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public _HalpDispatchInterrupt2ndEntry
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_HalpDispatchInterrupt2ndEntry:
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; Save previous IRQL and set new priority level
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push PCR[PcIrql] ; save previous IRQL
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mov byte ptr PCR[PcIrql], DISPATCH_LEVEL; set new irql
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and dword ptr PCR[PcIRR], not (1 shl DISPATCH_LEVEL) ; clear the pending bit in IRR
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;
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; Now it is safe to enable interrupt to allow higher priority interrupt
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; to come in.
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;
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sti
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;
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; Go do Dispatch Interrupt processing
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;
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stdCall _KiDispatchInterrupt
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;
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; Do interrupt exit processing
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;
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SOFT_INTERRUPT_EXIT ; will do an iret
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_HalpDispatchInterrupt endp
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page ,132
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subttl "APC Interrupt"
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;++
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;
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; HalpApcInterrupt(
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; VOID
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; );
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;
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; Routine Description:
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;
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; This routine is entered as the result of a software interrupt generated
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; at APC_LEVEL. Its function is to save the machine state, raise Irql to
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; APC_LEVEL, dismiss the interrupt, and call the APC delivery routine.
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;
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; Arguments:
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;
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; None
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; Interrupt is Disabled
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;
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; Return Value:
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;
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; None.
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;
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;--
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ENTER_DR_ASSIST hapc_a, hapc_t
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align dword
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public _HalpApcInterrupt
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_HalpApcInterrupt proc
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ifdef IRQL_METRICS
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lock inc HalApcSoftwareIntCount
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endif
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;
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; Create IRET frame on stack
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;
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pop eax
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pushfd
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push cs
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push eax
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;
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; Save machine state in trap frame
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;
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ENTER_INTERRUPT hapc_a, hapc_t
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.FPO ( FPO_LOCALS+1, 0, 0, 0, 0, FPO_TRAPFRAME )
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public _HalpApcInterrupt2ndEntry
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_HalpApcInterrupt2ndEntry:
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;
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; Save previous IRQL and set new priority level
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;
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push PCR[PcIrql] ; save previous Irql
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mov byte ptr PCR[PcIrql], APC_LEVEL ; set new Irql
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and dword ptr PCR[PcIRR], not (1 shl APC_LEVEL) ; dismiss pending APC
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;
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; Now it is safe to enable interrupt to allow higher priority interrupt
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; to come in.
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;
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sti
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;
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; call the APC delivery routine.
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;
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mov eax, [ebp]+TsSegCs ; get interrupted code's CS
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and eax, MODE_MASK ; extract the mode
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test dword ptr [ebp]+TsEFlags, EFLAGS_V86_MASK
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jz short @f
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or eax, MODE_MASK ; If v86 frame, then set user_mode
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@@:
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;
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; call APC deliver routine
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; Previous mode
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; Null exception frame
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; Trap frame
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stdCall _KiDeliverApc, <eax, 0,ebp>
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;
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;
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; Do interrupt exit processing
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;
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SOFT_INTERRUPT_EXIT ; will do an iret
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_HalpApcInterrupt endp
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_TEXT$02 ends
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end
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