264 lines
6.8 KiB
C
264 lines
6.8 KiB
C
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/*++
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Copyright (c) 1989 Microsoft Corporation
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Module Name:
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iafptrap.c
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Abstract:
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This is based on the i386 trapc.c module with very minor changes.
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It would be nice if there wasn't so much duplicate code so that
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fixes to that file would carry over to this one...
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This module contains some trap handling code written in C.
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Only by the kernel.
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Author:
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Ken Reneris 6-9-93
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Revision History:
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--*/
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#include "ki.h"
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#include "ia32def.h"
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NTSTATUS
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Ki386CheckDivideByZeroTrap (
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IN PKTRAP_FRAME UserFrame
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);
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#ifdef ALLOC_PRAGMA
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#pragma alloc_text(PAGE, Ki386CheckDivideByZeroTrap)
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#endif
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#define REG(field) ((ULONG_PTR)(&((KTRAP_FRAME *)0)->field))
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#define GETREG(frame,reg) ((PULONG) (((ULONG_PTR) frame)+reg))[0]
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typedef struct {
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UCHAR RmDisplaceOnly; // RM of displacment only, no base reg
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UCHAR RmSib; // RM of SIB
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UCHAR RmDisplace; // bit mask of RMs which have a displacement
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UCHAR Disp; // sizeof displacement (in bytes)
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} KMOD, *PKMOD;
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static ULONG_PTR RM32[] = {
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/* 000 */ REG(IntV0), // EAX
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/* 001 */ REG(IntT2), // ECX
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/* 010 */ REG(IntT3), // EDX
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/* 011 */ REG(IntT4), // EBX
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/* 100 */ REG(IntSp), // ESP
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/* 101 */ REG(IntTeb), // EBP
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/* 110 */ REG(IntT5), // ESI
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/* 111 */ REG(IntT6) // EDI
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};
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static KMOD MOD32[] = {
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/* 00 */ 5, 4, 0x20, 4,
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/* 01 */ 0xff, 4, 0xff, 1,
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/* 10 */ 0xff, 4, 0xff, 4,
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/* 11 */ 0xff, 0xff, 0x00, 0
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} ;
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static struct {
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UCHAR Opcode1, Opcode2; // instruction opcode
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UCHAR ModRm, type; // if 2nd part of opcode is encoded in ModRm
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} NoWaitNpxInstructions[] = {
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/* FNINIT */ 0xDB, 0xE3, 0, 1,
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/* FNCLEX */ 0xDB, 0xE2, 0, 1,
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/* FNSTENV */ 0xD9, 0x06, 1, 1,
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/* FNSAVE */ 0xDD, 0x06, 1, 1,
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/* FNSTCW */ 0xD9, 0x07, 1, 2,
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/* FNSTSW */ 0xDD, 0x07, 1, 3,
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/* FNSTSW AX*/ 0xDF, 0xE0, 0, 4,
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0x00, 0x00, 0, 1
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};
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NTSTATUS
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Ki386CheckDivideByZeroTrap (
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IN PKTRAP_FRAME UserFrame
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)
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/*++
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Routine Description:
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This function gains control when the x86 processor generates a
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divide by zero trap. The x86 design generates such a trap on
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divide by zero and on division overflows. In order to determine
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which expection code to dispatch, the divisor of the "div" or "idiv"
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instruction needs to be inspected.
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Arguments:
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UserFrame - Trap frame of the divide by zero trap
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Return Value:
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exception code dispatch
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--*/
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{
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ULONG operandsize, operandmask, i;
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ULONG_PTR accum;
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PUCHAR istream;
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UCHAR ibyte, rm;
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PKMOD Mod;
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BOOLEAN fPrefix;
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NTSTATUS status;
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BOOLEAN fHighRm8;
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status = STATUS_INTEGER_DIVIDE_BY_ZERO;
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fHighRm8 = FALSE;
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try {
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//
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// read instruction prefixes
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//
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fPrefix = TRUE;
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operandsize = 4;
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operandmask = 0xffffffff;
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istream = (PUCHAR) (ULONG_PTR) EIP(UserFrame);
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while (fPrefix) {
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ibyte = ProbeAndReadUchar(istream);
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istream++;
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switch (ibyte) {
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case 0x2e: // cs override
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case 0x36: // ss override
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case 0x3e: // ds override
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case 0x26: // es override
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case 0x64: // fs override
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case 0x65: // gs override
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case 0xF3: // rep
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case 0xF2: // rep
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case 0xF0: // lock
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break;
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case 0x66:
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// 16 bit operand override
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operandsize = 2;
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operandmask = 0xffff;
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break;
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case 0x67:
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// 16 bit address size override
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// this is some non-flat code
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goto try_exit;
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default:
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fPrefix = FALSE;
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break;
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}
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}
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//
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// Check instruction opcode
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//
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if (ibyte != 0xf7 && ibyte != 0xf6) {
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// this is not a DIV or IDIV opcode
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goto try_exit;
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}
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if (ibyte == 0xf6) {
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// this is a byte div or idiv
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operandsize = 1;
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operandmask = 0xff;
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}
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//
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// Get Mod R/M
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//
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ibyte = ProbeAndReadUchar (istream);
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istream++;
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Mod = MOD32 + (ibyte >> 6);
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rm = ibyte & 7;
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//
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// put register values into accum
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//
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if (operandsize == 1 && (ibyte & 0xc0) == 0xc0) {
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if ((rm & 4) != 0) {
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fHighRm8 = TRUE;
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}
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}
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accum = 0;
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if (rm != Mod->RmDisplaceOnly) {
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if (rm == Mod->RmSib) {
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// get SIB
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ibyte = ProbeAndReadUchar(istream);
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istream++;
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i = (ibyte >> 3) & 7;
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if (i != 4) {
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accum = GETREG(UserFrame, RM32[i]);
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accum = accum << (ibyte >> 6); // apply scaler
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}
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i = ibyte & 7;
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accum = accum + GETREG(UserFrame, RM32[i]);
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} else {
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//
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// get register's value
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//
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if (fHighRm8 == TRUE) {
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accum = GETREG(UserFrame, RM32[rm & 3]);
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accum = accum >> 8;
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} else {
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accum = GETREG(UserFrame, RM32[rm]);
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}
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}
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}
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//
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// apply displacement to accum
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//
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if (Mod->RmDisplace & (1 << rm)) {
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if (Mod->Disp == 4) {
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i = ProbeAndReadUlong ((PULONG) istream);
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} else {
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ibyte = ProbeAndReadChar (istream);
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i = (signed long) ((signed char) ibyte); // sign extend
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}
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accum += i;
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}
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//
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// if this is an effective address, go get the data value
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//
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if (Mod->Disp) {
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switch (operandsize) {
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case 1: accum = ProbeAndReadUchar((PUCHAR) accum); break;
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case 2: accum = ProbeAndReadUshort((PUSHORT) accum); break;
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case 4: accum = ProbeAndReadUlong((PULONG) accum); break;
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}
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}
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//
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// accum now contains the instruction operand, see if the
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// operand was really a zero
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//
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if (accum & operandmask) {
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// operand was non-zero, must be an overflow
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status = STATUS_INTEGER_OVERFLOW;
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}
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try_exit: ;
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} except (EXCEPTION_EXECUTE_HANDLER) {
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// do nothing...
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}
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return status;
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}
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