705 lines
16 KiB
ArmAsm
705 lines
16 KiB
ArmAsm
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//++
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//
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// Module Name:
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//
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// thunk.s
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//
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// Abstract:
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//
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// This module implements all Win32 thunks. This includes the
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/// first level thread starter...
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//
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// Author:
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//
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// 12-Oct-1995
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//
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// Revision History:
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//
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//--
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#include "ksia64.h"
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.file "thunk.s"
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//++
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//
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// VOID
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// BaseThreadStartThunk(
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// IN PTHREAD_START_ROUTINE StartRoutine,
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// IN PVOID ThreadParameter
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// )
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//
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// Routine Description:
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//
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// This function calls to the portable thread starter after moving
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// its arguments from registers to the argument registers.
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//
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// Arguments:
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//
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// s1 - StartRoutine
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// s2 - ThreadParameter
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//
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// Return Value:
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//
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// Never Returns
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//
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//--
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PublicFunction(BaseThreadStart)
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LEAF_ENTRY(BaseThreadStartThunk)
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LEAF_SETUP(0,0,2,0)
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mov out0=s1
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mov out1=s2
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br.many BaseThreadStart
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;;
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//
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// never come back here
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//
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LEAF_EXIT(BaseThreadStartThunk)
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//++
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//
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// VOID
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// BaseProcessStartThunk(
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// IN PTHREAD_START_ROUTINE StartRoutine,
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// IN PVOID ThreadParameter
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// )
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//
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// Routine Description:
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//
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// This function calls to the portable thread starter after moving
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// its arguments from registers to the argument registers.
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//
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// Arguments:
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//
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// s1 - StartRoutine
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// s2 - ThreadParameter
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//
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// Return Value:
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//
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// Never Returns
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//
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//--
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PublicFunction(BaseProcessStart)
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LEAF_ENTRY(BaseProcessStartThunk)
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alloc t22 = ar.pfs, 0, 0, 1, 0
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mov out0=s1
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br BaseProcessStart // jump process wrapper.
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;;
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LEAF_EXIT(BaseProcessStartThunk)
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//++
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//
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// VOID
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// SwitchToFiber(
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// PFIBER NewFiber
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// )
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//
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// Routine Description:
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//
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// This function saves the state of the current fiber and switches
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// to the new fiber.
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//
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// Arguments:
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//
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// NewFiber (a0) - Supplies the address of the new fiber.
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//
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// Return Value:
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//
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// None
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//
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//--
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LEAF_ENTRY(SwitchToFiber)
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// local register aliases
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rOldFb = t21
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rOldCx = t20
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rNewFb = t19
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rNewCx = t18
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rA0 = t17
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dest1 = t10
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dest2 = t11
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dest4 = t12
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dest5 = t13
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//
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// set up pointers to old and new fiber and context records
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//
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add rNewFb = zero, a0
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add rNewCx = FbFiberContext, a0
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add t0 = TeFiberData, teb
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;;
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LDPTR (t1, t0)
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mov rA0 = a0
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;;
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add rOldFb = 0, t1
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add rOldCx = FbFiberContext, t1
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;;
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//
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// step 1
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// save current state in to old fiber's fiber and context rec
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//
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//
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// save fiber exception list and stack info
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//
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add dest1 = TeExceptionList, teb // TEB
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add dest2 = FbExceptionList, rOldFb // Old fiber
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;;
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LDPTRINC (t0, dest1, TeStackLimit - TeExceptionList)
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;;
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STPTRINC (dest2, t0, FbStackLimit - FbExceptionList)
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;;
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LDPTR (t0, dest1)
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;;
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STPTR (dest2, t0)
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//
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// also save RSE stack info
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//
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add dest4 = TeBStoreLimit, teb
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add dest5 = FbBStoreLimit, rOldFb
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;;
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LDPTR (t1, dest4)
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;;
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STPTR (dest5, t1)
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;;
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//
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// spill low non-volatile fp registers 0-3, 5-19
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//
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add dest1 = CxFltS0, rOldCx
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add dest2 = CxFltS1, rOldCx
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;;
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mov t2 = ar.fpsr //FPSR
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mov t3 = ar28 //FSR
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mov t4 = ar29 //FIR
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mov t5 = ar30 //FDR
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stf.spill [dest1] = fs0, CxFltS2 - CxFltS0
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stf.spill [dest2] = fs1, CxFltS3 - CxFltS1
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;;
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stf.spill [dest1] = fs2, CxFltS5 - CxFltS2
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stf.spill [dest2] = fs3, CxFltS6 - CxFltS3
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;;
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stf.spill [dest1] = fs5, CxFltS7 - CxFltS5
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stf.spill [dest2] = fs6, CxFltS8 - CxFltS6
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;;
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stf.spill [dest1] = fs7, CxFltS9 - CxFltS7
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stf.spill [dest2] = fs8, CxFltS10 - CxFltS8
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;;
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stf.spill [dest1] = fs9, CxFltS11 - CxFltS9
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stf.spill [dest2] = fs10, CxFltS12 - CxFltS10
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;;
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stf.spill [dest1] = fs11, CxFltS13 - CxFltS11
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stf.spill [dest2] = fs12, CxFltS14 - CxFltS12
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;;
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stf.spill [dest1] = fs13, CxFltS15 - CxFltS13
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stf.spill [dest2] = fs14, CxFltS16 - CxFltS14
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;;
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stf.spill [dest1] = fs15, CxFltS17 - CxFltS15
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stf.spill [dest2] = fs16, CxFltS18 - CxFltS16
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;;
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stf.spill [dest1] = fs17, CxFltS19 - CxFltS17
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stf.spill [dest2] = fs18
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;;
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stf.spill [dest1] = fs19
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//
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// fp status registers
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//
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add dest1 = CxStFPSR, rOldCx
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add dest2 = CxStFSR, rOldCx
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;;
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st8 [dest1] = t2
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;;
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st8 [dest2] = t3, CxStFDR - CxStFSR
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add dest1 = CxStFIR, rOldCx
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;;
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st8 [dest1] = t4
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;;
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st8 [dest2] = t5
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//
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// save old unat before starting the spills
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//
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mov t6 = ar.unat
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add dest4 = CxApUNAT, rOldCx
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;;
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st8 [dest4] = t6
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mov ar.unat = zero
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;;
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// ordering ? should not start spilling before unat is saved
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// save sp and preserved int registers
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add dest4 = CxIntS0, rOldCx
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add dest5 = CxIntSp, rOldCx
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;;
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.mem.offset 0,0
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st8.spill [dest5] = sp, CxIntS1 - CxIntSp
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.mem.offset 8,0
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st8.spill [dest4] = s0, CxIntS2 - CxIntS0
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;;
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.mem.offset 0,0
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st8.spill [dest5] = s1, CxIntS3 - CxIntS1
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.mem.offset 8,0
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st8.spill [dest4] = s2
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;;
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st8.spill [dest5] = s3
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// save predicates
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add dest4 = CxPreds, rOldCx
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add dest5 = CxBrRp, rOldCx
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mov t7 = pr
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;;
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st8 [dest4] = t7, CxBrS0 - CxPreds
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// save preserved branch registers
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mov t8 = brp
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;;
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st8 [dest5] = t8, CxBrS1 - CxBrRp
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mov t9 = bs0
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;;
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st8 [dest4] = t9, CxBrS2 - CxBrS0
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mov t1 = bs1
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;;
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st8 [dest5] = t1, CxBrS3 - CxBrS1
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mov t2 = bs2
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;;
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st8 [dest4] = t2, CxBrS4 - CxBrS2
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mov t3 = bs3
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;;
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st8 [dest5] = t3
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mov t4 = bs4
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;;
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st8 [dest4] = t4
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// save other applicatin registers
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//
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mov t6 = ar.lc
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add dest4 = CxApLC, rOldCx
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add dest5 = CxApEC, rOldCx
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;;
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st8 [dest4] = t6, CxRsPFS - CxApLC
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mov t7 = ar.ec
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;;
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st8 [dest5] = t7, CxRsRSC - CxApEC
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//
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// save RSE stuff
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//
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mov t8 = ar.pfs
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;;
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st8 [dest4] = t8
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mov t9 = ar.rsc
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;;
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st8 [dest5] = t9
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dep t9 = 0, t9, RSC_MODE, 2 // put in lazy mode
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;;
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mov ar.rsc = t9
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//
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// since we do not use locals, we don't need cover..
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// cover
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// ;;
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;;
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flushrs
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dep t9 = 0, t9, RSC_LOADRS, RSC_LOADRS_LEN // invalidate all
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;;
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mov ar.rsc = t9
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;;
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loadrs
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add dest1 = CxRsRNAT, rOldCx
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add dest2 = CxRsBSP, rOldCx
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;;
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mov t1 = ar.bsp
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;;
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st8 [dest2] = t1
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mov t2 = ar.rnat
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;;
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st8 [dest1] = t2
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// save all spilled NaT bits in in IntNats
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add dest1 = CxIntNats, rOldCx
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mov t3 = ar.unat
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;;
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st8 [dest1] = t3
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//
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// step 2
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// setup the state for new fiber from new context/fiber record
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//
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// restore exception list and stack info fist
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//
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add dest1 = TeExceptionList, teb
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add dest2 = FbExceptionList, rNewFb
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;;
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LDPTRINC (t0, dest2, FbStackBase - FbExceptionList)
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;;
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STPTRINC (dest1, t0, TeStackBase - TeExceptionList)
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
LDPTRINC (t0, dest2, FbStackLimit - FbStackBase)
|
|||
|
|
;;
|
|||
|
|
STPTRINC (dest1, t0, TeStackLimit - TeStackBase)
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
LDPTR (t0, dest2)
|
|||
|
|
;;
|
|||
|
|
STPTR (dest1, t0)
|
|||
|
|
|
|||
|
|
add dest4 = TeDeallocationStack, teb
|
|||
|
|
add dest5 = FbDeallocationStack, rNewFb
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
LDPTR (t1, dest5)
|
|||
|
|
;;
|
|||
|
|
STPTR (dest4, t1)
|
|||
|
|
|
|||
|
|
// also restore RSE stack info
|
|||
|
|
//
|
|||
|
|
add dest4 = TeBStoreLimit, teb
|
|||
|
|
add dest5 = FbBStoreLimit, rNewFb
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
LDPTRINC (t2, dest5, FbDeallocationBStore - FbBStoreLimit)
|
|||
|
|
;;
|
|||
|
|
STPTRINC (dest4, t2, TeDeallocationBStore - TeBStoreLimit)
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
LDPTR (t3, dest5)
|
|||
|
|
;;
|
|||
|
|
STPTR (dest4, t3)
|
|||
|
|
|
|||
|
|
// set the fiber pointer in teb to point to new fiber
|
|||
|
|
//
|
|||
|
|
add dest1 = TeFiberData, teb
|
|||
|
|
;;
|
|||
|
|
STPTR (dest1, rA0)
|
|||
|
|
|
|||
|
|
|
|||
|
|
// set up new RSE first
|
|||
|
|
|
|||
|
|
add dest1 = CxRsRSC, rNewCx
|
|||
|
|
add dest2 = CxRsBSP, rNewCx
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ld8 t2 = [dest2], CxRsRNAT - CxRsBSP
|
|||
|
|
;;
|
|||
|
|
mov ar.bspstore = t2
|
|||
|
|
invala
|
|||
|
|
|
|||
|
|
ld8 t3 = [dest2]
|
|||
|
|
;;
|
|||
|
|
mov ar.rnat = t3
|
|||
|
|
|
|||
|
|
ld8 t4 = [dest1]
|
|||
|
|
;;
|
|||
|
|
mov ar.rsc = t4
|
|||
|
|
|
|||
|
|
add dest4 = CxRsPFS, rNewCx
|
|||
|
|
;;
|
|||
|
|
ld8 t5 = [dest4]
|
|||
|
|
;;
|
|||
|
|
mov ar.pfs = t5
|
|||
|
|
|
|||
|
|
|
|||
|
|
// restore floating point registers
|
|||
|
|
|
|||
|
|
add dest1 = CxFltS0, rNewCx
|
|||
|
|
add dest2 = CxFltS1, rNewCx
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs0 = [dest1], CxFltS2 - CxFltS0
|
|||
|
|
ldf.fill fs1 = [dest2] , CxFltS3 - CxFltS1
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs2 = [dest1], CxFltS5 - CxFltS2
|
|||
|
|
ldf.fill fs3 = [dest2], CxFltS6 - CxFltS3
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs5 = [dest1], CxFltS7 - CxFltS5
|
|||
|
|
ldf.fill fs6 = [dest2], CxFltS8 - CxFltS6
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs7 = [dest1], CxFltS9 - CxFltS7
|
|||
|
|
ldf.fill fs8 = [dest2], CxFltS10 - CxFltS8
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs9 = [dest1], CxFltS11 - CxFltS9
|
|||
|
|
ldf.fill fs10 = [dest2], CxFltS12 - CxFltS10
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs11 = [dest1], CxFltS13 - CxFltS11
|
|||
|
|
ldf.fill fs12 = [dest2], CxFltS14 - CxFltS12
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs13 = [dest1], CxFltS15 - CxFltS13
|
|||
|
|
ldf.fill fs14 = [dest2], CxFltS16 - CxFltS14
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs15 = [dest1], CxFltS17 - CxFltS15
|
|||
|
|
ldf.fill fs16 = [dest2], CxFltS18 - CxFltS16
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs17 = [dest1], CxFltS19 - CxFltS17
|
|||
|
|
ldf.fill fs18 = [dest2]
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ldf.fill fs19 = [dest1]
|
|||
|
|
|
|||
|
|
add dest1 = CxStFPSR, rNewCx
|
|||
|
|
add dest2 = CxStFSR, rNewCx
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ld8 t2 = [dest1] //FPSR
|
|||
|
|
;;
|
|||
|
|
mov ar.fpsr = t2
|
|||
|
|
|
|||
|
|
ld8 t3 = [dest2], CxStFDR - CxStFSR
|
|||
|
|
add dest1 = CxStFIR, rNewCx
|
|||
|
|
;;
|
|||
|
|
mov ar28 = t3 //FSR
|
|||
|
|
|
|||
|
|
ld8 t4 = [dest1]
|
|||
|
|
;;
|
|||
|
|
mov ar29 = t4 //FIR
|
|||
|
|
|
|||
|
|
ld8 t5 = [dest2]
|
|||
|
|
;;
|
|||
|
|
mov ar30 = t5 //FDR
|
|||
|
|
|
|||
|
|
//
|
|||
|
|
// restore ar.unat first, so that fills will restore the
|
|||
|
|
// nat bits correctly
|
|||
|
|
//
|
|||
|
|
add dest4 = CxIntNats, rNewCx
|
|||
|
|
;;
|
|||
|
|
ld8 t6 = [dest4]
|
|||
|
|
;;
|
|||
|
|
mov ar.unat = t6
|
|||
|
|
|
|||
|
|
// now start filling the preserved integer registers
|
|||
|
|
//
|
|||
|
|
add dest4 = CxIntS0, rNewCx
|
|||
|
|
add dest5 = CxIntSp, rNewCx
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
|
|||
|
|
ld8.fill sp = [dest5], CxIntS1 - CxIntSp
|
|||
|
|
|
|||
|
|
// save preserved integer registers
|
|||
|
|
|
|||
|
|
ld8.fill s0 = [dest4], CxIntS2 - CxIntS0
|
|||
|
|
;;
|
|||
|
|
ld8.fill s1 = [dest5], CxIntS3 - CxIntS1
|
|||
|
|
|
|||
|
|
ld8.fill s2 = [dest4]
|
|||
|
|
;;
|
|||
|
|
ld8.fill s3 = [dest5]
|
|||
|
|
|
|||
|
|
// restore predicates and branch registers
|
|||
|
|
|
|||
|
|
add dest4 = CxPreds, rNewCx
|
|||
|
|
add dest5 = CxBrRp, rNewCx
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ld8 t7 = [dest4], CxBrS0 - CxPreds
|
|||
|
|
;;
|
|||
|
|
mov pr = t7
|
|||
|
|
|
|||
|
|
ld8 t8 = [dest5], CxBrS1 - CxBrRp
|
|||
|
|
;;
|
|||
|
|
mov brp = t8
|
|||
|
|
|
|||
|
|
ld8 t9 = [dest4], CxBrS2 - CxBrS0
|
|||
|
|
;;
|
|||
|
|
mov bs0 = t9
|
|||
|
|
|
|||
|
|
ld8 t1 = [dest5], CxBrS3 - CxBrS1
|
|||
|
|
;;
|
|||
|
|
mov bs1 = t1
|
|||
|
|
|
|||
|
|
ld8 t2 = [dest4], CxBrS4 - CxBrS2
|
|||
|
|
;;
|
|||
|
|
mov bs2 = t2
|
|||
|
|
|
|||
|
|
ld8 t3 = [dest5]
|
|||
|
|
;;
|
|||
|
|
mov bs3 = t3
|
|||
|
|
|
|||
|
|
ld8 t4 = [dest4]
|
|||
|
|
;;
|
|||
|
|
mov bs4 = t4
|
|||
|
|
|
|||
|
|
|
|||
|
|
// restore other applicatin registers
|
|||
|
|
//
|
|||
|
|
add dest4 = CxApLC, rNewCx
|
|||
|
|
add dest5 = CxApEC, rNewCx
|
|||
|
|
;;
|
|||
|
|
|
|||
|
|
ld8 t6 = [dest4]
|
|||
|
|
;;
|
|||
|
|
mov ar.lc = t6
|
|||
|
|
|
|||
|
|
ld8 t7 = [dest5]
|
|||
|
|
;;
|
|||
|
|
mov ar.ec = t7
|
|||
|
|
|
|||
|
|
|
|||
|
|
// finally restore the unat register
|
|||
|
|
//
|
|||
|
|
add dest4 = CxApUNAT, rNewCx
|
|||
|
|
;;
|
|||
|
|
ld8 t5 = [dest4]
|
|||
|
|
;;
|
|||
|
|
mov ar.unat = t5
|
|||
|
|
|
|||
|
|
br.ret.sptk brp
|
|||
|
|
|
|||
|
|
//
|
|||
|
|
// this will execute BaseFiberStart if we are switching to
|
|||
|
|
// the new fiber for the first time. otherwise, it will
|
|||
|
|
// return back to new fiber.
|
|||
|
|
//
|
|||
|
|
|
|||
|
|
LEAF_EXIT(SwitchToFiber)
|
|||
|
|
|
|||
|
|
|
|||
|
|
#if 0
|
|||
|
|
LEAF_ENTRY(GenericIACall)
|
|||
|
|
LEAF_SETUP(1,95,0,0)
|
|||
|
|
|
|||
|
|
//
|
|||
|
|
// Load iA state for iVE. Since working with flat 32 in NT,
|
|||
|
|
// much of the state is a constant (per Freds document)
|
|||
|
|
//
|
|||
|
|
mov rBase = teb // Get TEB pointer
|
|||
|
|
|
|||
|
|
// load up selector register constants, we dont care about GS
|
|||
|
|
mov rES = _DataSelector
|
|||
|
|
mov rSS = _DataSelector
|
|||
|
|
mov rDS = _DataSelector
|
|||
|
|
mov rGS = _DataSelector
|
|||
|
|
mov rCS = _CodeSelector
|
|||
|
|
mov rFS = _FsSelector
|
|||
|
|
mov rLDT = _LdtSelector
|
|||
|
|
//
|
|||
|
|
// Setup pointer to iA32 Resources relative to TEB
|
|||
|
|
//
|
|||
|
|
mov r23 = rIA32Rsrc
|
|||
|
|
add rIA32Ptr = rBase, r23
|
|||
|
|
|
|||
|
|
ld8 rGDTD = [rIA32Ptr], 8 // load LDT Descriptor registers
|
|||
|
|
ld8 rLDTD = [rIA32Ptr], 8 // GDT Descriptor is 8 bytes after
|
|||
|
|
ld8 rFSD = [rIA32Ptr] // FSDescriptor is 8 bytes after
|
|||
|
|
//
|
|||
|
|
// Eflag should not be touched by stub routines...
|
|||
|
|
//
|
|||
|
|
|
|||
|
|
//
|
|||
|
|
// Since CSD and SSD are in AR registers and since they are saved
|
|||
|
|
// on context switches, dont need to reload them...
|
|||
|
|
//
|
|||
|
|
//
|
|||
|
|
// DSD and ESD are the same as SSD, and we dont care about GSD
|
|||
|
|
//
|
|||
|
|
mov rESD = rSSD
|
|||
|
|
mov rDSD = rSSD
|
|||
|
|
mov rGSD = rSSD
|
|||
|
|
|
|||
|
|
//
|
|||
|
|
// push the return address on the memory stack
|
|||
|
|
//
|
|||
|
|
//
|
|||
|
|
// As we never return, just push NULL...
|
|||
|
|
//
|
|||
|
|
//
|
|||
|
|
// Stack always points to a valid value, so decrement before putting on
|
|||
|
|
// return address
|
|||
|
|
//
|
|||
|
|
adds sp = -4, sp
|
|||
|
|
st4 [sp] = r0
|
|||
|
|
|
|||
|
|
ARGPTR (in0)
|
|||
|
|
sxt4 r23 = in0
|
|||
|
|
mov b7 = r23
|
|||
|
|
|
|||
|
|
br.ia.sptk b7
|
|||
|
|
|
|||
|
|
//
|
|||
|
|
// Return addresses and stuff would go here, but we never return
|
|||
|
|
//
|
|||
|
|
|
|||
|
|
LEAF_EXIT(GenericIACall)
|
|||
|
|
#endif
|