615 lines
17 KiB
C
615 lines
17 KiB
C
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/*++
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Copyright (c) 1995-2000 Microsoft Corporation
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Module Name:
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common.c
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Abstract:
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Instructions with common (shared) BYTE, WORD, and DWORD flavors.
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Author:
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29-Jun-1995 BarryBo
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Revision History:
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--*/
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// THIS FILE IS #include'd INTO FILES WHICH DEFINE THE FOLLOWING MACROS:
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// GET_REG - function returning pointer to register
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// MSB - most signigicant bit
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// MOD_RM - decode mod/rm bits
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// UTYPE - UNSIGNED type which defines registers (BYTE/USHORT/DWORD)
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// STYPE - SIGNED type which defines registers (char/short/long)
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// GET_VAL - dereference a pointer of the right type (GET_BYTE/...)
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// PUT_VAL - writes a value into memory
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// DISPATCHCOMMON - mangles function name by appening 8/16/32
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// AREG - GP_AL/GP_AX/GP_EAX, etc.
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// BREG - ...
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// CREG - ...
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// DREG - ...
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OPERATION MANGLENAME(Group1Map)[8] = {OPNAME(Add),
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OPNAME(Or),
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OPNAME(Adc),
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OPNAME(Sbb),
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OPNAME(And),
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OPNAME(Sub),
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OPNAME(Xor),
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OPNAME(Cmp)};
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OPERATION MANGLENAME(Group1LockMap)[8] = {LOCKOPNAME(Add),
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LOCKOPNAME(Or),
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LOCKOPNAME(Adc),
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LOCKOPNAME(Sbb),
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LOCKOPNAME(And),
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LOCKOPNAME(Sub),
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LOCKOPNAME(Xor),
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OPNAME(Cmp)};
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// A macro to generate _m_r functions
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#define DC_M_R(x, y) \
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DISPATCHCOMMON(x ## _m_r) \
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{ \
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int cbInstr = MOD_RM(State, &Instr->Operand1, &Instr->Operand2); \
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\
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Instr->Operation = y; \
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DEREF(Instr->Operand2); \
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Instr->Size = cbInstr+1; \
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}
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// A macro to generate _r_m functions
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#define DC_R_M(x, y) \
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DISPATCHCOMMON(x ## _r_m) \
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{ \
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int cbInstr = MOD_RM(State, &Instr->Operand2, &Instr->Operand1); \
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\
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Instr->Operation = y; \
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DEREF(Instr->Operand2); \
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Instr->Size = cbInstr+1; \
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}
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// A macro to generate _a_i functions
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#define DC_A_I(x, y) \
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DISPATCHCOMMON(x ## _a_i) \
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{ \
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Instr->Operation = y; \
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Instr->Operand1.Type = OPND_REGREF; \
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Instr->Operand1.Reg = AREG; \
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Instr->Operand2.Type = OPND_IMM; \
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Instr->Operand2.Immed = GET_VAL(eipTemp+1); \
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Instr->Size = 1+sizeof(UTYPE); \
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}
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// The monster macro which generates all three
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#define DC_ALL(x, y) \
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DC_M_R(x,y) \
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DC_R_M(x,y) \
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DC_A_I(x,y)
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// SETSIZE sets the size of a jump instruction
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#if MSB==0x80
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#define SETSIZE Instr->Size = 1+sizeof(UTYPE); // 1 byte opcode
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#else
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#define SETSIZE Instr->Size = 2+sizeof(UTYPE); // 2 byte opcode
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#endif
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#if DBG
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#define CLEAR_ADRPREFIX State->AdrPrefix = FALSE;
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#else
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#define CLEAR_ADRPREFIX
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#endif
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// This macro generates jump functions
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// If the ADR: prefix is set, get the 16-bit loword from the 32-bit
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// immediate value following the JMP instruction, and add that value
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// to the loword of EIP, and use that value as the new IP register.
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#define DISPATCHJUMP(x) \
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DISPATCHCOMMON(j ## x) \
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{ \
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Instr->Operand1.Type = OPND_NOCODEGEN; \
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if (State->AdrPrefix) { \
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Instr->Operand1.Immed = MAKELONG((short)GET_SHORT(eipTemp+1)+1+sizeof(UTYPE)+(short)LOWORD(eipTemp), HIWORD(eipTemp)); \
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CLEAR_ADRPREFIX; \
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} else { \
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Instr->Operand1.Immed = (STYPE)GET_VAL(eipTemp+1)+1+sizeof(UTYPE)+eipTemp; \
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} \
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if (Instr->Operand1.Immed > eipTemp) { \
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Instr->Operation = OP_CTRL_COND_J ## x ## Fwd; \
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} else { \
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Instr->Operation = OP_CTRL_COND_J ## x ##; \
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} \
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SETSIZE \
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}
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DC_ALL(LOCKadd, LOCKOPNAME(Add))
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DC_ALL(LOCKor, LOCKOPNAME(Or))
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DC_ALL(LOCKadc, LOCKOPNAME(Adc))
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DC_ALL(LOCKsbb, LOCKOPNAME(Sbb))
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DC_ALL(LOCKand, LOCKOPNAME(And))
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DC_ALL(LOCKsub, LOCKOPNAME(Sub))
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DC_ALL(LOCKxor, LOCKOPNAME(Xor))
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DC_ALL(add, OPNAME(Add))
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DC_ALL(or, OPNAME(Or))
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DC_ALL(adc, OPNAME(Adc))
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DC_ALL(sbb, OPNAME(Sbb))
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DC_ALL(and, OPNAME(And))
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DC_ALL(sub, OPNAME(Sub))
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DC_ALL(xor, OPNAME(Xor))
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DISPATCHCOMMON(cmp_m_r)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand1, &Instr->Operand2);
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Instr->Operation = OPNAME(Cmp);
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DEREF(Instr->Operand1); // both params are byval
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DEREF(Instr->Operand2);
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Instr->Size = cbInstr+1;
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}
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DISPATCHCOMMON(cmp_r_m)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand2, &Instr->Operand1);
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Instr->Operation = OPNAME(Cmp);
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DEREF(Instr->Operand1); // both params are byval
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DEREF(Instr->Operand2);
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Instr->Size = cbInstr+1;
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}
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DISPATCHCOMMON(cmp_a_i)
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{
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Instr->Operation = OPNAME(Cmp);
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Instr->Operand1.Type = OPND_REGVALUE; // both params are byval
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Instr->Operand1.Reg = AREG;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_VAL(eipTemp+1);
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Instr->Size = 1+sizeof(UTYPE);
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}
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DISPATCHCOMMON(GROUP_1)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand1, NULL);
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BYTE g = GET_BYTE(eipTemp+1);
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// <instruction> modrm, imm
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_VAL(eipTemp+1+cbInstr); // get immB
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g = (g >> 3) & 0x07;
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Instr->Operation = MANGLENAME(Group1Map)[g];
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if (g == 7) {
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// Cmp takes both params as byval
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DEREF(Instr->Operand1);
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}
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Instr->Size = cbInstr+sizeof(UTYPE)+1;
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}
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DISPATCHCOMMON(LOCKGROUP_1)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand1, NULL);
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BYTE g = GET_BYTE(eipTemp+1);
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// <instruction> modrm, imm
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_VAL(eipTemp+1+cbInstr); // get immB
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g = (g >> 3) & 0x07;
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Instr->Operation = MANGLENAME(Group1LockMap)[g];
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if (g == 7) {
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// Cmp takes both args as byval
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DEREF(Instr->Operand1);
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}
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Instr->Size = cbInstr+sizeof(UTYPE)+1;
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}
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DISPATCHCOMMON(test_r_m)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand2, &Instr->Operand1);
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Instr->Operation = OPNAME(Test);
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DEREF(Instr->Operand1); // both args are byval
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DEREF(Instr->Operand2);
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Instr->Size = cbInstr+1;
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}
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DISPATCHCOMMON(xchg_r_m)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand2, &Instr->Operand1);
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// Operand2 is always a register. If operand1 is a memory location,
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// we must use the locked version, otherwise use the regular version.
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if (Instr->Operand1.Type == OPND_REGREF){
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Instr->Operation = OPNAME(Xchg);
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} else {
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Instr->Operation = LOCKOPNAME(Xchg);
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}
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Instr->Size = cbInstr+1;
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}
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DISPATCHCOMMON(xadd_m_r)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand1, &Instr->Operand2);
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Instr->Operation = OPNAME(Xadd);
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Instr->Size = cbInstr+2;
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}
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DISPATCHCOMMON(cmpxchg_m_r)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand1, &Instr->Operand2);
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Instr->Operation = OPNAME(CmpXchg);
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Instr->Size = cbInstr+2;
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}
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DISPATCHCOMMON(LOCKxadd_m_r)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand1, &Instr->Operand2);
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Instr->Operation = LOCKOPNAME(Xadd);
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Instr->Size = cbInstr+2;
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}
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DISPATCHCOMMON(LOCKcmpxchg_m_r)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand1, &Instr->Operand2);
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Instr->Operation = LOCKOPNAME(CmpXchg);
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Instr->Size = cbInstr+2;
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}
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DC_M_R(mov, OPNAME(Mov))
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DC_R_M(mov, OPNAME(Mov))
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DISPATCHCOMMON(mov_a_m) // mov accum, [full displacement]
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{
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Instr->Operation = OPNAME(Mov);
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Operand1.Reg = AREG;
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Instr->Operand2.Type = OPND_ADDRREF;
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DEREF(Instr->Operand2); // this is a klunky ADDRVAL8/16/32 expansion
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if (State->AdrPrefix) {
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Instr->Operand2.Immed = GET_SHORT(eipTemp+1);
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Instr->Size = 3;
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#if DBG
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State->AdrPrefix = FALSE;
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#endif
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} else {
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Instr->Operand2.Immed = GET_LONG(eipTemp+1);
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Instr->Size = 5;
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}
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}
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DISPATCHCOMMON(mov_m_a) // mov [full displacement], accum
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{
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Instr->Operation = OPNAME(Mov);
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Instr->Operand1.Type = OPND_ADDRREF;
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Instr->Operand2.Type = OPND_REGVALUE;
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Instr->Operand2.Reg = AREG;
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if (State->AdrPrefix) {
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Instr->Operand1.Immed = GET_SHORT(eipTemp+1);
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Instr->Size = 3;
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#if DBG
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State->AdrPrefix = FALSE;
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#endif
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} else {
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Instr->Operand1.Immed = GET_LONG(eipTemp+1);
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Instr->Size = 5;
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}
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}
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DISPATCHCOMMON(test_a_i)
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{
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Instr->Operation = OPNAME(Test);
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Instr->Operand1.Type = OPND_REGVALUE;
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Instr->Operand1.Reg = AREG;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_VAL(eipTemp+1);
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Instr->Size = 1+sizeof(UTYPE);
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}
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DISPATCHCOMMON(mov_a_i)
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{
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Instr->Operation = OPNAME(Mov);
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Operand1.Reg = AREG;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_VAL(eipTemp+1);
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Instr->Size = sizeof(UTYPE)+1;
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}
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DISPATCHCOMMON(mov_b_i)
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{
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Instr->Operation = OPNAME(Mov);
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Operand1.Reg = BREG;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_VAL(eipTemp+1);
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Instr->Size = sizeof(UTYPE)+1;
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}
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DISPATCHCOMMON(mov_c_i)
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{
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Instr->Operation = OPNAME(Mov);
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Operand1.Reg = CREG;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_VAL(eipTemp+1);
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Instr->Size = sizeof(UTYPE)+1;
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}
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DISPATCHCOMMON(mov_d_i)
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{
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Instr->Operation = OPNAME(Mov);
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Operand1.Reg = DREG;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_VAL(eipTemp+1);
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Instr->Size = sizeof(UTYPE)+1;
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}
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DISPATCHCOMMON(GROUP_2)
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{
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int cbInstr = MOD_RM(State, &Instr->Operand1, NULL);
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BYTE g = GET_BYTE(eipTemp+1);
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// <instruction> modrm, imm
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_VAL(eipTemp+1+cbInstr) & 0x1f;
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switch ((g >> 3) & 0x07) {
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case 0: // rol
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|
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if (Instr->Operand2.Immed)
|
||
|
|
Instr->Operation = OPNAME(Rol);
|
||
|
|
else
|
||
|
|
Instr->Operation = OP_Nop;
|
||
|
|
break;
|
||
|
|
case 1: // ror
|
||
|
|
if (Instr->Operand2.Immed)
|
||
|
|
Instr->Operation = OPNAME(Ror);
|
||
|
|
else
|
||
|
|
Instr->Operation = OP_Nop;
|
||
|
|
break;
|
||
|
|
case 2: // rcl
|
||
|
|
Instr->Operation = OPNAME(Rcl);
|
||
|
|
break;
|
||
|
|
case 3: // rcr
|
||
|
|
Instr->Operation = OPNAME(Rcr);
|
||
|
|
break;
|
||
|
|
case 4: // shl
|
||
|
|
Instr->Operation = OPNAME(Shl);
|
||
|
|
break;
|
||
|
|
case 5: // shr
|
||
|
|
Instr->Operation = OPNAME(Shr);
|
||
|
|
break;
|
||
|
|
case 7: // sar
|
||
|
|
Instr->Operation = OPNAME(Sar);
|
||
|
|
break;
|
||
|
|
case 6: // <bad>
|
||
|
|
BAD_INSTR;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
|
||
|
|
DISPATCHCOMMON(mov_m_i)
|
||
|
|
{
|
||
|
|
int cbInstr = MOD_RM(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OPNAME(Mov);
|
||
|
|
Instr->Operand2.Type = OPND_IMM;
|
||
|
|
Instr->Operand2.Immed = GET_VAL(eipTemp+cbInstr+1);
|
||
|
|
Instr->Size = cbInstr+sizeof(UTYPE)+1;
|
||
|
|
}
|
||
|
|
DISPATCHCOMMON(GROUP_2_1)
|
||
|
|
{
|
||
|
|
int cbInstr = MOD_RM(State, &Instr->Operand1, NULL);
|
||
|
|
BYTE g = GET_BYTE(eipTemp+1);
|
||
|
|
|
||
|
|
// <instruction> modrm, 1
|
||
|
|
switch ((g >> 3) & 0x07) {
|
||
|
|
case 0: // rol
|
||
|
|
Instr->Operation = OPNAME(Rol1);
|
||
|
|
break;
|
||
|
|
case 1: // ror
|
||
|
|
Instr->Operation = OPNAME(Ror1);
|
||
|
|
break;
|
||
|
|
case 2: // rcl
|
||
|
|
Instr->Operation = OPNAME(Rcl1);
|
||
|
|
break;
|
||
|
|
case 3: // rcr
|
||
|
|
Instr->Operation = OPNAME(Rcr1);
|
||
|
|
break;
|
||
|
|
case 4: // shl
|
||
|
|
Instr->Operation = OPNAME(Shl1);
|
||
|
|
break;
|
||
|
|
case 5: // shr
|
||
|
|
Instr->Operation = OPNAME(Shr1);
|
||
|
|
break;
|
||
|
|
case 7: // sar
|
||
|
|
Instr->Operation = OPNAME(Sar1);
|
||
|
|
break;
|
||
|
|
case 6: // <bad>
|
||
|
|
BAD_INSTR;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
Instr->Size = cbInstr+1;
|
||
|
|
}
|
||
|
|
DISPATCHCOMMON(GROUP_2_CL)
|
||
|
|
{
|
||
|
|
int cbInstr = MOD_RM(State, &Instr->Operand1, NULL);
|
||
|
|
BYTE g = GET_BYTE(eipTemp+1);
|
||
|
|
|
||
|
|
Instr->Operand2.Type = OPND_REGVALUE;
|
||
|
|
Instr->Operand2.Reg = GP_CL; //UNDONE: the fragments must mask by 31
|
||
|
|
|
||
|
|
// <instruction> modrm, imm
|
||
|
|
switch ((g >> 3) & 0x07) {
|
||
|
|
case 0: // rol
|
||
|
|
Instr->Operation = OPNAME(Rol);
|
||
|
|
break;
|
||
|
|
case 1: // ror
|
||
|
|
Instr->Operation = OPNAME(Ror);
|
||
|
|
break;
|
||
|
|
case 2: // rcl
|
||
|
|
Instr->Operation = OPNAME(Rcl);
|
||
|
|
break;
|
||
|
|
case 3: // rcr
|
||
|
|
Instr->Operation = OPNAME(Rcr);
|
||
|
|
break;
|
||
|
|
case 4: // shl
|
||
|
|
Instr->Operation = OPNAME(Shl);
|
||
|
|
break;
|
||
|
|
case 5: // shr
|
||
|
|
Instr->Operation = OPNAME(Shr);
|
||
|
|
break;
|
||
|
|
case 7: // sar
|
||
|
|
Instr->Operation = OPNAME(Sar);
|
||
|
|
break;
|
||
|
|
case 6: // <bad>
|
||
|
|
BAD_INSTR;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
Instr->Size = 1+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCHCOMMON(GROUP_3)
|
||
|
|
{
|
||
|
|
int cbInstr = MOD_RM(State, &Instr->Operand1, NULL);
|
||
|
|
BYTE g = GET_BYTE(eipTemp+1);
|
||
|
|
|
||
|
|
switch ((g >> 3) & 0x07) {
|
||
|
|
case 1: // bad
|
||
|
|
BAD_INSTR;
|
||
|
|
break;
|
||
|
|
case 0: // test modrm, imm
|
||
|
|
Instr->Operation = OPNAME(Test);
|
||
|
|
DEREF(Instr->Operand1); // both args are byval
|
||
|
|
Instr->Operand2.Type = OPND_IMM;
|
||
|
|
Instr->Operand2.Immed = GET_VAL(eipTemp+1+cbInstr);
|
||
|
|
cbInstr += sizeof(UTYPE); // account for the imm size
|
||
|
|
break;
|
||
|
|
case 2: // not, modrm
|
||
|
|
Instr->Operation = OPNAME(Not);
|
||
|
|
break;
|
||
|
|
case 3: // neg, modrm
|
||
|
|
Instr->Operation = OPNAME(Neg);
|
||
|
|
break;
|
||
|
|
case 4: // mul al, modrm
|
||
|
|
Instr->Operation = OPNAME(Mul);
|
||
|
|
break;
|
||
|
|
case 5: // imul al, modrm
|
||
|
|
Instr->Operation = OPNAME(Muli);
|
||
|
|
break;
|
||
|
|
case 6: // div al, modrm
|
||
|
|
Instr->Operation = OPNAME(Div);
|
||
|
|
break;
|
||
|
|
case 7: // idiv al, modrm
|
||
|
|
Instr->Operation = OPNAME(Idiv);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
Instr->Size = cbInstr+1;
|
||
|
|
}
|
||
|
|
DISPATCHCOMMON(LOCKGROUP_3)
|
||
|
|
{
|
||
|
|
int cbInstr = MOD_RM(State, &Instr->Operand1, NULL);
|
||
|
|
BYTE g = GET_BYTE(eipTemp+1);
|
||
|
|
|
||
|
|
switch ((g >> 3) & 0x07) {
|
||
|
|
case 0:
|
||
|
|
case 1: // bad
|
||
|
|
BAD_INSTR;
|
||
|
|
break;
|
||
|
|
case 2: // not, modrm
|
||
|
|
Instr->Operation = LOCKOPNAME(Not);
|
||
|
|
break;
|
||
|
|
case 3: // neg, modrm
|
||
|
|
Instr->Operation = LOCKOPNAME(Neg);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
BAD_INSTR;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
Instr->Size = cbInstr+1;
|
||
|
|
}
|
||
|
|
DISPATCHCOMMON(lods)
|
||
|
|
{
|
||
|
|
if (Instr->FsOverride) {
|
||
|
|
if (State->RepPrefix) {
|
||
|
|
Instr->Operation = OPNAME(FsRepLods);
|
||
|
|
} else {
|
||
|
|
Instr->Operation = OPNAME(FsLods);
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
if (State->RepPrefix) {
|
||
|
|
Instr->Operation = OPNAME(RepLods);
|
||
|
|
} else {
|
||
|
|
Instr->Operation = OPNAME(Lods);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
DISPATCHCOMMON(scas)
|
||
|
|
{
|
||
|
|
OPERATION ScasMap[6] = {OPNAME(Scas),
|
||
|
|
OPNAME(RepzScas),
|
||
|
|
OPNAME(RepnzScas),
|
||
|
|
OPNAME(FsScas),
|
||
|
|
OPNAME(FsRepzScas),
|
||
|
|
OPNAME(FsRepnzScas)
|
||
|
|
};
|
||
|
|
|
||
|
|
Instr->Operation = ScasMap[State->RepPrefix + 3*Instr->FsOverride];
|
||
|
|
}
|
||
|
|
DISPATCHCOMMON(stos)
|
||
|
|
{
|
||
|
|
if (State->RepPrefix) {
|
||
|
|
Instr->Operation = OPNAME(RepStos);
|
||
|
|
} else {
|
||
|
|
Instr->Operation = OPNAME(Stos);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
DISPATCHCOMMON(movs)
|
||
|
|
{
|
||
|
|
if (Instr->FsOverride) {
|
||
|
|
if (State->RepPrefix) {
|
||
|
|
Instr->Operation = OPNAME(FsRepMovs);
|
||
|
|
} else {
|
||
|
|
Instr->Operation = OPNAME(FsMovs);
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
if (State->RepPrefix) {
|
||
|
|
Instr->Operation = OPNAME(RepMovs);
|
||
|
|
} else {
|
||
|
|
Instr->Operation = OPNAME(Movs);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
DISPATCHCOMMON(cmps)
|
||
|
|
{
|
||
|
|
OPERATION CmpsMap[6] = {OPNAME(Cmps),
|
||
|
|
OPNAME(RepzCmps),
|
||
|
|
OPNAME(RepnzCmps),
|
||
|
|
OPNAME(FsCmps),
|
||
|
|
OPNAME(FsRepzCmps),
|
||
|
|
OPNAME(FsRepnzCmps)
|
||
|
|
};
|
||
|
|
|
||
|
|
Instr->Operation = CmpsMap[State->RepPrefix + 3*Instr->FsOverride];
|
||
|
|
}
|
||
|
|
|
||
|
|
// Now the jump instructions:
|
||
|
|
DISPATCHJUMP(o)
|
||
|
|
DISPATCHJUMP(no)
|
||
|
|
DISPATCHJUMP(b)
|
||
|
|
DISPATCHJUMP(ae)
|
||
|
|
DISPATCHJUMP(e)
|
||
|
|
DISPATCHJUMP(ne)
|
||
|
|
DISPATCHJUMP(be)
|
||
|
|
DISPATCHJUMP(a)
|
||
|
|
DISPATCHJUMP(s)
|
||
|
|
DISPATCHJUMP(ns)
|
||
|
|
DISPATCHJUMP(p)
|
||
|
|
DISPATCHJUMP(np)
|
||
|
|
DISPATCHJUMP(l)
|
||
|
|
DISPATCHJUMP(nl)
|
||
|
|
DISPATCHJUMP(le)
|
||
|
|
DISPATCHJUMP(g)
|