698 lines
15 KiB
C
698 lines
15 KiB
C
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/*++
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Copyright (c) 1996-1998 Microsoft Corporation
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Module Name:
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miscfns.c
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Abstract:
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Miscellaneous instuctions
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Author:
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29-Jun-1995 BarryBo
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Revision History:
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--*/
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#include <nt.h>
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#include <ntrtl.h>
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#include <nturtl.h>
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#include <windows.h>
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#include <stdio.h>
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#include "wx86.h"
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#include "cpuassrt.h"
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#include "threadst.h"
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#include "instr.h"
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#include "decoderp.h"
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ASSERTNAME;
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// table used by ProcessPrefixes
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pfnDispatchInstruction *DispatchTables[4] = { Dispatch32, Dispatch16, LockDispatch32, LockDispatch16 };
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// ---------------- single-byte functions -------------------------------
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DISPATCH(ProcessPrefixes)
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{
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int DataPrefix = 0;
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int LockPrefix = 0;
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int cbInstr = 0;
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for (;;) {
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switch (*(PBYTE)(eipTemp)) {
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case 0x64: // fs:
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Instr->FsOverride = TRUE;
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break;
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case 0xf3: // repz
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State->RepPrefix = PREFIX_REPZ;
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break;
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case 0xf2: // repnz
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State->RepPrefix = PREFIX_REPNZ;
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break;
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case 0xf0: // lock
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LockPrefix = 2; // The lock tables are in locations 2 and 3 DispatchTables
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break;
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case 0x2e: // cs:
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case 0x36: // ss:
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case 0x3e: // ds:
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case 0x26: // es:
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case 0x65: // gs:
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Instr->FsOverride = FALSE;
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break;
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case 0x66: // data
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DataPrefix = 1;
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break;
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case 0x67: // adr
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State->AdrPrefix=TRUE;
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break;
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default:
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// No more prefixes found. Set up dispatch tables based on
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// the prefixes seen.
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// Decode and execute the actual instruction
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((DispatchTables[DataPrefix+LockPrefix])[GET_BYTE(eipTemp)])(State, Instr);
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// Adjust the Intel instruction size by the number of prefixes
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Instr->Size += cbInstr;
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#if DBG
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// Ensure that if we saw an ADR: prefix, the decoder had code
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// to handle the prefix. In the checked build, all functions which
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// handle the ADR: prefix clear State->AdrPrefix.
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if (State->AdrPrefix) {
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LOGPRINT((TRACELOG, "CPU Decoder: An unsupported instruction had an ADR: prefix.\r\n"
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"Instruction Address = 0x%x. Ignoring ADR: - this address may be data\r\n",
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Instr->IntelAddress
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));
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}
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#endif
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State->AdrPrefix = FALSE;
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// return to the decoder
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return;
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}
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eipTemp++;
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cbInstr++;
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}
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}
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DISPATCH(bad)
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{
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BAD_INSTR;
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}
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DISPATCH(privileged)
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{
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PRIVILEGED_INSTR;
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}
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DISPATCH(push_es)
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{
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Instr->Operation = OP_PushEs;
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}
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DISPATCH(pop_es)
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{
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Instr->Operation = OP_PopEs;
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}
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DISPATCH(push_cs)
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{
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Instr->Operation = OP_PushCs;
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}
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DISPATCH(aas)
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{
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Instr->Operation = OP_Aas;
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}
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DISPATCH(push_ss)
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{
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Instr->Operation = OP_PushSs;
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}
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DISPATCH(pop_ss)
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{
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Instr->Operation = OP_PopSs;
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}
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DISPATCH(push_ds)
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{
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Instr->Operation = OP_PushDs;
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}
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DISPATCH(pop_ds)
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{
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Instr->Operation = OP_PopDs;
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}
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DISPATCH(daa)
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{
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Instr->Operation = OP_Daa;
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}
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DISPATCH(das)
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{
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Instr->Operation = OP_Das;
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}
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DISPATCH(aaa)
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{
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Instr->Operation = OP_Aaa;
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}
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DISPATCH(aad_ib)
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{
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Instr->Operation = OP_Aad;
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Instr->Operand1.Type = OPND_IMM;
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Instr->Operand1.Immed = GET_BYTE(eipTemp+1);
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Instr->Size = 2;
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}
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DISPATCH(imul_rw_m_iw16) // reg16 = rm16 * immediate word
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{
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int cbInstr = mod_rm_reg16(State, &Instr->Operand2, &Instr->Operand1);
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Instr->Operation = OP_Imul3Arg16;
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DEREF16(Instr->Operand2);
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Instr->Operand3.Type = OPND_IMM;
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Instr->Operand3.Immed = GET_SHORT(eipTemp+1+cbInstr);
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Instr->Size = 3+cbInstr;
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}
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DISPATCH(imul_rw_m_iw32)
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{
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int cbInstr = mod_rm_reg32(State, &Instr->Operand2, &Instr->Operand1);
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Instr->Operation = OP_Imul3Arg32;
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DEREF32(Instr->Operand2);
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Instr->Operand3.Type = OPND_IMM;
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Instr->Operand3.Immed = GET_LONG(eipTemp+1+cbInstr);
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Instr->Size = 5+cbInstr;
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}
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DISPATCH(imul_rw_m_ib16) // reg16 = rm16 * sign-extended immediate byte
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{
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int cbInstr = mod_rm_reg16(State, &Instr->Operand2, &Instr->Operand1);
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Instr->Operation = OP_Imul3Arg16;
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DEREF16(Instr->Operand2);
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Instr->Operand3.Type = OPND_IMM;
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Instr->Operand3.Immed = (DWORD)(short)(char)GET_BYTE(eipTemp+1+cbInstr);
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Instr->Size = 2+cbInstr;
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}
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DISPATCH(imul_rw_m_ib32) // reg32 = rm32 * sign-extended immediate byte
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{
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int cbInstr = mod_rm_reg32(State, &Instr->Operand2, &Instr->Operand1);
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Instr->Operation = OP_Imul3Arg32;
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DEREF32(Instr->Operand2);
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Instr->Operand3.Type = OPND_IMM;
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Instr->Operand3.Immed = (DWORD)(long)(char)GET_BYTE(eipTemp+1+cbInstr);
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Instr->Size = 2+cbInstr;
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}
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DISPATCH(mov_mw_seg)
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{
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int cbInstr = mod_rm_reg16(State, &Instr->Operand1, NULL);
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get_segreg(State, &Instr->Operand2);
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Instr->Operation = OP_Mov16;
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Instr->Size = cbInstr+1;
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}
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DISPATCH(mov_seg_mw)
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{
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int cbInstr = mod_rm_reg16(State, &Instr->Operand2, NULL);
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get_segreg(State, &Instr->Operand1);
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Instr->Operation = OP_Mov16;
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DEREF16(Instr->Operand2);
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CPUASSERT(Instr->Operand1.Type == OPND_REGVALUE);
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Size = cbInstr+1;
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}
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DISPATCH(nop)
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{
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Instr->Operation = OP_Nop;
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}
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DISPATCH(call_md)
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{
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Instr->Operation = OP_CTRL_UNCOND_Callf;
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Instr->Operand1.Type = OPND_IMM;
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Instr->Operand1.Immed = eipTemp+1;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = eipTemp+sizeof(ULONG)+sizeof(USHORT)+1;
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Instr->Size = sizeof(ULONG)+sizeof(USHORT)+1;
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}
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DISPATCH(sahf)
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{
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Instr->Operation = OP_Sahf;
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}
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DISPATCH(lahf)
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{
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Instr->Operation = OP_Lahf;
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}
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DISPATCH(mov_ah_ib)
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{
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Instr->Operation = OP_Mov8;
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Operand1.Reg = GP_AH;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_BYTE(eipTemp+1);
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Instr->Size = 2;
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}
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DISPATCH(mov_ch_ib)
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{
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Instr->Operation = OP_Mov8;
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Operand1.Reg = GP_CH;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_BYTE(eipTemp+1);
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Instr->Size = 2;
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}
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DISPATCH(mov_dh_ib)
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{
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Instr->Operation = OP_Mov8;
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Operand1.Reg = GP_DH;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_BYTE(eipTemp+1);
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Instr->Size = 2;
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}
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DISPATCH(mov_bh_ib)
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{
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Instr->Operation = OP_Mov8;
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Instr->Operand1.Type = OPND_REGREF;
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Instr->Operand1.Reg = GP_BH;
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Instr->Operand2.Type = OPND_IMM;
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Instr->Operand2.Immed = GET_BYTE(eipTemp+1);
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Instr->Size = 2;
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}
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DISPATCH(int3)
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{
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Instr->Operation = OP_Int;
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}
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DISPATCH(int_ib)
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{
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Instr->Operation = OP_Int;
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Instr->Size = 2;
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}
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DISPATCH(into)
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{
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Instr->Operation = OP_IntO;
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}
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DISPATCH(iret)
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{
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Instr->Operation = OP_CTRL_INDIR_IRet;
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}
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DISPATCH(aam_ib)
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{
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Instr->Operation = OP_Aam;
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Instr->Operand1.Type = OPND_IMM;
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Instr->Operand1.Immed = GET_BYTE(eipTemp+1);
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Instr->Size = 2;
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}
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DISPATCH(xlat)
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{
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Instr->Operation = OP_Xlat;
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}
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DISPATCH(jmpf_md)
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{
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Instr->Operation = OP_CTRL_UNCOND_Jmpf;
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Instr->Operand1.Type = OPND_IMM;
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Instr->Operand1.Immed = eipTemp+1;
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Instr->Size = 7;
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}
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DISPATCH(jmp_jb)
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{
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Instr->Operand1.Type = OPND_NOCODEGEN;
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if (State->AdrPrefix) {
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Instr->Operand1.Immed = MAKELONG((short)(char)GET_BYTE(eipTemp+1)+2+(short)LOWORD(eipTemp), HIWORD(eipTemp));
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#if DBG
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State->AdrPrefix = FALSE;
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#endif
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} else {
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Instr->Operand1.Immed = (DWORD)(long)(char)GET_BYTE(eipTemp+1)+2+eipTemp;
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}
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if (Instr->Operand1.Immed > eipTemp) {
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Instr->Operation = OP_CTRL_UNCOND_JmpFwd;
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} else {
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Instr->Operation = OP_CTRL_UNCOND_Jmp;
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}
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Instr->Size = 2;
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}
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DISPATCH(cmc)
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{
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Instr->Operation = OP_Cmc;
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}
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DISPATCH(clc)
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{
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Instr->Operation = OP_Clc;
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}
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DISPATCH(stc)
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{
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Instr->Operation = OP_Stc;
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}
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DISPATCH(cld)
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{
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Instr->Operation = OP_Cld;
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}
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DISPATCH(std)
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{
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Instr->Operation = OP_Std;
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}
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DISPATCH(GROUP_4)
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{
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int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
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BYTE g = GET_BYTE(eipTemp+1);
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switch ((g >> 3) & 0x07) {
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case 0: // inc modrmB
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Instr->Operation = OP_Inc8;
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Instr->Size = 1+cbInstr;
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break;
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case 1: // dec modrmB
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Instr->Operation = OP_Dec8;
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Instr->Size = 1+cbInstr;
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break;
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default:
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BAD_INSTR;
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}
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}
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//-------- double-byte functions -----------------------------------------------
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DISPATCH(GROUP_6)
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{
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BYTE g = GET_BYTE(eipTemp+1);
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int cbInstr;
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switch ((g >> 3) & 0x07) {
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case 0: // sldt modrmw
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case 1: // str modrmw
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case 2: // lldt modrmw
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case 3: // ltr modrmw
|
||
|
|
PRIVILEGED_INSTR;
|
||
|
|
break;
|
||
|
|
|
||
|
|
case 4: // verr modrmw
|
||
|
|
cbInstr = mod_rm_reg16(State, &Instr->Operand1, NULL);
|
||
|
|
Instr->Operation = OP_Verr;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
break;
|
||
|
|
|
||
|
|
case 5: // verw modrmw
|
||
|
|
cbInstr = mod_rm_reg16(State, &Instr->Operand1, NULL);
|
||
|
|
Instr->Operation = OP_Verw;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
break;
|
||
|
|
|
||
|
|
default:
|
||
|
|
BAD_INSTR; // bad
|
||
|
|
}
|
||
|
|
}
|
||
|
|
DISPATCH(GROUP_7)
|
||
|
|
{
|
||
|
|
BYTE g = GET_BYTE(eipTemp+1);
|
||
|
|
int cbInstr;
|
||
|
|
|
||
|
|
switch ((g >> 3) & 0x07) {
|
||
|
|
case 0: // sgdt modrmw
|
||
|
|
case 1: // sidt modrmw
|
||
|
|
case 2: // lgdt modrmw
|
||
|
|
case 3: // lidt modrmw
|
||
|
|
case 6: // lmsw modrmw
|
||
|
|
PRIVILEGED_INSTR;
|
||
|
|
break;
|
||
|
|
|
||
|
|
case 4: // smsw modrmw
|
||
|
|
cbInstr = mod_rm_reg16(State, &Instr->Operand1, NULL);
|
||
|
|
Instr->Operation = OP_Smsw;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
break;
|
||
|
|
|
||
|
|
case 5: // bad
|
||
|
|
case 7: // bad
|
||
|
|
BAD_INSTR;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
DISPATCH(seto_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Seto;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setno_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setno;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setb_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setb;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setae_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setae;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(sete_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Sete;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setne_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setne;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setbe_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setbe;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(seta_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Seta;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(sets_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Sets;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setns_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setns;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setp_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setp;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setnp_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setnp;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setl_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setl;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setge_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setge;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setle_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setle;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(setg_modrmb)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg8(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Setg;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(push_fs)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_PushFs;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(pop_fs)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_PopFs;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(push_gs)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_PushGs;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(pop_gs)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_PopGs;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(imul_regw_modrmw16) // reg16 = reg16 * mod/rm
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg16(State, &Instr->Operand2, &Instr->Operand1);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Imul16;
|
||
|
|
DEREF32(Instr->Operand2);
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
|
||
|
|
}
|
||
|
|
DISPATCH(imul_regw_modrmw32) // reg32 = reg32 * mod/rm
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg32(State, &Instr->Operand2, &Instr->Operand1);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Imul32;
|
||
|
|
DEREF32(Instr->Operand2);
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(movzx_regw_modrmw)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg16(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
DEREF16(Instr->Operand1);
|
||
|
|
Instr->Operation = OP_Movzx16To32;
|
||
|
|
Instr->Operand2.Type = OPND_NOCODEGEN;
|
||
|
|
Instr->Operand2.Reg = get_reg32(State);
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(movsx_regw_modrmw)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg16(State, &Instr->Operand1, NULL);
|
||
|
|
|
||
|
|
DEREF16(Instr->Operand1);
|
||
|
|
Instr->Operation = OP_Movsx16To32;
|
||
|
|
Instr->Operand2.Type = OPND_NOCODEGEN;
|
||
|
|
Instr->Operand2.Reg = get_reg32(State);
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(wait)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Wait;
|
||
|
|
}
|
||
|
|
DISPATCH(bswap_eax)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Bswap32;
|
||
|
|
Instr->Operand1.Type = OPND_REGREF;
|
||
|
|
Instr->Operand1.Reg = GP_EAX;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(bswap_ebx)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Bswap32;
|
||
|
|
Instr->Operand1.Type = OPND_REGREF;
|
||
|
|
Instr->Operand1.Reg = GP_EBX;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(bswap_ecx)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Bswap32;
|
||
|
|
Instr->Operand1.Type = OPND_REGREF;
|
||
|
|
Instr->Operand1.Reg = GP_ECX;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(bswap_edx)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Bswap32;
|
||
|
|
Instr->Operand1.Type = OPND_REGREF;
|
||
|
|
Instr->Operand1.Reg = GP_EDX;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(bswap_esp)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Bswap32;
|
||
|
|
Instr->Operand1.Type = OPND_REGREF;
|
||
|
|
Instr->Operand1.Reg = GP_ESP;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(bswap_ebp)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Bswap32;
|
||
|
|
Instr->Operand1.Type = OPND_REGREF;
|
||
|
|
Instr->Operand1.Reg = GP_EBP;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(bswap_esi)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Bswap32;
|
||
|
|
Instr->Operand1.Type = OPND_REGREF;
|
||
|
|
Instr->Operand1.Reg = GP_ESI;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(bswap_edi)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Bswap32;
|
||
|
|
Instr->Operand1.Type = OPND_REGREF;
|
||
|
|
Instr->Operand1.Reg = GP_EDI;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(arpl)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg16(State, &Instr->Operand1, &Instr->Operand2);
|
||
|
|
|
||
|
|
Instr->Operation = OP_Arpl;
|
||
|
|
CPUASSERT(Instr->Operand2.Type == OPND_REGREF);
|
||
|
|
Instr->Operand2.Type = OPND_REGVALUE;
|
||
|
|
Instr->Size = 1+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(cpuid)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_CPUID;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(rdtsc)
|
||
|
|
{
|
||
|
|
Instr->Operation = OP_Rdtsc;
|
||
|
|
Instr->Size = 2;
|
||
|
|
}
|
||
|
|
DISPATCH(cmpxchg8b)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg32(State, &Instr->Operand1, &Instr->Operand2);
|
||
|
|
|
||
|
|
Instr->Operation = OP_CMPXCHG8B;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|
||
|
|
DISPATCH(LOCKcmpxchg8b)
|
||
|
|
{
|
||
|
|
int cbInstr = mod_rm_reg32(State, &Instr->Operand1, &Instr->Operand2);
|
||
|
|
|
||
|
|
Instr->Operation = OP_SynchLockCMPXCHG8B;
|
||
|
|
Instr->Size = 2+cbInstr;
|
||
|
|
}
|