359 lines
7.3 KiB
C
359 lines
7.3 KiB
C
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/*++
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Copyright (c) 1995-1998 Microsoft Corporation
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Module Name:
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fraginit.c
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Abstract:
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Initialization, termination, and CPU interface functions
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Author:
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25-Aug-1995 BarryBo
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Revision History:
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--*/
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#include <nt.h>
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#include <ntrtl.h>
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#include <nturtl.h>
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#include <windows.h>
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#include <stdio.h>
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#define _WX86CPUAPI_
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#include "wx86.h"
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#include "wx86nt.h"
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#include "wx86cpu.h"
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#include "cpuassrt.h"
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#ifdef MSCCPU
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#include "ccpu.h"
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#include "msccpup.h"
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#undef GET_BYTE
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#undef GET_SHORT
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#undef GET_LONG
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#else
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#include "threadst.h"
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#include "instr.h"
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#include "frag.h"
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ASSERTNAME;
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#endif
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#include "fragp.h"
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//
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// Table mapping a byte to a 0 or 1, corresponding to the parity bit for
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// that byte.
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//
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const BYTE ParityBit[] = {
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
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};
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#if _ALPHA_
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//
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// TRUE if the CPU should generate the new LDB/STB instructions for accessing
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// data less than one DWORD long or when accessing unaligned data.
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//
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DWORD fByteInstructionsOK;
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#endif
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int *
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_errno(
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)
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/*++
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Routine Description:
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Stub function so the CPU can pull in floating-point CRT support
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without the C startup code.
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Arguments:
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None.
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Return Value:
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Pointer to per-thread [actually per-fiber] errno value.
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--*/
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{
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DECLARE_CPU;
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return &cpu->ErrnoVal;
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}
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BOOL
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FragLibInit(
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PCPUCONTEXT cpu,
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DWORD StackBase
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)
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/*++
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Routine Description:
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This routine initializes the fragment library.
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Arguments:
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cpu - per-thread CPU data
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StackBase - initial ESP value
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Return Value:
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True if successful.
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--*/
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{
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//
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// Initialize the 487 emulator
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//
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FpuInit(cpu);
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//
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// Initialize all non-zero fields in the cpu
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//
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cpu->flag_df = 1; // direction flag is initially UP
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cpu->flag_if = 1; // enable interrupts
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ES = SS = DS = KGDT_R3_DATA+3;
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CS = KGDT_R3_CODE+3;
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FS = KGDT_R3_TEB+3;
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esp = StackBase; // set up the initial ESP value
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#if _ALPHA_
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//
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// See if LDB/STB instructions are implemented.
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//
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fByteInstructionsOK = (DWORD)ProxyIsProcessorFeaturePresent(
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PF_ALPHA_BYTE_INSTRUCTIONS);
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#endif
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return TRUE;
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}
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DWORD GetEax(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return eax;
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}
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DWORD GetEbx(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return ebx;
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}
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DWORD GetEcx(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return ecx;
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}
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DWORD GetEdx(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return edx;
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}
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DWORD GetEsp(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return esp;
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}
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DWORD GetEbp(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return ebp;
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}
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DWORD GetEsi(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return esi;
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}
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DWORD GetEdi(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return edi;
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}
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DWORD GetEip(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return eip;
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}
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void SetEax(PVOID CpuContext, DWORD dw)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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eax = dw;
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}
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void SetEbx(PVOID CpuContext, DWORD dw)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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ebx = dw;
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}
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void SetEcx(PVOID CpuContext, DWORD dw)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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ecx = dw;
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}
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void SetEdx(PVOID CpuContext, DWORD dw)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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edx = dw;
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}
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void SetEsp(PVOID CpuContext, DWORD dw)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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esp = dw;
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}
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void SetEbp(PVOID CpuContext, DWORD dw)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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ebp = dw;
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}
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void SetEsi(PVOID CpuContext, DWORD dw)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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esi = dw;
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}
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void SetEdi(PVOID CpuContext, DWORD dw)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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edi = dw;
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}
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void SetEip(PVOID CpuContext, DWORD dw)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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eip = dw;
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}
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VOID SetCs(PVOID CpuContext, USHORT us)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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CS = us;
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}
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VOID SetSs(PVOID CpuContext, USHORT us)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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SS = us;
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}
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VOID SetDs(PVOID CpuContext, USHORT us)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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DS = us;
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}
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VOID SetEs(PVOID CpuContext, USHORT us)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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ES = us;
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}
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VOID SetFs(PVOID CpuContext, USHORT us)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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FS = us;
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}
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VOID SetGs(PVOID CpuContext, USHORT us)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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GS = us;
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}
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USHORT GetCs(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return CS;
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}
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USHORT GetSs(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return SS;
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}
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USHORT GetDs(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return DS;
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}
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USHORT GetEs(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return ES;
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}
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USHORT GetFs(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return FS;
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}
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USHORT GetGs(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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return GS;
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}
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ULONG GetEfl(PVOID CpuContext)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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DWORD dw;
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dw = ((GET_CFLAG) ? FLAG_CF : 0)
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| 2
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| 3 << 12 // iopl
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| ((GET_AUXFLAG) ? FLAG_AUX : 0)
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| ((GET_PFLAG) ? FLAG_PF : 0)
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| ((cpu->flag_zf) ? 0 : FLAG_ZF) // zf has inverse logic
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| ((GET_SFLAG) ? FLAG_SF : 0)
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| ((cpu->flag_tf) ? FLAG_TF : 0)
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| ((cpu->flag_if) ? FLAG_IF : 0)
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| ((cpu->flag_df == -1) ? FLAG_DF : 0)
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| ((GET_OFLAG) ? FLAG_OF : 0)
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| cpu->flag_ac;
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return dw;
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}
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void SetEfl(PVOID CpuContext, ULONG RegValue)
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{
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PCPUCONTEXT cpu = (PCPUCONTEXT)CpuContext;
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// IOPL, IF, NT, RF, VM, AC ignored.
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SET_CFLAG_IND(RegValue & FLAG_CF);
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cpu->flag_pf = (RegValue & FLAG_PF) ? 0 : 1; // see ParityBit[] table
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cpu->flag_aux= (RegValue & FLAG_AUX) ? AUX_VAL : 0;
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cpu->flag_zf = (RegValue & FLAG_ZF) ? 0 : 1; // inverse logic
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SET_SFLAG_IND(RegValue & FLAG_SF);
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cpu->flag_tf = (RegValue & FLAG_TF) ? 1 : 0;
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cpu->flag_df = (RegValue & FLAG_DF) ? -1 : 1;
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SET_OFLAG_IND(RegValue & FLAG_OF);
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cpu->flag_ac = (RegValue & FLAG_AC);
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}
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#if DBG
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VOID
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DoAssert(
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PSZ exp,
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PSZ msg,
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PSZ mod,
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INT line
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)
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{
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if (msg) {
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LOGPRINT((ERRORLOG, "CPU ASSERTION FAILED:\r\n %s\r\n%s\r\nFile: %s Line %d\r\n", msg, exp, mod, line));
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} else {
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LOGPRINT((ERRORLOG, "CPU ASSERTION FAILED:\r\n %s\r\nFile: %s Line %d\r\n", exp, mod, line));
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}
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DbgBreakPoint();
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}
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#endif //DBG
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