414 lines
16 KiB
C
414 lines
16 KiB
C
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/*++
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Copyright (c) 1995-2000 Microsoft Corporation
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Module Name:
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fragp.h
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Abstract:
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Private exports, defines for shared code fragments.
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Author:
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12-Jun-1995 BarryBo, Created
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Revision History:
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--*/
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#include "cpumain.h"
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#ifndef FRAGP_H
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#define FRAGP_H
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#include "fraglib.h"
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#include "eflags.h"
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//
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// This function patches a call to pass the mips address corresponding to
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// intelAddr directly to the call fragments.
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//
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PULONG
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patchCallRoutine(
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IN PULONG intelAddr,
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IN PULONG patchAddr
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);
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//
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// Table mapping a byte to a 0 or 1, corresponding to the parity bit for
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// that byte.
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//
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extern const BYTE ParityBit[256];
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#if _ALPHA_
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// defined in fraginit.c, used in the Alpha code generator
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extern DWORD fByteInstructionsOK;
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#endif
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#ifdef MSCCPU
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#define eax cpu->GpRegs[GP_EAX].i4
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#define ebx cpu->GpRegs[GP_EBX].i4
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#define ecx cpu->GpRegs[GP_ECX].i4
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#define edx cpu->GpRegs[GP_EDX].i4
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#define esp cpu->GpRegs[GP_ESP].i4
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#define ebp cpu->GpRegs[GP_EBP].i4
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#define esi cpu->GpRegs[GP_ESI].i4
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#define edi cpu->GpRegs[GP_EDI].i4
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#define eip cpu->eipReg.i4
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#define eipTemp cpu->eipTempReg.i4
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#define ax cpu->GpRegs[GP_EAX].i2
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#define bx cpu->GpRegs[GP_EBX].i2
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#define cx cpu->GpRegs[GP_ECX].i2
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#define dx cpu->GpRegs[GP_EDX].i2
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#define sp cpu->GpRegs[GP_ESP].i2
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#define bp cpu->GpRegs[GP_EBP].i2
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#define si cpu->GpRegs[GP_ESI].i2
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#define di cpu->GpRegs[GP_EDI].i2
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#define al cpu->GpRegs[GP_EAX].i1
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#define bl cpu->GpRegs[GP_EBX].i1
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#define cl cpu->GpRegs[GP_ECX].i1
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#define dl cpu->GpRegs[GP_EDX].i1
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#define ah cpu->GpRegs[GP_EAX].hb
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#define bh cpu->GpRegs[GP_EBX].hb
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#define ch cpu->GpRegs[GP_ECX].hb
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#define dh cpu->GpRegs[GP_EDX].hb
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#define CS cpu->cs
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#define DS cpu->ds
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#define ES cpu->es
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#define SS cpu->ss
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#define FS cpu->fs
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#define GS cpu->gs
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#define CPUDATA CPUCONTEXT
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#define PCPUDATA PCPUCONTEXT
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#else //!MSCCPU
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#define eax cpu->GpRegs[GP_EAX].i4
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#define ebx cpu->GpRegs[GP_EBX].i4
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#define ecx cpu->GpRegs[GP_ECX].i4
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#define edx cpu->GpRegs[GP_EDX].i4
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#define esp cpu->GpRegs[GP_ESP].i4
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#define ebp cpu->GpRegs[GP_EBP].i4
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#define esi cpu->GpRegs[GP_ESI].i4
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#define edi cpu->GpRegs[GP_EDI].i4
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#define eip cpu->eipReg.i4
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#define eipTemp cpu->eipTempReg.i4
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#define ax cpu->GpRegs[GP_EAX].i2
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#define bx cpu->GpRegs[GP_EBX].i2
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#define cx cpu->GpRegs[GP_ECX].i2
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#define dx cpu->GpRegs[GP_EDX].i2
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#define sp cpu->GpRegs[GP_ESP].i2
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#define bp cpu->GpRegs[GP_EBP].i2
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#define si cpu->GpRegs[GP_ESI].i2
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#define di cpu->GpRegs[GP_EDI].i2
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#define al cpu->GpRegs[GP_EAX].i1
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#define bl cpu->GpRegs[GP_EBX].i1
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#define cl cpu->GpRegs[GP_ECX].i1
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#define dl cpu->GpRegs[GP_EDX].i1
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#define ah cpu->GpRegs[GP_EAX].hb
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#define bh cpu->GpRegs[GP_EBX].hb
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#define ch cpu->GpRegs[GP_ECX].hb
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#define dh cpu->GpRegs[GP_EDX].hb
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#define CS cpu->GpRegs[REG_CS].i2
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#define DS cpu->GpRegs[REG_DS].i2
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#define ES cpu->GpRegs[REG_ES].i2
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#define SS cpu->GpRegs[REG_SS].i2
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#define FS cpu->GpRegs[REG_FS].i2
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#define GS cpu->GpRegs[REG_GS].i2
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#define CPUDATA THREADSTATE
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#define PCPUDATA PTHREADSTATE
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#endif //!MSCCPU
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#define MSB32 0x80000000
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#define SET_FLAG(flag, b) flag = (DWORD)b
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#define SET_CFLAG(b) SET_FLAG(cpu->flag_cf, (b))
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#define SET_PFLAG(b) SET_FLAG(cpu->flag_pf, (b))
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#define SET_AUXFLAG(b) SET_FLAG(cpu->flag_aux,(b))
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#define SET_ZFLAG(b) SET_FLAG(cpu->flag_zf, (b))
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#define SET_SFLAG(b) SET_FLAG(cpu->flag_sf, (b))
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// SET_DFLAG is special
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#define SET_OFLAG(b) SET_FLAG(cpu->flag_of, (b))
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#define SET_TFLAG(b) SET_FLAG(cpu->flag_tf, (b))
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#define SET_RFLAG(b) //UNDONE: not used until 386 debug registers implemented
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#define AUX_VAL 0x10
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#define GET_AUXFLAG (cpu->flag_aux & AUX_VAL)
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#define SET_AUXFLAG_ON SET_AUXFLAG(AUX_VAL)
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#define SET_AUXFLAG_OFF SET_AUXFLAG(0x0)
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#define GET_OFLAG (cpu->flag_of & MSB32)
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#define GET_OFLAGZO (cpu->flag_of >> 31)
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#define SET_OFLAG_ON SET_OFLAG(MSB32)
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#define SET_OFLAG_OFF SET_OFLAG(0)
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#define SET_OFLAG_IND(b) SET_OFLAG(b ? MSB32 : 0)
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#define GET_CFLAG (cpu->flag_cf & MSB32)
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#define GET_CFLAGZO (cpu->flag_cf >> 31)
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#define SET_CFLAG_ON SET_CFLAG(MSB32)
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#define SET_CFLAG_OFF SET_CFLAG(0)
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#define SET_CFLAG_IND(b) SET_CFLAG(b ? MSB32 : 0)
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#define GET_SFLAG (cpu->flag_sf & MSB32)
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#define GET_SFLAGZO (cpu->flag_sf >> 31)
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#define SET_SFLAG_ON SET_SFLAG(MSB32)
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#define SET_SFLAG_OFF SET_SFLAG(0)
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#define SET_SFLAG_IND(b) SET_SFLAG(b ? MSB32 : 0)
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#define GET_PFLAG (ParityBit[cpu->flag_pf & 0xff])
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#define GET_BYTE(addr) (*(UNALIGNED unsigned char *)(addr))
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#define GET_SHORT(addr) (*(UNALIGNED unsigned short *)(addr))
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#define GET_LONG(addr) (*(UNALIGNED unsigned long *)(addr))
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#define PUT_BYTE(addr,dw) {GET_BYTE(addr)=dw;}
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#define PUT_SHORT(addr,dw) {GET_SHORT(addr)=dw;}
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#define PUT_LONG(addr,dw) {GET_LONG(addr)=dw;}
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typedef void (*pfnFrag0)(PCPUDATA);
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typedef void (*pfnFrag18)(PCPUDATA, BYTE *);
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typedef void (*pfnFrag116)(PCPUDATA, USHORT *);
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typedef void (*pfnFrag132)(PCPUDATA, DWORD *);
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typedef void (*pfnFrag28)(PCPUDATA, BYTE *, BYTE);
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typedef void (*pfnFrag216)(PCPUDATA, USHORT *, USHORT);
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typedef void (*pfnFrag232)(PCPUDATA, DWORD *, DWORD);
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typedef void (*pfnFrag38)(PCPUDATA, BYTE *, BYTE, BYTE);
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typedef void (*pfnFrag316)(PCPUDATA, USHORT *, USHORT, USHORT);
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typedef void (*pfnFrag332)(PCPUDATA, DWORD *, DWORD, DWORD);
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/*---------------------------------------------------------------------*/
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extern void CpupUnlockTCAndDoInterrupt(PTHREADSTATE cpu, int Interrupt);
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#define Int0() CpupUnlockTCAndDoInterrupt(cpu, 0) // Divide error
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#define Int3() CpupUnlockTCAndDoInterrupt(cpu, 3) // Breakpoint
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#define Int4() CpupUnlockTCAndDoInterrupt(cpu, 4) // Overflow
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#define Int5() CpupUnlockTCAndDoInterrupt(cpu, 5) // Bound check
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#define Int6() CpupUnlockTCAndDoInterrupt(cpu, 6) // Invalid opcode
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#define Int8() CpupUnlockTCAndDoInterrupt(cpu, 8) // Double fault
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#define Int13(sel) CpupUnlockTCAndDoInterrupt(cpu, 13) // General protection
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#define PRIVILEGED_INSTR Int13(0)
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#define BREAKPOINT_INSTR Int3()
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#define OVERFLOW_INSTR Int4()
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/*---------------------------------------------------------------------*/
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#define PUSH_LONG(dw) { \
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DWORD NewEsp = esp-4; \
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*(DWORD *)(NewEsp) = (DWORD)(dw); \
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esp=NewEsp; \
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}
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#define POP_LONG(dw) { \
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DWORD espTemp = esp; \
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(dw)=*(DWORD *)espTemp; \
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esp=espTemp+4; \
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}
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#define PUSH_SHORT(s) { \
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DWORD NewEsp = esp-2; \
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*(USHORT *)(NewEsp)=(USHORT)(s); \
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esp=NewEsp; \
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}
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#define POP_SHORT(s) { \
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DWORD espTemp = esp; \
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(s)=*(USHORT *)espTemp; \
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esp=espTemp+2; \
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}
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#define XCHG(t, r1, r2) { \
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t temp; \
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temp = r1; \
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r1=r2; \
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r2=temp; \
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}
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#define XCHG_MEM(t, m1, m2) { \
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t temp; \
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temp = *m1; \
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*m1 = *m2; \
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*m2 = temp; \
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}
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#define do_j_b(f) { \
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if (cpu->AdrPrefix) { \
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if (f) { \
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cpu->eipTempReg.i2+=(char)GET_BYTE(eipTemp+1)+2; \
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} else { \
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cpu->eipTempReg.i2+=2; \
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} \
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cpu->AdrPrefix = PREFIX_NONE; \
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} else { \
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if (f) { \
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eipTemp+=(char)GET_BYTE(eipTemp+1)+2; \
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} else { \
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eipTemp+=2; \
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} \
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} \
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}
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#define DO_J(f) { \
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if (cpu->AdrPrefix) { \
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if (f) { \
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cpu->eipTempReg.i2+=(STYPE)GET_VAL(eipTemp+1)+1+sizeof(UTYPE); \
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} else { \
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cpu->eipTempReg.i2+=1+sizeof(UTYPE); \
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} \
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cpu->AdrPrefix = PREFIX_NONE; \
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} else { \
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if (f) { \
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eipTemp+=(STYPE)GET_VAL(eipTemp+1)+1+sizeof(UTYPE); \
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} else { \
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eipTemp+=1+sizeof(UTYPE); \
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} \
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} \
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}
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#define SET_FLAGS_ADD32(r, op1, op2, msb) { \
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DWORD carry = (op1) ^ (op2) ^ (r); \
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/* next line is different for ADD/SUB */ \
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SET_OFLAG(~((op1) ^ (op2)) & ((op2) ^ (r))); \
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SET_CFLAG(carry ^ cpu->flag_of); \
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SET_ZFLAG((r)); \
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SET_SFLAG((r)); \
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SET_PFLAG((r)); \
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SET_AUXFLAG(carry); \
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}
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#define SET_FLAGS_ADD16(r, op1, op2, msb) { \
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DWORD carry = (op1) ^ (op2) ^ (r); \
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/* next line is different for ADD/SUB */ \
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SET_OFLAG((~((op1) ^ (op2)) & ((op2) ^ (r))) << 16); \
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SET_CFLAG((carry<<16) ^ cpu->flag_of); \
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SET_ZFLAG((r)); \
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SET_PFLAG((r)); \
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SET_SFLAG((r) << 16); \
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SET_AUXFLAG(carry); \
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}
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#define SET_FLAGS_ADD8(r, op1, op2, msb) { \
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DWORD carry = (op1) ^ (op2) ^ (r); \
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/* next line is different for ADD/SUB */ \
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SET_OFLAG((~((op1) ^ (op2)) & ((op2) ^ (r))) << 24); \
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SET_CFLAG((carry<<24) ^ cpu->flag_of); \
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SET_ZFLAG((r)); \
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SET_SFLAG((r) << 24); \
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SET_AUXFLAG(carry); \
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SET_PFLAG((r)); \
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}
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#define SET_FLAGS_SUB32(r, op1, op2, msb) { \
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DWORD carry = (op1) ^ (op2) ^ (r); \
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/* next line is different for ADD/SUB */ \
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SET_OFLAG(((op1) ^ (op2)) & ((op1) ^ (r))); \
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SET_CFLAG(carry ^ cpu->flag_of); \
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SET_ZFLAG((r)); \
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SET_SFLAG((r)); \
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SET_AUXFLAG(carry); \
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SET_PFLAG((r)); \
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}
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#define SET_FLAGS_SUB16(r, op1, op2, msb) { \
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DWORD carry = (op1) ^ (op2) ^ (r); \
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/* next line is different for ADD/SUB */ \
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SET_OFLAG((((op1) ^ (op2)) & ((op1) ^ (r))) << 16); \
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SET_CFLAG((carry<<16) ^ cpu->flag_of); \
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SET_ZFLAG((r)); \
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SET_SFLAG((r) << 16); \
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SET_AUXFLAG(carry); \
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SET_PFLAG((r)); \
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}
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#define SET_FLAGS_SUB8(r, op1, op2, msb) { \
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|
|
DWORD carry = (op1) ^ (op2) ^ (r); \
|
||
|
|
/* next line is different for ADD/SUB */ \
|
||
|
|
SET_OFLAG((((op1) ^ (op2)) & ((op1) ^ (r))) << 24); \
|
||
|
|
SET_CFLAG((carry<<24) ^ cpu->flag_of); \
|
||
|
|
SET_ZFLAG((r)); \
|
||
|
|
SET_SFLAG((r) << 24); \
|
||
|
|
SET_AUXFLAG(carry); \
|
||
|
|
SET_PFLAG((r)); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define SET_FLAGS_INC32(r, op1) { \
|
||
|
|
DWORD carry = (op1) ^ 1 ^ (r); \
|
||
|
|
/* next line is different for INC/DEC */ \
|
||
|
|
SET_OFLAG(~((op1) ^ 1) & (1 ^ (r))); \
|
||
|
|
SET_ZFLAG((r)); \
|
||
|
|
SET_SFLAG((r)); \
|
||
|
|
SET_PFLAG((r)); \
|
||
|
|
SET_AUXFLAG(carry); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define SET_FLAGS_INC16(r, op1) { \
|
||
|
|
DWORD carry = (op1) ^ 1 ^ (r); \
|
||
|
|
/* next line is different for INC/DEC */ \
|
||
|
|
SET_OFLAG((~((op1) ^ 1) & (1 ^ (r))) << 16); \
|
||
|
|
SET_ZFLAG((r)); \
|
||
|
|
SET_PFLAG((r)); \
|
||
|
|
SET_SFLAG((r) << 16); \
|
||
|
|
SET_AUXFLAG(carry); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define SET_FLAGS_INC8(r, op1) { \
|
||
|
|
DWORD carry = (op1) ^ 1 ^ (r); \
|
||
|
|
/* next line is different for INC/DEC */ \
|
||
|
|
SET_OFLAG((~((op1) ^ 1) & (1 ^ (r))) << 24); \
|
||
|
|
SET_ZFLAG((r)); \
|
||
|
|
SET_SFLAG((r) << 24); \
|
||
|
|
SET_PFLAG((r)); \
|
||
|
|
SET_AUXFLAG(carry); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define SET_FLAGS_DEC32(r, op1) { \
|
||
|
|
DWORD carry = (op1) ^ 1 ^ (r); \
|
||
|
|
/* next line is different for INC/DEC */ \
|
||
|
|
SET_OFLAG(((op1) ^ 1) & ((op1) ^ (r))); \
|
||
|
|
SET_ZFLAG((r)); \
|
||
|
|
SET_SFLAG((r)); \
|
||
|
|
SET_PFLAG((r)); \
|
||
|
|
SET_AUXFLAG(carry); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define SET_FLAGS_DEC16(r, op1) { \
|
||
|
|
DWORD carry = (op1) ^ 1 ^ (r); \
|
||
|
|
/* next line is different for INC/DEC */ \
|
||
|
|
SET_OFLAG((((op1) ^ 1) & ((op1) ^ (r))) << 16); \
|
||
|
|
SET_ZFLAG((r)); \
|
||
|
|
SET_SFLAG((r) << 16); \
|
||
|
|
SET_PFLAG((r)); \
|
||
|
|
SET_AUXFLAG(carry); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define SET_FLAGS_DEC8(r, op1) { \
|
||
|
|
DWORD carry = (op1) ^ 1 ^ (r); \
|
||
|
|
/* next line is different for INC/DEC */ \
|
||
|
|
SET_OFLAG((((op1) ^ 1) & ((op1) ^ (r))) << 24); \
|
||
|
|
SET_ZFLAG((r)); \
|
||
|
|
SET_SFLAG((r) << 24); \
|
||
|
|
SET_PFLAG((r)); \
|
||
|
|
SET_AUXFLAG(carry); \
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
VOID CpuRaiseStatus( NTSTATUS Status );
|
||
|
|
|
||
|
|
#endif //FRAGP_H
|