492 lines
11 KiB
C
492 lines
11 KiB
C
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/*****************************************************************************
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** **
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** COPYRIGHT (C) 2000, 2001 MKNET CORPORATION **
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** DEVELOPED FOR THE MK7100-BASED VFIR PCI CONTROLLER. **
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** **
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*****************************************************************************/
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/**********************************************************************
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Module Name:
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MK7COMM.C
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Routines:
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MK7Reg_Write
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MK7Reg_Read
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MK7DisableInterrupt
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MK7EnableInterrupt
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MK7SwitchToRXMode
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MK7SwitchToTXMode
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SetSpeed
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MK7ChangeSpeedNow
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Comments:
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**********************************************************************/
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#include "precomp.h"
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#include "protot.h"
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#pragma hdrstop
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baudRateInfo supportedBaudRateTable[NUM_BAUDRATES] = {
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{
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BAUDRATE_2400, // Table index
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2400, // bps
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NDIS_IRDA_SPEED_2400, // NDIS bit mask code (NOTE: We don't support
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// 2400. We set this bit to 0.)
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},
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{
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BAUDRATE_9600,
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9600,
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NDIS_IRDA_SPEED_9600,
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},
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{
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BAUDRATE_19200,
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19200,
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NDIS_IRDA_SPEED_19200,
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},
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{
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BAUDRATE_38400,
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38400,
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NDIS_IRDA_SPEED_38400,
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},
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{
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BAUDRATE_57600,
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57600,
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NDIS_IRDA_SPEED_57600,
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},
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{
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BAUDRATE_115200,
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115200,
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NDIS_IRDA_SPEED_115200,
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},
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{
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BAUDRATE_576000,
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576000,
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NDIS_IRDA_SPEED_576K,
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},
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{
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BAUDRATE_1152000,
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1152000,
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NDIS_IRDA_SPEED_1152K,
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},
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{
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BAUDRATE_4M,
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4000000,
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NDIS_IRDA_SPEED_4M,
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},
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{
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BAUDRATE_16M,
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16000000,
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NDIS_IRDA_SPEED_16M,
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}
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};
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// Write to IRCONFIG2 w/ these to set SIR/MIR speeds
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MK7REG HwSirMirSpeedTable[] = {
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HW_SIR_SPEED_2400,
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HW_SIR_SPEED_9600,
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HW_SIR_SPEED_19200,
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HW_SIR_SPEED_38400,
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HW_SIR_SPEED_57600,
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HW_SIR_SPEED_115200,
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HW_MIR_SPEED_576000,
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HW_MIR_SPEED_1152000
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};
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#if DBG
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//----------------------------------------------------------------------
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//
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// NOTE: The following Write and Read routines are bracketed w/ DBG
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// switch. In the non-debug version, these 2 calls are inline
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// macros for faster execution.
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//
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//----------------------------------------------------------------------
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//----------------------------------------------------------------------
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// Procedure: [MK7Reg_Write]
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//
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// Description: Write to the MK7100 register.
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// (Note: In the free build, this is an inline macro. It's
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// here in the checked build for debugging.)
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//----------------------------------------------------------------------
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VOID MK7Reg_Write(PMK7_ADAPTER Adapter, ULONG port, USHORT val)
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{
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PUCHAR ioport;
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// Break this out for debugging
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ioport = Adapter->MappedIoBase + port;
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NdisRawWritePortUshort(ioport, val);
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}
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//----------------------------------------------------------------------
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// Procedure: [MK7Reg_Read]
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//
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// Description: Read from MK7100 register.
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// (Note: In the free build, this is an inline macro. It's
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// here in the checked build for debugging.)
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//----------------------------------------------------------------------
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VOID MK7Reg_Read(PMK7_ADAPTER Adapter, ULONG port, USHORT *pval)
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{
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PUCHAR ioport;
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// Break this out for debugging
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ioport = Adapter->MappedIoBase + port;
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NdisRawReadPortUshort(ioport, pval);
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}
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#endif
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//----------------------------------------------------------------------
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// Procedure: [MK7DisableInterrupt]
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//
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// Description: Disable all interrupts on the MK7
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//
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// Arguments:
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// Adapter - ptr to Adapter object instance
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//
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// Returns:
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// NDIS_STATUS_SUCCESS - If an adapter is successfully found and claimed
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// NDIS_STATUS_FAILURE - If an adapter is not found/claimed
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//
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//----------------------------------------------------------------------
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NDIS_STATUS MK7DisableInterrupt(PMK7_ADAPTER Adapter)
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{
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MK7REG mk7reg;
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UINT i;
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// NOTE: Workaround for potential hw problem where 0xFFFF is returned
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for (i=0; i<50; i++) {
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MK7Reg_Read(Adapter, R_CFG3, &mk7reg);
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if (mk7reg != 0xFFFF) {
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break;
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}
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}
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ASSERT(i < 50);
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mk7reg &= (~B_ENAB_INT);
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MK7Reg_Write(Adapter, R_CFG3, mk7reg);
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return(NDIS_STATUS_SUCCESS);
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}
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//----------------------------------------------------------------------
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// Procedure: [MK7EnableInterrupt]
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//
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// Description: Enable all interrupts on the MK7
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//
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// Arguments:
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// Adapter - ptr to Adapter object instance
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//
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// Returns:
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// NDIS_STATUS_SUCCESS - If an adapter is successfully found and claimed
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// NDIS_STATUS_FAILURE - If an adapter is not found/claimed
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//
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//----------------------------------------------------------------------
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NDIS_STATUS MK7EnableInterrupt(PMK7_ADAPTER Adapter)
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{
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MK7REG mk7reg;
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UINT i;
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// NOTE: Workaround for potential hw problem where 0xFFFF is returned
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for (i=0; i<50; i++) {
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MK7Reg_Read(Adapter, R_CFG3, &mk7reg);
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if (mk7reg != 0xFFFF) {
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break;
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}
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}
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ASSERT(i < 50);
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mk7reg |= B_ENAB_INT;
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MK7Reg_Write(Adapter, R_CFG3, mk7reg);
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// PROMPT - Always after an Enable
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MK7Reg_Write(Adapter, R_PRMT, 0);
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return(NDIS_STATUS_SUCCESS);
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}
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//----------------------------------------------------------------------
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// Procedure: [MK7SwitchToRXMode]
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//
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// Description: Put hw in receive mode.
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//
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// Actions:
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// - Hw registers are programmed accordingly.
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// - IOMode set to RX_MODE.
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// - SlaveTXStuckCnt reset.
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//----------------------------------------------------------------------
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VOID MK7SwitchToRXMode(PMK7_ADAPTER Adapter)
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{
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MK7REG mk7reg;
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MK7Reg_Read(Adapter, R_CFG0, &mk7reg);
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mk7reg &= (~B_CFG0_ENTX);
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MK7Reg_Write(Adapter, R_CFG0, mk7reg);
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Adapter->IOMode = RX_MODE;
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DBGLOG("- Switch to RX mode", 0);
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}
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//----------------------------------------------------------------------
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// Procedure: [MK7SwitchToTXMode]
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//
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// Description: Put hw in receive mode.
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//
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// Actions:
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// - Hw registers are programmed accordingly.
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// - IOMode set to TX_MODE.
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//----------------------------------------------------------------------
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VOID MK7SwitchToTXMode(PMK7_ADAPTER Adapter)
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{
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MK7REG mk7reg;
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MK7Reg_Read(Adapter, R_CFG0, &mk7reg);
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mk7reg |= B_CFG0_ENTX;
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MK7Reg_Write(Adapter, R_CFG0, mk7reg);
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Adapter->IOMode = TX_MODE;
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DBGLOG("- Switch to TX mode", 0);
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}
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//----------------------------------------------------------------------
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// Procedure: [SetSpeed]
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//
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// Description:
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// Set the hw to a new speed.
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// [IMPORTANT: This should be called only from xxxSetInformation().]
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//
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// Actions:
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//----------------------------------------------------------------------
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BOOLEAN SetSpeed(PMK7_ADAPTER Adapter)
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{
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UINT i, bps;
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MK7REG mk7reg;
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PTCB tcb;
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//******************************
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// The idea is any sends that came before the change-speed command are
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// sent at the old speed. There are 3 scenarios here:
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// 1. There's no TXs outstanding -- We can change speed right away.
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// 2. There's TXs oustanding in the TX ring but none in the TX q -- We
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// do not change speed right away.
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// 3. There's TXs oustanding in the TX q (may be also in the TX ring) --
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// We do not change speed right away.
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//******************************
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DBGLOG("=> SetSpeed", 0);
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// If we're already waiting to change speed, fail all such requests
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// until the original is done. (Is this good?)
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//if (Adapter->changeSpeedPending) {
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// LOG("SetSpeed: already pending", 0);
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// return (FALSE);
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//}
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// This means 1 TX is already active. Change speed on completion.
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if (Adapter->NumPacketsQueued == 1) {
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Adapter->changeSpeedPending = CHANGESPEED_ON_DONE; // After the latest tx
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DBGLOG("<= SetSpeed: Q", 0);
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return (TRUE);
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}
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else
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if (Adapter->NumPacketsQueued > 1) {
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Adapter->changeSpeedAfterThisPkt = Adapter->LastTxQueue;
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Adapter->changeSpeedPending = CHANGESPEED_ON_Q;
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DBGLOG("<= SetSpeed: Qs", 0);
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return (TRUE);
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}
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// There's nothing pending TX or TX completion we must be
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// changing speed in RX mode.
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MK7ChangeSpeedNow(Adapter);
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return(TRUE);
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}
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//----------------------------------------------------------------------
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// Procedure: [MK7ChangeSpeedNow]
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//
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// Description:
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// Set the hw to a new speed.
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//
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// Actions:
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//----------------------------------------------------------------------
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VOID MK7ChangeSpeedNow(PMK7_ADAPTER Adapter)
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{
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UINT i, bps;
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MK7REG mk7reg, mk7reg_cfg3, mk7reg_w;
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DBGLOG("=> MK7ChangeSpeedNow", 0);
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bps = Adapter->linkSpeedInfo->bitsPerSec;
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//****************************************
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// Clear IRENABLE Bit
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// This is the only writeable bit in this reg so just write it.
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//****************************************
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MK7Reg_Write(Adapter, R_ENAB, ~B_ENAB_IRENABLE);
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// NOTE: Workaround for potential hw problem where 0xFFFF is returned.
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// (See aLSO MK7EnableInterrupt & MK7DisableInterrupt)
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for (i=0; i<50; i++) {
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MK7Reg_Read(Adapter, R_CFG3, &mk7reg_cfg3);
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if (mk7reg_cfg3 != 0xFFFF) {
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break;
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}
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}
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ASSERT(i < 50);
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// Need distinguish between changing speed in RX or TX mode.
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// Prep the bit that says TX or RX
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if (Adapter->IOMode == TX_MODE) {
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mk7reg_w = 0x1000;
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}
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else {
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mk7reg_w = 0;
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}
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if (bps <= MAX_SIR_SPEED) { // SIR
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if (Adapter->Wireless) {
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// WIRELESS: ... no INVERTTX
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mk7reg_w |= 0x0E18;
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}
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else {
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// WIRED: ENRX, DMA, small pkts, SIR, SIR RX filter, INVERTTX
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mk7reg_w |= 0x0E1A;
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}
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MK7Reg_Write(Adapter, R_CFG0, mk7reg_w);
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// Baud rate & pulse width
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i = Adapter->linkSpeedInfo->tableIndex;
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mk7reg = HwSirMirSpeedTable[i];
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MK7Reg_Write(Adapter, R_CFG2, mk7reg);
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mk7reg_cfg3 &= ~B_FAST_TX;
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MK7Reg_Write(Adapter, R_CFG3, mk7reg_cfg3);
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DBGLOG(" SIR", 0);
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}
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else
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if (bps < MIN_FIR_SPEED) { // MIR
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if (Adapter->Wireless) {
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// WIRELESS: ... no INVERTTX
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mk7reg_w |= 0x0CA0;
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}
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else {
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// WIRED: ENRX, DMA, 16-bit CRC, MIR, INVERTTX
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||
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|
mk7reg_w |= 0x0CA2;
|
||
|
|
}
|
||
|
|
MK7Reg_Write(Adapter, R_CFG0, mk7reg_w);
|
||
|
|
|
||
|
|
// Baud rate & pulse width, & preamble
|
||
|
|
i = Adapter->linkSpeedInfo->tableIndex;
|
||
|
|
mk7reg = HwSirMirSpeedTable[i];
|
||
|
|
mk7reg |= 0x0001; // Preamble
|
||
|
|
MK7Reg_Write(Adapter, R_CFG2, mk7reg);
|
||
|
|
|
||
|
|
mk7reg_cfg3 |= B_FAST_TX;
|
||
|
|
MK7Reg_Write(Adapter, R_CFG3, mk7reg_cfg3);
|
||
|
|
|
||
|
|
DBGLOG(" MIR", 0);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
if (bps < VFIR_SPEED) { // FIR
|
||
|
|
if (Adapter->Wireless) {
|
||
|
|
// WIRELESS: ... no INVERTTX
|
||
|
|
mk7reg_w |= 0x0C40;
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
// WIRED: ENRX, DMA, 32-bit CRC, FIR, INVERTTX
|
||
|
|
mk7reg_w |= 0x0C42;
|
||
|
|
}
|
||
|
|
MK7Reg_Write(Adapter, R_CFG0, mk7reg_w);
|
||
|
|
|
||
|
|
MK7Reg_Write(Adapter, R_CFG2, 0x000A); // 10 Preambles
|
||
|
|
|
||
|
|
mk7reg_cfg3 |= B_FAST_TX;
|
||
|
|
MK7Reg_Write(Adapter, R_CFG3, mk7reg_cfg3);
|
||
|
|
|
||
|
|
DBGLOG(" FIR", 0);
|
||
|
|
}
|
||
|
|
else { // VFIR
|
||
|
|
// For testing 4Mbps in VFIR mode.
|
||
|
|
//if (Adapter->Wireless) {
|
||
|
|
// WIRELESS: ... no INVERTTX
|
||
|
|
// mk7reg_w |= 0x0C40;
|
||
|
|
//}
|
||
|
|
//else {
|
||
|
|
// WIRED: ENRX, DMA, 32-bit CRC, FIR, INVERTTX
|
||
|
|
// mk7reg_w |= 0x0C42;
|
||
|
|
//}
|
||
|
|
//MK7Reg_Write(Adapter, R_CFG0, mk7reg_w);
|
||
|
|
|
||
|
|
if (Adapter->Wireless) {
|
||
|
|
// WIRELESS: ... no INVERTTX
|
||
|
|
mk7reg_w |= 0x2C00;
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
// WIRED: VFIR, ENRX, DMA, 32-bit CRC, FIR, INVERTTX
|
||
|
|
mk7reg_w |= 0x2C02;
|
||
|
|
}
|
||
|
|
MK7Reg_Write(Adapter, R_CFG0, mk7reg_w);
|
||
|
|
|
||
|
|
|
||
|
|
MK7Reg_Write(Adapter, R_CFG2, 0x000A); // 10 Preambles
|
||
|
|
|
||
|
|
mk7reg_cfg3 |= B_FAST_TX;
|
||
|
|
MK7Reg_Write(Adapter, R_CFG3, mk7reg_cfg3);
|
||
|
|
|
||
|
|
DBGLOG(" VFIR", 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
Adapter->CurrentSpeed = bps;
|
||
|
|
|
||
|
|
|
||
|
|
//****************************************
|
||
|
|
// Set IRENABLE Bit
|
||
|
|
//****************************************
|
||
|
|
MK7Reg_Write(Adapter, R_ENAB, B_ENAB_IRENABLE);
|
||
|
|
|
||
|
|
|
||
|
|
//****************************************
|
||
|
|
// PROMPT
|
||
|
|
//****************************************
|
||
|
|
MK7Reg_Write(Adapter, R_PRMT, 0);
|
||
|
|
|
||
|
|
return;
|
||
|
|
}
|