181 lines
4 KiB
C
181 lines
4 KiB
C
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/*++
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Copyright (c) 1994-1995 International Buisness Machines Corporation
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Copyright (c) 1994-1995 Microsoft Corporation
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Module Name:
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sdac.c
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Abstract:
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This module contains the code that initializes the S3 SDAC.
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Environment:
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Kernel mode
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Revision History:
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--*/
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#include "s3.h"
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#if defined(ALLOC_PRAGMA)
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#pragma alloc_text(PAGE,InitializeSDAC)
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#pragma alloc_text(PAGE,FindSDAC)
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#endif
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BOOLEAN
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InitializeSDAC( PHW_DEVICE_EXTENSION HwDeviceExtension )
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/*++
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Routine Description:
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Initializes the SDAC.
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Arguments:
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HwDeviceExtension - Supplies a pointer to the miniport's device extension.
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Return Value:
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Always TRUE
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--*/
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{
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SDAC_PLL_PARMS
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*SdacClk0;
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ULONG
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tablebase;
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UCHAR
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i,
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clk,
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dval,
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old55;
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tablebase = HwDeviceExtension->ActiveFrequencyEntry->Fixed.Clock;
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clk = (UCHAR) tablebase;
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tablebase = (tablebase < 8) ? 0 : ((tablebase - 2) / 6) * 6;
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SdacClk0 = &SdacTable[tablebase];
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clk -= (UCHAR) tablebase;
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clk |= 0x20;
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// set RS[2] with CR55[0];
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VideoPortWritePortUchar(CRT_ADDRESS_REG, 0x55);
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dval = VideoPortReadPortUchar(CRT_DATA_REG);
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old55 = dval;
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dval &= 0xfc;
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dval |= 0x01;
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VideoPortWritePortUchar(CRT_DATA_REG, dval);
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VideoPortReadPortUchar(CRT_DATA_REG);
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// Enhanced Command Register
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if( HwDeviceExtension->ActiveFrequencyEntry->BitsPerPel == 16 )
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VideoPortWritePortUchar(DAC_PIXEL_MASK_REG, 0x50);
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else
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VideoPortWritePortUchar(DAC_PIXEL_MASK_REG, 0x00);
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// Program CLK0 registers
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for( i = 2; i < 8; ++i ) // write registers f2 - f7 only
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{
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// make sure we don't run off the end of the table
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if( (ULONG_PTR) &SdacClk0[i] >= (ULONG_PTR) &SdacTable[SDAC_TABLE_SIZE] )
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break;
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if( SdacClk0[i].m || SdacClk0[i].n )
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{
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VideoPortWritePortUchar(DAC_ADDRESS_WRITE_PORT, i);
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VideoPortWritePortUchar(DAC_DATA_REG_PORT, SdacClk0[i].m);
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VideoPortWritePortUchar(DAC_DATA_REG_PORT, SdacClk0[i].n);
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}
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}
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// Program CLK1
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VideoPortWritePortUchar(DAC_ADDRESS_WRITE_PORT, 0x0a);
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VideoPortWritePortUchar(DAC_DATA_REG_PORT, 0x41);
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VideoPortWritePortUchar(DAC_DATA_REG_PORT, 0x26);
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// select CLK0 with the PLL control register
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VideoPortWritePortUchar(DAC_ADDRESS_WRITE_PORT, 0x0e);
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VideoPortWritePortUchar(DAC_DATA_REG_PORT, clk);
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// restore CR55
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VideoPortWritePortUchar(CRT_ADDRESS_REG, 0x55);
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VideoPortWritePortUchar(CRT_DATA_REG, old55);
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return( TRUE );
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}
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BOOLEAN
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FindSDAC( PHW_DEVICE_EXTENSION HwDeviceExtension )
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/*++
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Routine Description:
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Detects and S3 SDAC.
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Arguments:
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HwDeviceExtension - Supplies a pointer to the miniport's device extension.
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Return Value:
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TRUE if SDAC detected; FALSE if not.
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--*/
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{
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UCHAR
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regval,
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old55;
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// 4 consecutive reads of the SDAC's Pixel Mask Register cause
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// the next access to that register to be redirected to the
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// SDAC's Enhanced Command Register, additionally the 4th read
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// returns 0x70 to identify the SDAC
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// set CR55[0] to access the Pixel Mask Register
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VideoPortWritePortUchar( CRT_ADDRESS_REG, 0x55 );
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old55 = VideoPortReadPortUchar( CRT_DATA_REG );
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VideoPortWritePortUchar( CRT_DATA_REG, (UCHAR) (old55 & 0xfc) );
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// look for the SDAC's ID
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VideoPortWritePortUchar( DAC_PIXEL_MASK_REG, 0 );
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VideoPortWritePortUchar( DAC_PIXEL_MASK_REG, 0xff );
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VideoPortReadPortUchar( DAC_PIXEL_MASK_REG );
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VideoPortReadPortUchar( DAC_PIXEL_MASK_REG );
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VideoPortReadPortUchar( DAC_PIXEL_MASK_REG );
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regval = VideoPortReadPortUchar( DAC_PIXEL_MASK_REG );
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if( (regval & 0xf0) == 0x70 )
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{
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// clear the redirection
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VideoPortReadPortUchar( DAC_PIXEL_MASK_REG );
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return( TRUE );
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}
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// restore the contents of register 55
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VideoPortWritePortUchar( CRT_ADDRESS_REG, 0x55 );
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VideoPortWritePortUchar( CRT_DATA_REG, old55 );
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return( FALSE );
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}
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