368 lines
16 KiB
C
368 lines
16 KiB
C
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/*****************************************************************************
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*
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* (C) Copyright MICROSOFT Corp., 1996
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*
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* Title: ACPITABL.H --- Definitions and descriptions of the various BIOS supplied ACPI tables.
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*
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* Version: 1.00
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*
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* Date: 6-17-96
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*
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* Author: Jason Clark (jasoncl)
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*
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*------------------------------------------------------------------------------
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*
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* Change log:
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*
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* DATE REV DESCRIPTION
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* ----------- --- -----------------------------------------------------------
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*
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****************************************************************************/
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// These map to bios provided structures, so turn on 1 byte packing
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#include <pshpack1.h>
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#define SPEC_VER 100
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#define RSDP_SIGNATURE 0x2052545020445352 // "RSD PTR "
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typedef struct _RSDP { // Root System Description Table Pointer Structure
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ULONGLONG Signature; // 8 UCHAR table signature 'RSD PTR '
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UCHAR Checksum; // sum of all UCHARs of structure must = 0
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UCHAR OEMID[6]; // String that uniquely ID's the OEM
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UCHAR Reserved[1]; // must be 0
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ULONG RsdtAddress; // physical address of Root System Description Table
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} RSDP;
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typedef RSDP *PRSDP;
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#ifndef NEC_98
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#define RSDP_SEARCH_RANGE_BEGIN 0xE0000 // physical address where we begin searching for the RSDP
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#else // NEC_98
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#define RSDP_SEARCH_RANGE_BEGIN 0xE8000 // physical address where we begin searching for the RSDP
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#endif // NEC_98
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#define RSDP_SEARCH_RANGE_END 0xFFFFF
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#define RSDP_SEARCH_RANGE_LENGTH (RSDP_SEARCH_RANGE_END-RSDP_SEARCH_RANGE_BEGIN+1)
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#define RSDP_SEARCH_INTERVAL 16 // search on 16 byte boundaries
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typedef struct _DESCRIPTION_HEADER { // Header structure appears at the beginning of each ACPI table
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ULONG Signature; // Signature used to identify the type of table
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ULONG Length; // Length of entire table including the DESCRIPTION_HEADER
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UCHAR Revision; // Minor version of ACPI spec to which this table conforms
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UCHAR Checksum; // sum of all bytes in the entire TABLE should = 0
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UCHAR OEMID[6]; // String that uniquely ID's the OEM
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UCHAR OEMTableID[8]; // String that uniquely ID's this table (used for table patching and replacement).
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ULONG OEMRevision; // OEM supplied table revision number. Bigger number = newer table.
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#if SPEC_VER > 92
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UCHAR CreatorID[4]; // Vendor ID of utility which created this table.
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ULONG CreatorRev; // Revision of utility that created the table.
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#endif
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} DESCRIPTION_HEADER;
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typedef DESCRIPTION_HEADER *PDESCRIPTION_HEADER;
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// Header constants
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#define ACPI_MAX_SIGNATURE 4
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#define ACPI_MAX_OEM_ID 6
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#define ACPI_MAX_TABLE_ID 8
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#define ACPI_MAX_TABLE_STRINGS ACPI_MAX_SIGNATURE + ACPI_MAX_OEM_ID + ACPI_MAX_TABLE_ID
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#define FACS_SIGNATURE 0x53434146 // "FACS"
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typedef struct _FACS { // Firmware ACPI Control Structure. Note that this table does not have a header, it is pointed to by the FADT
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ULONG Signature; // 'FACS'
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ULONG Length; // Length of entire firmware ACPI control structure (must be 64 bytes or larger)
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ULONG HardwareSignature;
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ULONG pFirmwareWakingVector; // physical address of location where the OS needs to put the firmware waking vector
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ULONG GlobalLock; // 32 bit structure used for sharing Embedded Controller
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#if SPEC_VER > 92
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ULONG Flags;
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UCHAR Reserved[40];
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#else
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UCHAR Reserved [44];
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#endif
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} FACS;
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typedef FACS *PFACS;
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// FACS.GlobalLock bit field definitions
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#define GL_PENDING_BIT 0x00
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#define GL_PENDING (1 << GL_PENDING_BIT)
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#define GL_OWNER_BIT 0x01
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#define GL_OWNER (1 << GL_OWNER_BIT)
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#define GL_NON_RESERVED_BITS_MASK (GL_PENDING+GL_OWNED)
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// FACS Flags definitions
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#define FACS_S4BIOS_SUPPORTED_BIT 0 // flag indicates whether or not the BIOS will save/restore memory around S4
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#define FACS_S4BIOS_SUPPORTED (1 << FACS_S4BIOS_SUPPORTED_BIT)
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#define FADT_SIGNATURE 0x50434146 // "FACP"
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typedef struct _FADT { // Fixed ACPI description table
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DESCRIPTION_HEADER Header;
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ULONG facs; // Physical address of the Firmware ACPI Control Structure
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ULONG dsdt; // Physical address of the Differentiated System Description Table
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UCHAR int_model; // System's Interrupt mode, 0=Dual PIC, 1=Multiple APIC, >1 reserved
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UCHAR reserved4;
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USHORT sci_int_vector; // Vector of SCI interrupt.
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PUCHAR smi_cmd_io_port; // Address in System I/O Space of the SMI Command port, used to enable and disable ACPI.
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UCHAR acpi_on_value; // Value out'd to smi_cmd_port to activate ACPI
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UCHAR acpi_off_value; // Value out'd to smi_cmd_port to deactivate ACPI
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UCHAR s4bios_req; // Value to write to SMI_CMD to enter the S4 state.
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UCHAR reserved1; // Must Be 0
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ULONG pm1a_evt_blk_io_port; // Address in System I/O Space of the PM1a_EVT_BLK register block
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ULONG pm1b_evt_blk_io_port; // Address in System I/O Space of the PM1b_EVT_BLK register block
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ULONG pm1a_ctrl_blk_io_port; // Address in System I/O Space of the PM1a_CNT_BLK register block
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ULONG pm1b_ctrl_blk_io_port; // Address in System I/O Space of the PM1b_CNT_BLK register block
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ULONG pm2_ctrl_blk_io_port; // Address in System I/O Space of the PM2_CNT_BLK register block
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ULONG pm_tmr_blk_io_port; // Address in System I/O Space of the PM_TMR register block
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ULONG gp0_blk_io_port; // Address in System I/O Space of the GP0 register block
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ULONG gp1_blk_io_port; // Address in System I/O Space of the GP1 register block
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UCHAR pm1_evt_len; // number of bytes decoded for PM1_BLK (must be >= 4)
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UCHAR pm1_ctrl_len; // number of bytes decoded for PM1_CNT (must be >= 2)
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UCHAR pm2_ctrl_len; // number of bytes decoded for PM1a_CNT (must be >= 1)
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UCHAR pm_tmr_len; // number of bytes decoded for PM_TMR (must be >= 4)
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UCHAR gp0_blk_len; // number of bytes decoded for GP0_BLK (must be multiple of 2)
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UCHAR gp1_blk_len; // number of bytes decoded for GP1_BLK (must be multiple of 2)
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UCHAR gp1_base; // index at which GP1 based events start
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UCHAR reserved2; // Must Be 0
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USHORT lvl2_latency; // Worst case latency in microseconds required to enter and leave the C2 processor state
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USHORT lvl3_latency; // Worst case latency in microseconds required to enter and leave the C3 processor state
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USHORT flush_size; // Ignored if WBINVD flag is 1 -- indicates size of memory read to flush dirty lines from
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// any processors memory caches. A size of zero indicates this is not supported.
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USHORT flush_stride; // Ignored if WBINVD flag is 1 -- the memory stride width, in bytes, to perform reads to flush
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// the processor's memory caches.
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UCHAR duty_offset; // zero based index of where the processor's duty cycle setting is within the processor's P_CNT register.
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UCHAR duty_width; // bit width of the processor's duty cycle setting value in the P_CNT register.
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// a value of zero indicates that processor duty cycle is not supported
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UCHAR day_alarm_index;
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UCHAR month_alarm_index;
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UCHAR century_alarm_index;
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#if SPEC_VER > 92
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UCHAR reserved3[3];
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ULONG flags;
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#else
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UCHAR reserved3;
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ULONG flags;
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#endif
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} FADT;
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typedef FADT *PFADT;
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// definition of FADT.flags bits
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// this one bit flag indicates whether or not the WBINVD instruction works properly,if this bit is not set we can not use S2, S3 states, or
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// C3 on MP machines
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#define WRITEBACKINVALIDATE_WORKS_BIT 0
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#define WRITEBACKINVALIDATE_WORKS (1 << WRITEBACKINVALIDATE_WORKS_BIT)
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// this flag indicates if wbinvd works EXCEPT that it does not invalidate the cache
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#define WRITEBACKINVALIDATE_DOESNT_INVALIDATE_BIT 1
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#define WRITEBACKINVALIDATE_DOESNT_INVALIDATE (1 << WRITEBACKINVALIDATE_DOESNT_INVALIDATE_BIT)
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// this flag indicates that the C1 state is supported on all processors.
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#define SYSTEM_SUPPORTS_C1_BIT 2
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#define SYSTEM_SUPPORTS_C1 (1 << SYSTEM_SUPPORTS_C1_BIT)
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// this one bit flag indicates whether support for the C2 state is restricted to uniprocessor machines
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#define P_LVL2_UP_ONLY_BIT 3
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#define P_LVL2_UP_ONLY (1 << P_LVL2_UP_ONLY_BIT)
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// this bit indicates whether the PWR button is treated as a fix feature (0) or a generic feature (1)
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#define PWR_BUTTON_GENERIC_BIT 4
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#define PWR_BUTTON_GENERIC (1 << PWR_BUTTON_GENERIC_BIT)
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#define SLEEP_BUTTON_GENERIC_BIT 5
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#define SLEEP_BUTTON_GENERIC (1 << SLEEP_BUTTON_GENERIC_BIT)
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// this bit indicates whether the RTC wakeup status is reported in fix register space (0) or not (1)
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#define RTC_WAKE_GENERIC_BIT 6
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#define RTC_WAKE_GENERIC (1 << RTC_WAKE_GENERIC_BIT)
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#define RTC_WAKE_FROM_S4_BIT 7
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#define RTC_WAKE_FROM_S4 (1 << RTC_WAKE_FROM_S4_BIT)
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// This bit indicates whether the machine implements a 24 or 32 bit timer.
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#define TMR_VAL_EXT_BIT 8
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#define TMR_VAL_EXT (1 << TMR_VAL_EXT_BIT)
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// This bit indicates whether the machine supports docking
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#define DCK_CAP_BIT 9
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#define DCK_CAP (1 << DCK_CAP_BIT)
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// spec defines maximum entry/exit latency values for C2 and C3, if the FADT indicates that these values are
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// exceeded then we do not use that C state.
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#define C2_MAX_LATENCY 100
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#define C3_MAX_LATENCY 1000
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#ifndef ANYSIZE_ARRAY
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#define ANYSIZE_ARRAY 1
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#endif
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// Multiple APIC description table
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typedef struct _MAPIC {
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DESCRIPTION_HEADER Header;
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ULONG LocalAPICAddress; // Physical Address at which each processor can access its local APIC
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ULONG Flags;
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ULONG APICTables[ANYSIZE_ARRAY]; // A list of APIC tables.
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} MAPIC;
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typedef MAPIC *PMAPIC;
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// Multiple APIC structure flags
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#define PCAT_COMPAT_BIT 0 // indicates that the system also has a dual 8259 pic setup.
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#define PCAT_COMPAT (1 << PCAT_COMPAT_BIT)
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// APIC Structure Types
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#define PROCESSOR_LOCAL_APIC 0
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#define IO_APIC 1
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#define ISA_VECTOR_OVERRIDE 2
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#define NMI_SOURCE 3
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#define PROCESSOR_LOCAL_APIC_LENGTH 8
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#define IO_APIC_LENGTH 12
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#define ISA_VECTOR_OVERRIDE_LENGTH 10
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#define NMI_SOURCE_LENGTH 8
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// The shared beginning info in all APIC Structures
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typedef struct _APICTABLE {
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UCHAR Type;
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UCHAR Length;
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} APICTABLE;
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typedef APICTABLE *PAPICTABLE;
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typedef struct _PROCLOCALAPIC {
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UCHAR Type; // should be zero to identify a ProcessorLocalAPIC structure
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UCHAR Length; // better be 8
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UCHAR ACPIProcessorID; // ProcessorID for which this processor is listed in the ACPI processor declaration
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// operator.
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UCHAR APICID; // The processor's local APIC ID.
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ULONG Flags;
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} PROCLOCALAPIC;
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typedef PROCLOCALAPIC *PPROCLOCALAPIC;
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// Processor Local APIC Flags
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#define PLAF_ENABLED_BIT 0
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#define PLAF_ENABLED (1 << PLAF_ENABLED_BIT)
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typedef struct _IOAPIC {
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UCHAR Type;
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UCHAR Length; // better be 12
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UCHAR IOAPICID;
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UCHAR Reserved;
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ULONG IOAPICAddress; // Physical address at which this IO APIC resides.
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ULONG SystemVectorBase; // system interrupt vector index for this APIC
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} IOAPIC;
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typedef IOAPIC *PIOAPIC;
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// Interrupt Source Override
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typedef struct {
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UCHAR Type; // Must be 2
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UCHAR Length; // Must be 10
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UCHAR Bus; // Must be 0
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UCHAR Source; // BusRelative IRQ
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ULONG GlobalSystemInterruptVector; // Global IRQ
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USHORT Flags; // Same as MPS INTI Flags
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} ISA_VECTOR, *PISA_VECTOR;
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// Non Maskable Source Interrupt
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typedef struct {
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UCHAR Type; // must be 3
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UCHAR Length; // better be 8
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USHORT Flags; // Same as MPS INTI Flags
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ULONG GlobalSystemInterruptVector; // Interrupt connected to NMI
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} NMISOURCE, *PNMISOURCE;
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typedef struct _SMARTBATTTABLE {
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DESCRIPTION_HEADER Header;
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ULONG WarningEnergyLevel; // mWh at which the OEM suggests we warn the user that the battery is getting low.
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ULONG LowEnergyLevel; // mWh at which the OEM suggests we put the machine into a sleep state.
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ULONG CriticalEnergyLevel; // mWH at which the OEM suggests we do an emergency shutdown.
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} SMARTBATTTABLE;
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typedef SMARTBATTTABLE *PSMARTBATTTABLE;
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#define RSDT_SIGNATURE 0x54445352 // "RSDT"
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typedef struct _RSDT { // Root System Description Table
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DESCRIPTION_HEADER Header;
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ULONG Tables[ANYSIZE_ARRAY]; // The structure contains an n length array of physical addresses each of which point to another table.
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} RSDT;
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typedef RSDT *PRSDT;
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// The below macro uses the min macro to protect against the case where we are running on machine which is compliant with
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// a spec prior to .99. If you had a .92 compliant header and one table pointer we would end of subtracting 32-36 resulting
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// in a really big number and hence we would think we had lots and lots of tables... Using the min macro we end up subtracting
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// the length-length getting zero which will be harmless and cause us to fail to load (with a red screen on Win9x) which is
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// the best we can do in this case.
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#ifndef min
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#define min(a,b) (((a) < (b)) ? (a) : (b))
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#endif
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#define NumTableEntriesFromRSDTPointer(p) (p->Header.Length-min(p->Header.Length,sizeof(DESCRIPTION_HEADER)))/4
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#define APIC_SIGNATURE 0x43495041 // "APIC"
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#define DSDT_SIGNATURE 0x54445344 // "DSDT"
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#define SSDT_SIGNATURE 0x54445353 // "SSDT"
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||
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|
#define PSDT_SIGNATURE 0x54445350 // "PSDT"
|
||
|
|
#define SBST_SIGNATURE 0x54534253 // "SBST"
|
||
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|
||
|
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typedef struct _DSDT { // Differentiated System Description Table
|
||
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|
||
|
|
DESCRIPTION_HEADER Header;
|
||
|
|
UCHAR DiffDefBlock[ANYSIZE_ARRAY]; // this is the AML describing the base system.
|
||
|
|
|
||
|
|
} DSDT;
|
||
|
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|
||
|
|
typedef DSDT *PDSDT;
|
||
|
|
|
||
|
|
// Resume normal structure packing
|
||
|
|
|
||
|
|
#include <poppack.h>
|
||
|
|
|
||
|
|
#ifdef BOOLEAN // hack to build ASL.exe
|
||
|
|
typedef struct {
|
||
|
|
UCHAR NamespaceProcID;
|
||
|
|
UCHAR ApicID;
|
||
|
|
UCHAR NtNumber;
|
||
|
|
BOOLEAN Started;
|
||
|
|
} PROC_LOCAL_APIC, *PPROC_LOCAL_APIC;
|
||
|
|
|
||
|
|
extern PROC_LOCAL_APIC HalpProcLocalApicTable[];
|
||
|
|
#endif
|
||
|
|
|