437 lines
16 KiB
C
437 lines
16 KiB
C
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/*++
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Copyright (c) 1994-1999 Digital Equipment Corporation
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Module Name:
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ntddpcm.h
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Abstract:
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This is the include file that defines all constants and types for
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accessing the PCMCIA Adapters.
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// @@BEGIN_DDKSPLIT
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Author:
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Jeff McLeman
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Revision History:
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Ravisankar Pudipeddi (ravisp) 1-Jan-1997
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// @@END_DDKSPLIT
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--*/
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#ifndef _NTDDPCMH_
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#define _NTDDPCMH_
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#if _MSC_VER > 1000
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#pragma once
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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//
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// Device Name - this string is the name of the device. It is the name
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// that should be passed to NtOpenFile when accessing the device.
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//
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// Note: For devices that support multiple units, it should be suffixed
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// with the Ascii representation of the unit number.
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//
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#define IOCTL_PCMCIA_BASE FILE_DEVICE_CONTROLLER
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#define DD_PCMCIA_DEVICE_NAME "\\\\.\\Pcmcia"
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//
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// IoControlCode values for this device.
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//
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// Warning: Remember that the low two bits of the code specify how the
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// buffers are passed to the driver!
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//
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#define IOCTL_GET_TUPLE_DATA CTL_CODE(IOCTL_PCMCIA_BASE, 3000, METHOD_BUFFERED, FILE_ANY_ACCESS)
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#define IOCTL_SOCKET_INFORMATION CTL_CODE(IOCTL_PCMCIA_BASE, 3004, METHOD_BUFFERED, FILE_ANY_ACCESS)
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//
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// Tuple request parameters.
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//
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typedef struct _TUPLE_REQUEST {
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USHORT Socket;
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} TUPLE_REQUEST, *PTUPLE_REQUEST;
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#define MANUFACTURER_NAME_LENGTH 64
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#define DEVICE_IDENTIFIER_LENGTH 64
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#define DRIVER_NAME_LENGTH 32
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#define PcmciaInvalidControllerType 0xffffffff
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//
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// Controller classes returned in socket information structure.
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//
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typedef enum _PCMCIA_CONTROLLER_CLASS {
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PcmciaInvalidControllerClass = -1,
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PcmciaIntelCompatible,
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PcmciaCardBusCompatible,
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PcmciaElcController,
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PcmciaDatabook,
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PcmciaPciPcmciaBridge,
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PcmciaCirrusLogic,
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PcmciaTI,
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PcmciaTopic,
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PcmciaRicoh,
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PcmciaDatabookCB,
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PcmciaOpti,
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PcmciaTrid,
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PcmciaO2Micro,
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PcmciaNEC,
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PcmciaNEC_98
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} PCMCIA_CONTROLLER_CLASS, *PPCMCIA_CONTROLLER_CLASS;
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typedef struct _PCMCIA_SOCKET_INFORMATION {
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USHORT Socket;
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USHORT TupleCrc;
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UCHAR Manufacturer[MANUFACTURER_NAME_LENGTH];
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UCHAR Identifier[DEVICE_IDENTIFIER_LENGTH];
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UCHAR DriverName[DRIVER_NAME_LENGTH];
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UCHAR DeviceFunctionId;
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UCHAR Reserved;
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UCHAR CardInSocket;
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UCHAR CardEnabled;
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ULONG ControllerType;
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} PCMCIA_SOCKET_INFORMATION, *PPCMCIA_SOCKET_INFORMATION;
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//
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// macros to crack the ControllerId field of the socket info structure
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//
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#define PcmciaClassFromControllerType(type) ((PCMCIA_CONTROLLER_CLASS)((type) & 0xff))
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#define PcmciaModelFromControllerType(type) (((type) >> 8) & 0x3ffff)
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#define PcmciaRevisionFromControllerType(type) ((type) >> 26)
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// @@BEGIN_DDKSPLIT
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//
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// These are macros to manipulate the PcCardConfig type resource
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// descriptors - which are set by configmgr when passing in override
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// configurations.
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//
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//
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// Type of the descriptor: 1 .. 0xFFFF
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//
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#define DPTYPE_PCMCIA_CONFIGURATION 0x1
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#define DPTYPE_PCMCIA_MF_CONFIGURATION 0x2
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//
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// The device private structure for PC-Card configuration:
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//
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// Data[0] is configuration descriptior. Lay out below.
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// Byte 0: Configuration entry number (config index)
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// Byte 1: IO window flags
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// Byte 2: Type of configuration, hardcoded to DPTYPE_PCMCIA_CONFIGURATION
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// Byte 3: unused
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//
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// Data [1]: Cardbase offset for first memory window, flags in upper byte
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// Data [2]: Cardbase offset for second memory window, flags in upper byte
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//
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//
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// The device private structure for MF-Card configuration:
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//
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// Data[0] is configuration descriptior. Lay out below.
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// Byte 0: Configuration Option Register (config index)
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// Byte 1: Configuration and Status Register
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// Audio Enable (bit 3)
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// Byte 2: Type of configuration, hardcoded to DPTYPE_PCMCIA_MF_CONFIGURATION
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// Byte 3: Port Io resource descriptor index
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//
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// Data [1]: Configuration Register base
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// Data [2]: Unused
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//
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//
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// Macros for manipulating the IoResource device privates
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//
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#define PCMRES_SET_DESCRIPTOR_TYPE(IoResourceDesc, Type) (IoResourceDesc)->u.DevicePrivate.Data[0] |= ((Type) << sizeof(UCHAR)*8*2)
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#define PCMRES_GET_DESCRIPTOR_TYPE(IoResourceDesc) ((UCHAR) ((IoResourceDesc)->u.DevicePrivate.Data[0] >> sizeof(UCHAR)*8*2))
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//
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// Macros specific to DPTYPE_PCMCIA_CONFIGURATION
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//
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#define PCMRES_SET_CONFIG_INDEX(desc, ConfigIndex) (desc)->u.DevicePrivate.Data[0] |= ConfigIndex
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#define PCMRES_GET_CONFIG_INDEX(desc) ((UCHAR) ((desc)->u.DevicePrivate.Data[0]))
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//
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// Define maximum indeces for i/o and memory
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//
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#define PCMRES_PCMCIA_MAX_IO 2
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#define PCMRES_PCMCIA_MAX_MEM 2
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//
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// Flag definitions for Data[0]
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//
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#define PCMRESF_IO_16BIT_ACCESS 0x00000100
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#define PCMRESF_IO_ZERO_WAIT_8 0x00000200
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#define PCMRESF_IO_SOURCE_16 0x00000400
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#define PCMRESF_IO_WAIT_16 0x00000800
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#define PCMRESF_IO_FLAGS_2 0x0000F000 // used by second window
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#define PCMRESF_PCMCIA_TYPE_2 0x80000000 // new format indicator
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//
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// Flag definitions for Data[1], Data[2]
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//
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#define PCMRES_BASE64MB_MASK 0x03ffffff
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#define PCMRESF_MEM_16BIT_ACCESS 0x04000000
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#define PCMRESF_MEM_ATTRIBUTE 0x08000000
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#define PCMRESF_MEM_WAIT_1 0x10000000
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#define PCMRESF_MEM_WAIT_2 0x20000000
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#define PCMRESF_MEM_WAIT_3 0x30000000
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//
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// Macros specific to DPTYPE_PCMCIA_CONFIGURATION
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//
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#define PCMRES_SET_IO_FLAG(desc, index, flag) (desc)->u.DevicePrivate.Data[0] |= (flag << (index * 4))
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#define PCMRES_GET_IO_FLAG(desc, index, flag) (((desc)->u.DevicePrivate.Data[0] & (flag << (index * 4))) != 0)
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#define PCMRES_SET_MEMORY_FLAG(desc, index, flag) (desc)->u.DevicePrivate.Data[index+1] |= flag
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#define PCMRES_GET_MEMORY_FLAG(desc, index, flag) (((desc)->u.DevicePrivate.Data[index+1] & flag) != 0)
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#define PCMRES_SET_MEMORY_CARDBASE(desc, index, base) (desc)->u.DevicePrivate.Data[index+1] |= (base & PCMRES_BASE64MB_MASK)
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#define PCMRES_GET_MEMORY_CARDBASE(desc, index) ((ULONG) ((desc)->u.DevicePrivate.Data[index+1] & PCMRES_BASE64MB_MASK))
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#define PCMRES_SET_MEMORY_WAITSTATES PCMRES_SET_MEMORY_FLAG
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#define PCMRES_GET_MEMORY_WAITSTATES(desc, index) ((UCHAR) (((desc)->u.DevicePrivate.Data[index+1] >> 28)) & 3)
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//
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// Macros specific to DPTYPE_PCMCIA_MF_CONFIGURATION
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//
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#define PCMRESF_AUDIO_ENABLE 0x00000800
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#define PCMRES_MF_PORT_INDEX_SHIFT 24
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#define PCMRES_SET_CONFIG_OPTIONS(desc, opt) (desc)->u.DevicePrivate.Data[0] |= opt
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#define PCMRES_GET_CONFIG_OPTIONS(desc) ((UCHAR) ((desc)->u.DevicePrivate.Data[0]))
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#define PCMRES_SET_PORT_RESOURCE_INDEX(desc, Index) (desc)->u.DevicePrivate.Data[0] |= ((Index) << PCMRES_MF_PORT_INDEX_SHIFT)
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#define PCMRES_GET_PORT_RESOURCE_INDEX(desc) ((UCHAR) ((desc)->u.DevicePrivate.Data[0] >> PCMRES_MF_PORT_INDEX_SHIFT))
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#define PCMRES_SET_AUDIO_ENABLE(desc) (desc)->u.DevicePrivate.Data[0] |= PCMRESF_AUDIO_ENABLE
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#define PCMRES_GET_AUDIO_ENABLE(desc) ((UCHAR) ((desc)->u.DevicePrivate.Data[0] & PCMRESF_AUDIO_ENABLE) != 0)
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#define PCMRES_SET_CONFIG_REGISTER_BASE(desc, cfgbase) (desc)->u.DevicePrivate.Data[1] = cfgbase
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#define PCMRES_GET_CONFIG_REGISTER_BASE(desc) ((desc)->u.DevicePrivate.Data[1])
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//
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// The following macros are in the process of being obseleted
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//
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#define IORES_SET_DESCRIPTOR_TYPE PCMRES_SET_DESCRIPTOR_TYPE
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#define IORES_GET_DESCRIPTOR_TYPE PCMRES_GET_DESCRIPTOR_TYPE
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#define IORES_SET_CONFIG_INDEX PCMRES_SET_CONFIG_INDEX
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#define IORES_GET_CONFIG_INDEX PCMRES_GET_CONFIG_INDEX
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#define IORES_SET_IO_16BIT_ACCESS(desc) PCMRES_SET_IO_FLAG(desc, 0, PCMRESF_IO_16BIT_ACCESS)
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#define IORES_GET_IO_16BIT_ACCESS(desc) PCMRES_GET_IO_FLAG(desc, 0, PCMRESF_IO_16BIT_ACCESS)
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#define IORES_SET_IO_8BIT_ACCESS(desc)
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#define IORES_SET_IO_ZERO_WAIT_8(desc) PCMRES_SET_IO_FLAG(desc, 0, PCMRESF_IO_ZERO_WAIT_8)
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#define IORES_SET_IO_SOURCE_16(desc) PCMRES_SET_IO_FLAG(desc, 0, PCMRESF_IO_SOURCE_16)
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#define IORES_SET_IO_WAIT_16(desc) PCMRES_SET_IO_FLAG(desc, 0, PCMRESF_IO_WAIT_16)
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#define IORES_GET_IO_ZERO_WAIT_8(desc) PCMRES_GET_IO_FLAG(desc, 0, PCMRESF_IO_ZERO_WAIT_8)
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#define IORES_GET_IO_SOURCE_16(desc) PCMRES_GET_IO_FLAG(desc, 0, PCMRESF_IO_SOURCE_16)
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#define IORES_GET_IO_WAIT_16(desc) PCMRES_GET_IO_FLAG(desc, 0, PCMRESF_IO_WAIT_16)
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#define IORES_SET_MEM_16BIT_ACCESS(desc) PCMRES_SET_MEMORY_FLAG(desc, 0, PCMRESF_MEM_16BIT_ACCESS)
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#define IORES_GET_MEM_16BIT_ACCESS(desc) PCMRES_GET_MEMORY_FLAG(desc, 0, PCMRESF_MEM_16BIT_ACCESS)
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#define IORES_SET_MEM_8BIT_ACCESS(desc)
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#define IORES_SET_MEM_1_ATTRIBUTE_ACCESS(desc) PCMRES_SET_MEMORY_FLAG(desc, 0, PCMRESF_MEM_ATTRIBUTE)
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#define IORES_GET_MEM_1_ATTRIBUTE_ACCESS(desc) PCMRES_GET_MEMORY_FLAG(desc, 0, PCMRESF_MEM_ATTRIBUTE)
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#define IORES_SET_MEM_2_ATTRIBUTE_ACCESS(desc) PCMRES_SET_MEMORY_FLAG(desc, 1, PCMRESF_MEM_ATTRIBUTE)
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#define IORES_GET_MEM_2_ATTRIBUTE_ACCESS(desc) PCMRES_GET_MEMORY_FLAG(desc, 1, PCMRESF_MEM_ATTRIBUTE)
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#define IORES_SET_MEMORY_CARDBASE_1(desc, base) PCMRES_SET_MEMORY_CARDBASE(desc, 0, base)
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#define IORES_GET_MEMORY_CARDBASE_1(desc) PCMRES_GET_MEMORY_CARDBASE(desc, 0)
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#define IORES_SET_MEMORY_CARDBASE_2(desc, base) PCMRES_SET_MEMORY_CARDBASE(desc, 1, base)
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#define IORES_GET_MEMORY_CARDBASE_2(desc) PCMRES_GET_MEMORY_CARDBASE(desc, 1)
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#define IORES_SET_MEM_WAIT_ONE(desc) PCMRES_SET_MEMORY_WAITSTATES(desc, 0, PCMRESF_MEM_WAIT_1)
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#define IORES_SET_MEM_WAIT_TWO(desc) PCMRES_SET_MEMORY_WAITSTATES(desc, 0, PCMRESF_MEM_WAIT_2)
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#define IORES_SET_MEM_WAIT_THREE(desc) PCMRES_SET_MEMORY_WAITSTATES(desc, 0, PCMRESF_MEM_WAIT_3)
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#define IORES_GET_MEM_WAIT(desc) PCMRES_GET_MEMORY_WAITSTATES(desc, 0)
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#define IORES_SET_CONFIG_OPTIONS PCMRES_SET_CONFIG_OPTIONS
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#define IORES_GET_CONFIG_OPTIONS PCMRES_GET_CONFIG_OPTIONS
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#define IORES_SET_PORT_RESOURCE_INDEX PCMRES_SET_PORT_RESOURCE_INDEX
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#define IORES_GET_PORT_RESOURCE_INDEX PCMRES_GET_PORT_RESOURCE_INDEX
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#define IORES_SET_AUDIO_ENABLE PCMRES_SET_AUDIO_ENABLE
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#define IORES_GET_AUDIO_ENABLE PCMRES_GET_AUDIO_ENABLE
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#define IORES_SET_CONFIG_REGISTER_BASE PCMRES_SET_CONFIG_REGISTER_BASE
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#define IORES_GET_CONFIG_REGISTER_BASE PCMRES_GET_CONFIG_REGISTER_BASE
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#define CMRES_SET_DESCRIPTOR_TYPE IORES_SET_DESCRIPTOR_TYPE
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#define CMRES_GET_DESCRIPTOR_TYPE IORES_GET_DESCRIPTOR_TYPE
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#define CMRES_SET_CONFIG_INDEX IORES_SET_CONFIG_INDEX
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#define CMRES_GET_CONFIG_INDEX IORES_GET_CONFIG_INDEX
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#define CMRES_SET_IO_16BIT_ACCESS IORES_SET_IO_16BIT_ACCESS
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#define CMRES_GET_IO_16BIT_ACCESS IORES_GET_IO_16BIT_ACCESS
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#define CMRES_SET_IO_8BIT_ACCESS IORES_SET_IO_8BIT_ACCESS
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#define CMRES_SET_IO_ZERO_WAIT_8 IORES_SET_IO_ZERO_WAIT_8
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#define CMRES_SET_IO_SOURCE_16 IORES_SET_IO_SOURCE_16
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#define CMRES_SET_IO_WAIT_16 IORES_SET_IO_WAIT_16
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#define CMRES_GET_IO_ZERO_WAIT_8 IORES_GET_IO_ZERO_WAIT_8
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#define CMRES_GET_IO_SOURCE_16 IORES_GET_IO_SOURCE_16
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#define CMRES_GET_IO_WAIT_16 IORES_GET_IO_WAIT_16
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#define CMRES_SET_MEM_16BIT_ACCESS IORES_SET_MEM_16BIT_ACCESS
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#define CMRES_GET_MEM_16BIT_ACCESS IORES_GET_MEM_16BIT_ACCESS
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#define CMRES_SET_MEM_8BIT_ACCESS IORES_SET_MEM_8BIT_ACCESS
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#define CMRES_SET_MEM_WAIT_ONE IORES_SET_MEM_WAIT_ONE
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#define CMRES_SET_MEM_WAIT_TWO IORES_SET_MEM_WAIT_TWO
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#define CMRES_SET_MEM_WAIT_THREE IORES_SET_MEM_WAIT_THREE
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#define CMRES_GET_MEM_WAIT IORES_GET_MEM_WAIT
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#define CMRES_SET_MEM_1_ATTRIBUTE_ACCESS IORES_SET_MEM_1_ATTRIBUTE_ACCESS
|
||
|
|
#define CMRES_GET_MEM_1_ATTRIBUTE_ACCESS IORES_GET_MEM_1_ATTRIBUTE_ACCESS
|
||
|
|
#define CMRES_SET_MEM_2_ATTRIBUTE_ACCESS IORES_SET_MEM_2_ATTRIBUTE_ACCESS
|
||
|
|
#define CMRES_GET_MEM_2_ATTRIBUTE_ACCESS IORES_GET_MEM_2_ATTRIBUTE_ACCESS
|
||
|
|
|
||
|
|
#define CMRES_SET_MEMORY_CARDBASE_1 IORES_SET_MEMORY_CARDBASE_1
|
||
|
|
#define CMRES_GET_MEMORY_CARDBASE_1 IORES_GET_MEMORY_CARDBASE_1
|
||
|
|
#define CMRES_SET_MEMORY_CARDBASE_2 IORES_SET_MEMORY_CARDBASE_2
|
||
|
|
#define CMRES_GET_MEMORY_CARDBASE_2 IORES_GET_MEMORY_CARDBASE_2
|
||
|
|
|
||
|
|
#define CMRES_SET_CONFIG_OPTIONS IORES_SET_CONFIG_OPTIONS
|
||
|
|
#define CMRES_GET_CONFIG_OPTIONS IORES_GET_CONFIG_OPTIONS
|
||
|
|
#define CMRES_SET_PORT_RESOURCE_INDEX IORES_SET_PORT_RESOURCE_INDEX
|
||
|
|
#define CMRES_GET_PORT_RESOURCE_INDEX IORES_GET_PORT_RESOURCE_INDEX
|
||
|
|
#define CMRES_SET_AUDIO_ENABLE IORES_SET_AUDIO_ENABLE
|
||
|
|
#define CMRES_GET_AUDIO_ENABLE IORES_GET_AUDIO_ENABLE
|
||
|
|
#define CMRES_SET_CONFIG_REGISTER_BASE IORES_SET_CONFIG_REGISTER_BASE
|
||
|
|
#define CMRES_GET_CONFIG_REGISTER_BASE IORES_GET_CONFIG_REGISTER_BASE
|
||
|
|
|
||
|
|
//
|
||
|
|
// Begin pcmcia exported interfaces to other drivers
|
||
|
|
//
|
||
|
|
// @@END_DDKSPLIT
|
||
|
|
|
||
|
|
#ifdef _NTDDK_
|
||
|
|
|
||
|
|
DEFINE_GUID( GUID_PCMCIA_INTERFACE_STANDARD, 0xbed5dadfL, 0x38fb, 0x11d1, 0x94, 0x62, 0x00, 0xc0, 0x4f, 0xb9, 0x60, 0xee);
|
||
|
|
|
||
|
|
#define PCMCIA_MEMORY_8BIT_ACCESS 0
|
||
|
|
#define PCMCIA_MEMORY_16BIT_ACCESS 1
|
||
|
|
|
||
|
|
typedef
|
||
|
|
BOOLEAN
|
||
|
|
(*PPCMCIA_MODIFY_MEMORY_WINDOW)(
|
||
|
|
IN PVOID Context,
|
||
|
|
IN ULONGLONG HostBase,
|
||
|
|
IN ULONGLONG CardBase,
|
||
|
|
IN BOOLEAN Enable,
|
||
|
|
IN ULONG WindowSize OPTIONAL,
|
||
|
|
IN UCHAR AccessSpeed OPTIONAL,
|
||
|
|
IN UCHAR BusWidth OPTIONAL,
|
||
|
|
IN BOOLEAN IsAttributeMemory OPTIONAL
|
||
|
|
);
|
||
|
|
|
||
|
|
#define PCMCIA_VPP_0V 0
|
||
|
|
#define PCMCIA_VPP_12V 1
|
||
|
|
#define PCMCIA_VPP_IS_VCC 2
|
||
|
|
|
||
|
|
typedef
|
||
|
|
BOOLEAN
|
||
|
|
(*PPCMCIA_SET_VPP)(
|
||
|
|
IN PVOID Context,
|
||
|
|
IN UCHAR VppLevel
|
||
|
|
);
|
||
|
|
|
||
|
|
typedef
|
||
|
|
BOOLEAN
|
||
|
|
(*PPCMCIA_IS_WRITE_PROTECTED)(
|
||
|
|
IN PVOID Context
|
||
|
|
);
|
||
|
|
|
||
|
|
//
|
||
|
|
// These are interfaces for manipulating memory windows, setting Vpp etc.,
|
||
|
|
// primarily used by flash memory card drivers
|
||
|
|
//
|
||
|
|
typedef struct _PCMCIA_INTERFACE_STANDARD {
|
||
|
|
USHORT Size;
|
||
|
|
USHORT Version;
|
||
|
|
PINTERFACE_REFERENCE InterfaceReference;
|
||
|
|
PINTERFACE_DEREFERENCE InterfaceDereference;
|
||
|
|
PVOID Context;
|
||
|
|
PPCMCIA_MODIFY_MEMORY_WINDOW ModifyMemoryWindow;
|
||
|
|
PPCMCIA_SET_VPP SetVpp;
|
||
|
|
PPCMCIA_IS_WRITE_PROTECTED IsWriteProtected;
|
||
|
|
} PCMCIA_INTERFACE_STANDARD, *PPCMCIA_INTERFACE_STANDARD;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Definitions for PCMCIA_BUS_INTERFACE_STANDARD.
|
||
|
|
// This interface is obtained using GUID_PCMCIA_BUS_INTERFACE_STANDARD
|
||
|
|
// and is used for reading/writing to PCMCIA config. space
|
||
|
|
//
|
||
|
|
|
||
|
|
typedef
|
||
|
|
ULONG
|
||
|
|
(*PPCMCIA_READ_WRITE_CONFIG) (
|
||
|
|
IN PVOID Context,
|
||
|
|
IN ULONG WhichSpace,
|
||
|
|
IN PUCHAR Buffer,
|
||
|
|
IN ULONG Offset,
|
||
|
|
IN ULONG Length
|
||
|
|
);
|
||
|
|
//
|
||
|
|
// WhichSpace for IRP_MN_READ_CONFIG/WRITE_CONFIG
|
||
|
|
// and PCMCIA_BUS_INTERFACE_STANDARD
|
||
|
|
//
|
||
|
|
typedef ULONG MEMORY_SPACE;
|
||
|
|
|
||
|
|
#define PCCARD_PCI_CONFIGURATION_SPACE 0 // for cardbus cards
|
||
|
|
#define PCCARD_ATTRIBUTE_MEMORY 1
|
||
|
|
#define PCCARD_COMMON_MEMORY 2
|
||
|
|
#define PCCARD_ATTRIBUTE_MEMORY_INDIRECT 3
|
||
|
|
#define PCCARD_COMMON_MEMORY_INDIRECT 4
|
||
|
|
|
||
|
|
// Legacy support
|
||
|
|
//
|
||
|
|
#define PCMCIA_CONFIG_SPACE PCCARD_ATTRIBUTE_MEMORY
|
||
|
|
|
||
|
|
typedef struct _PCMCIA_BUS_INTERFACE_STANDARD {
|
||
|
|
//
|
||
|
|
// generic interface header
|
||
|
|
//
|
||
|
|
USHORT Size;
|
||
|
|
USHORT Version;
|
||
|
|
PVOID Context;
|
||
|
|
PINTERFACE_REFERENCE InterfaceReference;
|
||
|
|
PINTERFACE_DEREFERENCE InterfaceDereference;
|
||
|
|
//
|
||
|
|
// standard PCMCIA bus interfaces
|
||
|
|
//
|
||
|
|
PPCMCIA_READ_WRITE_CONFIG ReadConfig;
|
||
|
|
PPCMCIA_READ_WRITE_CONFIG WriteConfig;
|
||
|
|
} PCMCIA_BUS_INTERFACE_STANDARD, *PPCMCIA_BUS_INTERFACE_STANDARD;
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
#endif
|