138 lines
4.3 KiB
C
138 lines
4.3 KiB
C
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/*++
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Copyright (c) 1995 Microsoft Corporation
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Module Name:
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dbsocket.h
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Abstract:
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Definitions and structures for Databook TCIC support.
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Author(s):
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John Keys - Databook Inc. 7-Apr-1995
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Revisions:
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--*/
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#ifndef _dbsocket_h_ // prevent multiple includes
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#define _dbsocket_h_
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#include "pcmcia.h"
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typedef struct _DBSOCKET {
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SOCKET skt; /* PCMCIA.H SOCKET structure */
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UCHAR busyLed; /* Busy LED state */
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USHORT timerStarted; /* indicate if the BusyLED timer up */
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ULONG physPortAddr; /* unmapped port address */
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USHORT chipType; /* TCIC silicon ID */
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USHORT dflt_vcc5v; /* default 5V Vcc bits */
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USHORT dflt_wctl; /* default AR_WCTL bits */
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USHORT dflt_syscfg; /* default AR_SYSCFG bits */
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USHORT dflt_ilock; /* default AR_ILOCK bits */
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USHORT dflt_wrmctl; /* default IR_WRMCTL bits */
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USHORT dflt_scfg1; /* default IR_SCFG1 bits */
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USHORT clkdiv; /* clock rate divisor (SHFT CNT.) */
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UCHAR IRQMapTbl[16]; /* IRQ map */
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UCHAR niowins; /* number of io windows */
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UCHAR nmemwins; /* number of mem windows */
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}DBSOCKET, *PDBSOCKET;
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/* Codes for various useful bits of information:
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*/
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#define TCIC_IS270 0x01 /* New TCIC at base+0x400 */
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#define TCIC_ALIAS800 0x02 /* Aliased at base+0x800 */
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#define TCIC_IS140 0x04 /* Aliased at base+0x10 */
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#define TCIC_ALIAS400 0x08 /* Aliased at base+0x400 */
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#define TCIC_ALIAS 1
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#define TCIC_NOALIAS 2
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#define TCIC_NONE 0
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/* For tagging wonky-looking IRQ lines:
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*/
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#define TCIC_BADIRQ 0x80
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#define ICODEMASK 0x7f
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/* Memory offsets used in looking for TCICs at fixed distances from a base
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* address:
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*/
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#define TCIC_OFFSET_400 0x400
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#define TCIC_OFFSET_800 0x800
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#define TCIC_ALIAS_OFFSET 0x010
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/*
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* Constants for power tables
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*/
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#define SPWR_VCC_SUPPLY 0x8000
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#define SPWR_VPP_SUPPLY 0x6000
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#define SPWR_ALL_SUPPLY (SPWR_VCC_SUPPLY | SPWR_VPP_SUPPLY)
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#define SPWR_0p0V 0
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#define SPWR_5p0V 50
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#define SPWR_12p0V 120
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#define PWRTBL_WORDS 9
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#define PWRTBL_SIZE (PWRTBL_WORDS * sizeof(unsigned short))
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/*
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* Fixed point integer type and handler macros
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*/
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typedef unsigned long FIXEDPT;
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#define FIXEDPT_FRACBITS 8
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#define INT2FXP(n) (((FIXEDPT)(n)) << FIXEDPT_FRACBITS)
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#define ISx84(x) (((x) == SILID_DB86084_1) || ((x) == SILID_DB86084A) || ((x) == SILID_DB86184_1))
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#define ISPNP(x) (((x) == SILID_DB86084_1) || ((x) == SILID_DB86084A) || ((x) == SILID_DB86184_1))
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/*
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*Chip Properties - matches capabilites to a Chip ID
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*/
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typedef struct ChipProps_t {
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USHORT chip_id; /* The Silicon ID for this chip */
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PUSHORT privpwrtbl; /* the power table that applies */
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UCHAR reserved_1; /* Alignment byte */
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PUCHAR irqcaps; /* table of possible IRQs */
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USHORT maxsockets; /* max # of skts for this chip */
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USHORT niowins; /* # I/O wins supported */
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USHORT nmemwins; /* # mem wins supported */
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USHORT fprops; /* Various properties flags */
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# define fIS_PNP 1 /* chip is Plug-n-Play */
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# define fEXTBUF_CHK 2 /* chip may need ext buffering check*/
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# define fSKTIRQPIN 4 /* chip has socket IRQ pin */
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# define fINVALID 8 /* Can't get good flags */
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}CHIPPROPS;
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/* MODE_AR_SYSCFG must have, with j = ***read*** (***, R_AUX)
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and k = (j>>9)&7:
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if (k&4) k == 5
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And also:
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j&0x0f is none of 2, 8, 9, b, c, d, f
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if (j&8) must have (j&3 == 2)
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Can't have j==2
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*/
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#define INVALID_AR_SYSCFG(x) ((((x)&0x1000) && (((x)&0x0c00) != 0x0200)) \
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|| (((((x)&0x08) == 0) || (((x)&0x03) == 2)) \
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&& ((x) != 0x02)))
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/* AR_ILOCK must have bits 6 and 7 the same:
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*/
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#define INVALID_AR_ILOCK(x) ((((x)&0xc0) != 0) && (((x)&0xc0) != 0xc0))
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/* AR_TEST has some reserved bits:
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*/
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#define INVALID_AR_TEST(x) (((x)&0154) != 0)
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/* Wait state codes */
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#define WCTL_300NS 8
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/**** end of dbsocket.H ****/
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#endif /* _dbsocket_H_ */
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