134 lines
3.3 KiB
C
134 lines
3.3 KiB
C
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/*++
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Copyright (c) 1994 Microsoft Corporation
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Module Name:
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ricoh.c
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Abstract:
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This module contains the code that contains
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Ricoh cardbus controller specific initialization and
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other dispatches
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Author:
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Ravisankar Pudipeddi (ravisp) 1-Nov-97
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Environment:
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Kernel mode
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Revision History :
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--*/
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#include "pch.h"
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VOID
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RicohInitialize(IN PFDO_EXTENSION FdoExtension)
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/*++
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Routine Description:
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Initialize Ricoh cardbus controllers
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Arguments:
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FdoExtension - Pointer to the device extension for the controller FDO
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Return Value:
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None
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--*/
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{
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USHORT word;
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UCHAR revisionID;
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//LATER: Remove this IF statement, it was added for paranoia once the other
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// Ricoh controllers were added at the last minute.
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if (FdoExtension->ControllerType == PcmciaRL5C466) {
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GetPciConfigSpace(FdoExtension, CFGSPACE_RICOH_IF16_CTRL, &word, 2);
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word |= IF16_LEGACY_LEVEL_1 | IF16_LEGACY_LEVEL_2;
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SetPciConfigSpace(FdoExtension, CFGSPACE_RICOH_IF16_CTRL, &word, 2);
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}
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#ifdef HACK_RICOH
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PcicWriteSocket(FdoExtension->SocketList, PCIC_CARD_INT_CONFIG, 0x08);
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#endif
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GetPciConfigSpace(FdoExtension, CFGSPACE_REV_ID, &revisionID, 1);
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if (((FdoExtension->ControllerType == PcmciaRL5C475) && (revisionID >= 0x80) && (revisionID <= 0x9f)) ||
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((FdoExtension->ControllerType == PcmciaRL5C476) && (revisionID >= 0x80)) ) {
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//
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// Hack to make sure NICs work ok (information is from Intel)
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// (revision of original hack is from Ricoh)
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//
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// What this does:
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// The power save feature of the Ricoh controllers enables the switching off of
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// portions of the clock domain during certain times when, during design, it
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// appeared that this reduce power consumption of the overall device. However,
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// when this feature is enabled, timing between the PCI Request, Grant, and Frame
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// control signals is made more stringent such that the controller becomes
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// incompatible with some devices that fully support the PCI specification.
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// The additional current consumed by the controller when the power save feature
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// is disabled is small, on the order of a few milliamps.
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//
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ULONG dword;
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ULONG org_value;
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GetPciConfigSpace(FdoExtension, 0x8C, &org_value, 4);
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org_value &= 0xFF0000FF;
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dword = 0xAA5500;
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SetPciConfigSpace(FdoExtension, 0x8C, &dword, 4);
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dword = org_value | 0x30AA5500;
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SetPciConfigSpace(FdoExtension, 0x8C, &dword, 4);
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dword = org_value | 0x30000000;
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SetPciConfigSpace(FdoExtension, 0x8C, &dword, 4);
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}
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//
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// initialize IRQ routing to ISA
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//
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GetPciConfigSpace(FdoExtension, CFGSPACE_BRIDGE_CTRL, &word, 2);
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word |= BCTRL_IRQROUTING_ENABLE;
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SetPciConfigSpace(FdoExtension, CFGSPACE_BRIDGE_CTRL, &word, 2);
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}
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BOOLEAN
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RicohSetZV(
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IN PSOCKET Socket,
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IN BOOLEAN Enable
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)
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{
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UCHAR bData;
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if (Enable) {
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bData = PcicReadSocket(Socket, PCIC_RICOH_MISC_CTRL1);
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bData |= RICOH_MC1_ZV_ENABLE;
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PcicWriteSocket(Socket, PCIC_RICOH_MISC_CTRL1, bData);
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} else {
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bData = PcicReadSocket(Socket, PCIC_RICOH_MISC_CTRL1);
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bData &= ~RICOH_MC1_ZV_ENABLE;
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PcicWriteSocket(Socket, PCIC_RICOH_MISC_CTRL1, bData);
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}
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return TRUE;
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}
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