335 lines
8.3 KiB
ArmAsm
335 lines
8.3 KiB
ArmAsm
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//##########################################################################
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//**
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//** Copyright (C) 1996-2000 Intel Corporation. All rights reserved.
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//**
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//** The information and source code contained herein is the exclusive
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//** property of Intel Corporation and may not be disclosed, examined
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//** or reproduced in whole or in part without explicit written authorization
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//** from the company.
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//**
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//###########################################################################
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.file "rerun.s"
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.section .text
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.align 32
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.proc _xrun1args#
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.global _xrun1args#
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.align 32
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_xrun1args:
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alloc r31=ar.pfs,4,4,0,0 // r32, r33, r34, r35, r36, r37, r38, r39
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// OpCode is in r32
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// &fpsr is in r33
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// &fr1 (output) is in r34
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// &fr2 (input) is in r35
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// save old FPSR in r36
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mov.m r36 = ar40
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// save predicates in r38
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mov r38 = pr;;
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// load fpsr in r37
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ld8 r37 = [r33];;
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// set new value of FPSR
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mov ar40 = r37;;
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// clear predicates
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movl r39 = 0x0000000000000001;;
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// load clear predicates from r39
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mov pr = r39,0x1ffff;;
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// load input argument into f8
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ldf.fill f8 = [r35];;
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cmp4.eq p1, p2 = 1, r32;; // fprsqrta [not used]
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(p2) cmp4.eq.unc p2, p3 = 2, r32;; // fpcvt_fx
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(p3) cmp4.eq.unc p3, p4 = 3, r32;; // fpcvt_fxu
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(p4) cmp4.eq.unc p4, p5 = 4, r32;; // fpcvt_fx_trunc
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(p5) cmp4.eq.unc p5, p6 = 5, r32;; // fpcvt_fxu_trunc
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(p1) fprsqrta.s0 f9,p7 = f8;; // 1/sqrt(f8) in f9
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(p2) fpcvt.fx.s0 f9 = f8;;
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(p3) fpcvt.fxu.s0 f9 = f8;;
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(p4) fpcvt.fx.trunc.s0 f9 = f8;;
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(p5) fpcvt.fxu.trunc.s0 f9 = f8;;
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(p6) mov f9 = f0 // return 0
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// restore predicates from r38
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mov pr = r38,0x1ffff;;
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// store result
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stf.spill [r34] = f9;;
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// save FPSR
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mov.m r37 = ar40;;
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st8 [r33] = r37
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// restore FPSR
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mov ar40 = r36;;
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// return
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br.ret.sptk b0
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.endp _xrun1args
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.proc _xrun2args#
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.global _xrun2args#
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.align 32
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_xrun2args:
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alloc r31=ar.pfs,5,4,0,0 // r32, r33, r34, r35, r36, r37, r38, r39, r40
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// OpCode is in r32
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// &fpsr is in r33
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// &fr1 (output) is in r34
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// &fr2 (input) is in r35
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// &fr3 (input) is in r36
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// save old FPSR in r37
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mov r37 = ar40
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// save predicates in r39
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mov r39 = pr;;
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// load fpsr in r38
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ld8 r38 = [r33];;
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// set new value of FPSR
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mov ar40 = r38;;
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// clear predicates
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movl r40 = 0x0000000000000001;;
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// load clear predicates from r40
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mov pr = r40,0x1ffff;;
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// load first input argument into f8
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ldf.fill f8 = [r35]
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// load second input argument into f9
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ldf.fill f9 = [r36];;
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cmp4.eq p1, p2 = 1, r32;; // fprcpa [not used - fprcpa not re-executed]
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(p2) cmp4.eq.unc p2, p3 = 2, r32;; // fpcmp_eq
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(p3) cmp4.eq.unc p3, p4 = 3, r32;; // fpcmp_lt
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(p4) cmp4.eq.unc p4, p5 = 4, r32;; // fpcmp_le
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(p5) cmp4.eq.unc p5, p6 = 5, r32;; // fpcmp_unord
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(p6) cmp4.eq.unc p6, p7 = 6, r32;; // fpcmp_neq
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(p7) cmp4.eq.unc p7, p8 = 7, r32;; // fpcmp_nlt
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(p8) cmp4.eq.unc p8, p9 = 8, r32;; // fpcmp_nle
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(p9) cmp4.eq.unc p9, p10 = 9, r32;; // fpcmp_ord
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(p10) cmp4.eq.unc p10, p11 = 10, r32;; // fpmin
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(p11) cmp4.eq.unc p11, p12 = 11, r32;; // fpmax
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(p12) cmp4.eq.unc p12, p13 = 12, r32;; // fpamin
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(p13) cmp4.eq.unc p13, p14 = 13, r32;; // fpamax
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(p1) fprcpa.s0 f10 , p15 = f8, f9;; // 1 / f3 in f4
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(p2) fpcmp.eq.s0 f10 = f8, f9;;
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(p3) fpcmp.lt.s0 f10 = f8, f9;;
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(p4) fpcmp.le.s0 f10 = f8, f9;;
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(p5) fpcmp.unord.s0 f10 = f8, f9;;
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(p6) fpcmp.neq.s0 f10 = f8, f9;;
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(p7) fpcmp.nlt.s0 f10 = f8, f9;;
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(p8) fpcmp.nle.s0 f10 = f8, f9;;
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(p9) fpcmp.ord.s0 f10 = f8, f9;;
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(p10) fpmin.s0 f10 = f8, f9;;
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(p11) fpmax.s0 f10 = f8, f9;;
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(p12) fpamin.s0 f10 = f8, f9;;
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(p13) fpamax.s0 f10 = f8, f9;;
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(p14) mov f10 = f0 // return 0
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// restore predicates from r39
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mov pr = r39,0x1ffff;;
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// store result
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stf.spill [r34] = f10
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// save FPSR
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mov.m r38 = ar40;;
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st8 [r33] = r38
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// restore FPSR
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mov ar40 = r37;;
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// return
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br.ret.sptk b0
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.endp _xrun2args
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.proc _xrun3args#
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.global _xrun3args#
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.align 32
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_xrun3args:
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alloc r31=ar.pfs,6,4,0,0 // r32, r33, r34, r35, r36, r37, r38, r39, r40, r41
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// OpCode is in r32
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// &fpsr is in r33
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// &fr1 (output) is in r34
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// &fr2 (input) is in r35
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// &fr3 (input) is in r36
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// &fr4 (input) is in r37
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// save old FPSR in r38
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mov r38 = ar40
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// save predicates in r40
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mov r40 = pr;;
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// load fpsr in r39
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ld8 r39 = [r33];;
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// set new value of FPSR
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mov ar40 = r39;;
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// clear predicates
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movl r41 = 0x0000000000000001;;
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// load clear predicates from r41
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mov pr = r41,0x1ffff;;
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// load first input argument into f8
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ldf.fill f8 = [r35]
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// load second input argument into f9
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ldf.fill f9 = [r36];;
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// load third input argument into f10
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ldf.fill f10 = [r37];;
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cmp4.eq p1, p2 = 1, r32;; // fpma
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(p2) cmp4.eq.unc p2, p3 = 2, r32;; // fpms
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(p3) cmp4.eq.unc p3, p4 = 3, r32;; // fpnma
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(p1) fpma.s0 f11 = f8, f9, f10;; // f11 = f8 * f9 + f10
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(p2) fpms.s0 f11 = f8, f9, f10;; // f11 = f8 * f9 - f10
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(p3) fpnma.s0 f11 = f8, f9, f10;; // f11 = -f8 * f9 + f10
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(p4) mov f11 = f0 // return 0
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// restore predicates from r40
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mov pr = r40,0x1ffff;;
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// store result
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stf.spill [r34] = f11
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// save FPSR
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mov.m r39 = ar40;;
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st8 [r33] = r39
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// restore FPSR
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mov ar40 = r38
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// return
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br.ret.sptk b0
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.endp _xrun3args
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.proc _thmB#
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.global _thmB#
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.align 32
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_thmB:
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alloc r31=ar.pfs,4,2,0,0 // r32, r33, r34, r35, r36, r37
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// &a is in r32
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// &b is in r33
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// &div is in r34 (the address of the divide result)
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// &fpsr is in r35
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// general registers used: r31, r32, r33, r34, r35, r36, r37
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// predicate registers used: p6
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// floating-point registers used: f6, f7, f8
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// save old FPSR in r36
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mov r36 = ar40
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// load fpsr in r37
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ld8 r37 = [r35];;
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// set new value of FPSR
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mov ar40 = r37
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// load a, the first argument, in f6
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ldfs f6 = [r32];;
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// load b, the second argument, in f7
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ldfs f7 = [r33];;
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// Step (1)
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// y0 = 1 / b in f8
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frcpa.s0 f8,p6=f6,f7;;
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// Step (2)
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// q0 = a * y0 in f6
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(p6) fma.s1 f6=f6,f8,f0
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// Step (3)
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// e0 = 1 - b * y0 in f7
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(p6) fnma.s1 f7=f7,f8,f1;;
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// Step (4)
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// q1 = q0 + e0 * q0 in f6
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(p6) fma.s1 f6=f7,f6,f6
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// Step (5)
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// e1 = e0 * e0 in f7
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(p6) fma.s1 f7=f7,f7,f0;;
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// Step (6)
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// q2 = q1 + e1 * q1 in f6
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(p6) fma.s1 f6=f7,f6,f6
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// Step (7)
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// e2 = e1 * e1 in f7
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(p6) fma.s1 f7=f7,f7,f0;;
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// Step (8)
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// q3 = q2 + e2 * q2 in f6
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(p6) fma.d.s1 f6=f7,f6,f6;;
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// Step (9)
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// q3' = q3 in f8
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(p6) fma.s.s0 f8=f6,f1,f0;;
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// store result
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stfs [r34]=f8
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// save fpsr
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mov.m r37 = ar40;;
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st8 [r35] = r37
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// restore FPSR
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mov ar40 = r36;;
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// return
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br.ret.sptk b0
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.endp _thmB
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.proc _thmH#
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.global _thmH#
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.align 32
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_thmH:
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alloc r31=ar.pfs,3,2,0,0 // r32, r33, r34, r35, r36
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// &a is in r32
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// &sqrt is in r33 (the address of the sqrt result)
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// &fpsr in r34
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// general registers used: r31, r32, r33, r34, r35
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// predicate registers used: p6
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// floating-point registers used: f6, f7, f8, f9, f10, f11, f12
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// save old FPSR in r35
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mov r35 = ar40
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// load fpsr in r36
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ld8 r36 = [r34];;
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// set new value of FPSR
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mov ar40 = r36
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// exponent of +1/2 in r2
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movl r2 = 0x0fffe;;
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// +1/2 in f7
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setf.exp f7 = r2
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// load the argument a in f6
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ldfs f6 = [r32];;
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// Step (1)
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// y0 = 1/sqrt(a) in f8
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frsqrta.s0 f8,p6=f6;;
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// Step (2)
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// h = +1/2 * a in f9
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(p6) fma.s1 f9=f7,f6,f0
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// Step (3)
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// t1 = y0 * y0 in f10
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(p6) fma.s1 f10=f8,f8,f0;;
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// Step (4)
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// t2 = 1/2 - t1 * h in f10
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(p6) fnma.s1 f10=f10,f9,f7;;
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// Step (5)
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// y1 = y0 + t2 * y0 in f8
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(p6) fma.s1 f8=f10,f8,f8;;
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// Step (6)
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// S = a * y1 in f10
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(p6) fma.s1 f10=f6,f8,f0
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// Step (7)
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// t3 = y1 * h in f9
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(p6) fma.s1 f9=f8,f9,f0
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// Step (8)
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// H = 1/2 * y1 in f11
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(p6) fma.s1 f11=f7,f8,f0;;
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// Step (9)
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// d = a - S * S in f12
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(p6) fnma.s1 f12=f10,f10,f6
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// Step (10)
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// t4 = 1/2 - t3 * y1 in f7
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(p6) fnma.s1 f7=f9,f8,f7;;
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// Step (11)
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// S1 = S + d * H in f8
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(p6) fma.s.s1 f8=f12,f11,f10
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// Step (12)
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// H1 = H + t4 * H in f7
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(p6) fma.s1 f7=f7,f11,f11;;
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// Step (13)
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// d1 = a - S1 * S1 in f6
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(p6) fnma.s1 f6=f8,f8,f6;;
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// Step (14)
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// R = S1 + d1 * H1 in f8
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(p6) fma.s.s0 f8=f6,f7,f8;;
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// store result
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stfs [r33]=f8
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// save fpsr
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mov.m r36 = ar40;;
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|
|
st8 [r34] = r36
|
||
|
|
// restore FPSR
|
||
|
|
mov ar40 = r35;;
|
||
|
|
// return
|
||
|
|
br.ret.sptk b0
|
||
|
|
|
||
|
|
.endp _thmH
|