434 lines
6.8 KiB
NASM
434 lines
6.8 KiB
NASM
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TITLE "AMD64 Support Routines"
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;++
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;
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; Copyright (c) 2000 Microsoft Corporation
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;
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; Module Name:
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;
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; miscs.asm
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;
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; Abstract:
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;
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; This module implements various routines for the AMD64 that must be
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; written in assembler.
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;
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; Author:
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;
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; Forrest Foltz (forrestf) 14-Oct-2000
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;
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; Environment:
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;
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; Kernel mode only.
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;
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;--
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include kxamd64.inc
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include ksamd64.inc
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extern HalpMcaExceptionHandler:proc
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;++
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;
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; ULONG
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; HalpGetprocessorFlags(
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; VOID
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; )
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;
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; Routine Description:
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;
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; This function retrieves and returns the contents of the processor's
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; flag register.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; The contents of the processor's flag register.
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;
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;--
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HdiFrame struct
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FlagsLow dd ? ; processor flags, low
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FlagsHi dd ? ; processor flags, high
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HdiFrame ends
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NESTED_ENTRY HalpGetProcessorFlags, _TEXT$00
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push_eflags ; get processor flags
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END_PROLOGUE
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pop rax
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ret
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NESTED_END HalpGetProcessorFlags, _TEXT$00
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;++
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;
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; VOID
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; HalProcessorIdle(
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; VOID
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; )
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;
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; Routine Description:
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;
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; This function is called when the current processor is idle.
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;
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; This function is called with interrupts disabled, and the processor
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; is idle until it receives an interrupt. The does not need to return
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; until an interrupt is received by the current processor.
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;
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; This is the lowest level of processor idle. It occurs frequently,
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; and this function (alone) should not put the processor into a
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; power savings mode which requeres large amount of time to enter & exit.
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;
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; Return Value:
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;
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;--
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LEAF_ENTRY HalProcessorIdle, _TEXT$00
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;
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; the following code sequence "sti-halt" puts the processor
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; into a Halted state, with interrupts enabled, without processing
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; an interrupt before halting. The STI instruction has a delay
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; slot such that it does not take effect until after the instruction
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; following it - this has the effect of HALTing without allowing
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; a possible interrupt and then enabling interrupts while HALTed.
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;
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;
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; On an MP hal we don't stop the processor, since that causes
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; the SNOOP to slow down as well
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;
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sti
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ifdef NT_UP
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hlt
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endif
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;
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; Now return to the system. If there's still no work, then it
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; will call us back to halt again.
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;
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ret
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LEAF_END HalProcessorIdle, _TEXT$00
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;++
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;
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; VOID
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; HalpGenerateAPCInterrupt(
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; VOID
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; )
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;
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; Routine Description:
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;
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; This function generates an APC software interrupt.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; None.
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;
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;--
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LEAF_ENTRY HalpGenerateAPCInterrupt, _TEXT$00
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int 1
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ret
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LEAF_END HalpGenerateAPCInterrupt, _TEXT$00
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;++
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;
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; VOID
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; HalpGenerateDPCInterrupt(
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; VOID
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; )
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;
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; Routine Description:
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;
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; This function generates an DPC software interrupt.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; None.
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;
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;--
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LEAF_ENTRY HalpGenerateDPCInterrupt, _TEXT$00
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int 2
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ret
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LEAF_END HalpGenerateDPCInterrupt, _TEXT$00
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;++
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;
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; VOID
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; HalpGenerateUnexpectedInterrupt(
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; VOID
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; )
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;
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; Routine Description:
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;
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; This function generates an unexpected software interrupt.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; None.
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;
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;--
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LEAF_ENTRY HalpGenerateUnexpectedInterrupt, _TEXT$00
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int 0
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ret
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LEAF_END HalpGenerateUnexpectedInterrupt, _TEXT$00
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;++
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;
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; VOID
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; HalpHalt (
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; VOID
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; );
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;
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; Routine Description:
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;
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; Executes a hlt instruction. Should the hlt instruction execute,
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; control is returned to the caller.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; None.
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;
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;--*/
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LEAF_ENTRY HalpHalt, _TEXT$0
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hlt
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ret
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LEAF_END HalpHalt, _TEXT$0
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;++
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;
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; VOID
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; HalpIoDelay (
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; VOID
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; );
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;
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; Routine Description:
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;
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; Generate a delay after port I/O.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; None.
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;
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;--
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LEAF_ENTRY HalpIoDelay, _TEXT$00
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jmp $+2
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jmp $+2
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ret
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LEAF_END HalpIoDelay, _TEXT$00
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;++
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;
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; VOID
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; HalpSerialize (
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; VOID
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; )
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;
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; Routine Description:
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;
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; This function implements the fence operation for out-of-order execution
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;
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; Arguments:
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;
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; None
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;
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; Return Value:
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;
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; None
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;
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;--
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HsFrame struct
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SavedRbx dq ? ; preserve RBX
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HsFrame ends
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NESTED_ENTRY HalpSerialize, _TEXT$00
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push_reg rbx
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END_PROLOGUE
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cpuid
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pop rbx
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ret
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NESTED_END HalpSerialize, _TEXT$00
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;++
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;
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; StartPx_LMStub
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;
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; This routine is entered during startup of a secondary processor. We
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; have just left StartPx_PMStub (xmstub.asm) and are running on an
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; identity-mapped address space.
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;
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; Arguments:
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;
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; rdi -> idenity-mapped address of PROCESSOR_START_BLOCK
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;
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; Return Value:
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;
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; None
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;
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;--
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LEAF_ENTRY HalpLMStub, _TEXT$00
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;
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; Get the final CR3 value, set rdi to the self-map address of
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; the processor start block, and set CR3. We are now executing
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; in image-loaded code, rather than code that has been copied to
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; low memory.
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;
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mov rax, [rdi] + PsbProcessorState + PsCr3
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mov rdi, [rdi] + PsbSelfMap
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mov cr3, rax
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lea rsi, [rdi] + PsbProcessorState
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ltr WORD PTR [rsi] + SrTr
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;
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; Load this processor's GDT and IDT. Because PSB_GDDT32_CODE64 is
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; identical to KGDT64_R0_CODE (asserted in mpsproca.c), no far jump
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; is necessary to load a new CS.
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;
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lgdt fword ptr [rsi] + PsSpecialRegisters + SrGdtr
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lidt fword ptr [rsi] + PsSpecialRegisters + SrIdtr
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;
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; Set rdx to point to the context frame and load the segment
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; registers.
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;
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lea rdx, [rdi] + PsbProcessorState + PsContextFrame
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mov es, [rdx] + CxSegES
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mov fs, [rdx] + CxSegFS
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mov gs, [rdx] + CxSegGS
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mov ss, [rdx] + CxSegSS
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;
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; Load the debug registers
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;
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cld
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xor rax, rax
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mov dr7, rax
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add esi, SrKernelDr0
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.errnz (SrKernelDr1 - SrKernelDr0 - 1 * 8)
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.errnz (SrKernelDr2 - SrKernelDr0 - 2 * 8)
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.errnz (SrKernelDr3 - SrKernelDr0 - 3 * 8)
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.errnz (SrKernelDr6 - SrKernelDr0 - 4 * 8)
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.errnz (SrKernelDr7 - SrKernelDr0 - 5 * 8)
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lodsq
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mov dr0, rax
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lodsq
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mov dr1, rax
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lodsq
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mov dr2, rax
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lodsq
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mov dr3, rax
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lodsq
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mov dr6, rax
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lodsq
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mov dr7, rax
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;
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; Load the stack pointer, eflags and store the new IP in
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; a return frame. Also push two registers that will be used
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; to the very end.
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;
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mov rsp, [rdx] + CxRsp
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pushq [rdx] + CxEflags
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popfq
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pushq [rdx] + CxRip
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push rdx
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push rdi
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mov rax, [rdx] + CxRax
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mov rbx, [rdx] + CxRbx
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mov rcx, [rdx] + CxRcx
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mov rsi, [rdx] + CxRsi
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mov rbp, [rdx] + CxRbp
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mov r8, [rdx] + CxR8
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mov r9, [rdx] + CxR9
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mov r10, [rdx] + CxR10
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mov r11, [rdx] + CxR11
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mov r12, [rdx] + CxR12
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mov r13, [rdx] + CxR13
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mov r14, [rdx] + CxR14
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mov r15, [rdx] + CxR15
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;
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; Indicate that we've started, pop the remaining two registers and
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; return.
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;
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inc DWORD PTR [rdi] + PsbCompletionFlag
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pop rdi
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pop rsi
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ret
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LEAF_END HalpLMStub, _TEXT$00
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END
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