222 lines
4.8 KiB
C
222 lines
4.8 KiB
C
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/* title "IA64 Hal static data"
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;++
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;
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; Copyright (c) 1998 Intel Corporation
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;
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; Module Name:
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;
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; i64dat.c (derived from nthals\halx86\ixdat.c)
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;
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; Abstract:
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;
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; Declares various INIT or pagable data
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;
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; Author:
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;
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; Todd Kjos (v-tkjos) 5-Mar-1998
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;
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; Environment:
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;
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; Kernel mode only.
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;
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; Revision History:
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;
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;--
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*/
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#include "halp.h"
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#include "pci.h"
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#include "pcip.h"
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#include "iosapic.h"
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#ifdef ALLOC_DATA_PRAGMA
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#pragma data_seg("INIT")
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#endif
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//
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// The following data is only valid during system initialiation
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// and the memory will be re-claimed by the system afterwards
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//
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ADDRESS_USAGE HalpDefaultPcIoSpace = {
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NULL, CmResourceTypePort, InternalUsage,
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{
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0x000, 0x10, // ISA DMA
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0x0C0, 0x10, // ISA DMA
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0x080, 0x10, // DMA
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0x020, 0x2, // PIC
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0x0A0, 0x2, // Cascaded PIC
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0x040, 0x4, // Timer1, Referesh, Speaker, Control Word
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0x048, 0x4, // Timer2, Failsafe
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0x092, 0x1, // system control port A
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0x070, 0x2, // Cmos/NMI enable
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0x0F0, 0x10, // coprocessor ports
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0xCF8, 0x8, // PCI Config Space Access Pair
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0,0
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}
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};
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ADDRESS_USAGE HalpEisaIoSpace = {
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NULL, CmResourceTypePort, InternalUsage,
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{
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0x0D0, 0x10, // DMA
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0x400, 0x10, // DMA
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0x480, 0x10, // DMA
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0x4C2, 0xE, // DMA
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0x4D4, 0x2C, // DMA
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0x461, 0x2, // Extended NMI
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0x464, 0x2, // Last Eisa Bus Muster granted
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0x4D0, 0x2, // edge/level control registers
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0xC84, 0x1, // System board enable
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0, 0
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}
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};
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ADDRESS_USAGE HalpImcrIoSpace = {
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NULL, CmResourceTypeMemory, InternalUsage,
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{
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0x022, 0x02, // ICMR ports
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0, 0
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}
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};
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//
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// From usage.c
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//
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WCHAR HalpSzSystem[] = L"\\Registry\\Machine\\Hardware\\Description\\System";
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WCHAR HalpSzSerialNumber[] = L"Serial Number";
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ADDRESS_USAGE *HalpAddressUsageList;
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IDTUsage HalpIDTUsage[MAXIMUM_IDTVECTOR+1];
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//
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// From ixpcibus.c
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//
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WCHAR rgzMultiFunctionAdapter[] = L"\\Registry\\Machine\\Hardware\\Description\\System\\MultifunctionAdapter";
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WCHAR rgzConfigurationData[] = L"Configuration Data";
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WCHAR rgzIdentifier[] = L"Identifier";
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WCHAR rgzPCIIndetifier[] = L"PCI";
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WCHAR rgzPCICardList[] = L"\\Registry\\Machine\\System\\CurrentControlSet\\Control\\PnP\\PCI\\CardList";
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//
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// From ixpcibrd.c
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//
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WCHAR rgzReservedResources[] = L"\\Registry\\Machine\\System\\CurrentControlSet\\Control\\SystemResources\\ReservedResources";
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//
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// From ixinfo.c
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//
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WCHAR rgzSuspendCallbackName[] = L"\\Callback\\SuspendHibernateSystem";
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//
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// Strings used for boot.ini options
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// from mphal.c
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//
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UCHAR HalpSzBreak[] = "BREAK";
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UCHAR HalpSzOneCpu[] = "ONECPU";
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UCHAR HalpSzPciLock[] = "PCILOCK";
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UCHAR HalpSzTimerRes[] = "TIMERES";
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UCHAR HalpGenuineIntel[]= "GenuineIntel";
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UCHAR HalpSzInterruptAffinity[]= "INTAFFINITY";
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UCHAR HalpSzForceClusterMode[]= "MAXPROCSPERCLUSTER";
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//
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// From ixcmos.asm
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//
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UCHAR HalpSerialLen;
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UCHAR HalpSerialNumber[31];
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//
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// From mpaddr.c
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//
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USHORT HalpIoCompatibleRangeList0[] = {
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0x0100, 0x03ff, 0x0500, 0x07FF, 0x0900, 0x0BFF, 0x0D00, 0x0FFF,
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0, 0
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};
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USHORT HalpIoCompatibleRangeList1[] = {
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0x03B0, 0x03BB, 0x03C0, 0x03DF, 0x07B0, 0x07BB, 0x07C0, 0x07DF,
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0x0BB0, 0x0BBB, 0x0BC0, 0x0BDF, 0x0FB0, 0x0FBB, 0x0FC0, 0x0FDF,
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0, 0
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};
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//
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// Error messages
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//
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UCHAR rgzNoMpsTable[] = "HAL: No MPS Table Found\n";
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UCHAR rgzNoApic[] = "HAL: No IO SAPIC Found\n";
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UCHAR rgzBadApicVersion[] = "HAL: Bad SAPIC Version\n";
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UCHAR rgzApicNotVerified[] = "HAL: IO SAPIC not verified\n";
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UCHAR rgzRTCNotFound[] = "HAL: No RTC device interrupt\n";
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//
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// From ixmca.c
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//
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UCHAR MsgCMCPending[] = MSG_CMC_PENDING;
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UCHAR MsgCPEPending[] = MSG_CPE_PENDING;
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WCHAR rgzSessionManager[] = L"Session Manager";
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WCHAR rgzEnableMCA[] = L"EnableMCA";
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WCHAR rgzEnableCMC[] = L"EnableCMC";
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WCHAR rgzEnableCPE[] = L"EnableCPE";
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WCHAR rgzNoMCABugCheck[] = L"NoMCABugCheck";
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WCHAR rgzEnableMCEOemDrivers[] = L"EnableMCEOemDrivers";
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#ifdef ALLOC_DATA_PRAGMA
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#pragma data_seg()
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#endif
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ULONG HalpFeatureBits = HALP_FEATURE_INIT;
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volatile BOOLEAN HalpHiberInProgress = FALSE;
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//
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// Stuff that we only need while we
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// sleep or hibernate.
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//
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#ifdef notyet
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MOTHERBOARD_CONTEXT HalpMotherboardState = {0};
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#endif //notyet
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//
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// PAGELK handle
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//
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PVOID HalpSleepPageLock = NULL;
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USHORT HalpPciIrqMask = 0;
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USHORT HalpEisaIrqMask = 0;
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USHORT HalpEisaIrqIgnore = 0x1000;
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PULONG_PTR *HalEOITable[HAL_MAXIMUM_PROCESSOR];
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PROCESSOR_INFO HalpProcessorInfo[HAL_MAXIMUM_PROCESSOR];
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//
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// HAL private Mask of all of the active processors.
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//
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// The specific processors bits are based on their _KPCR.Number values.
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KAFFINITY HalpActiveProcessors;
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