718 lines
13 KiB
C
718 lines
13 KiB
C
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/*++
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Copyright (c) 1990-1998 Microsoft Corporation
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Module Name:
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misc.c
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Abstract:
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This contains the misc support functions used by the
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PCI IRQ Miniport library.
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Author:
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Santosh Jodh (santoshj) 09-June-1998
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Environment:
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kernel mode only
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Revision History:
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--*/
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#include "local.h"
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NTSTATUS
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EisaGetTrigger (
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OUT PULONG Trigger
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)
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/*++
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Routine Description:
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This routine gets the EISA Irq trigger mask (1 - Level, 0 - Edge).
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Parameters:
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Trigger - Trigger mask is returned in this argument.
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Return Value:
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PCIIRQMP_STATUS_SUCCESS.
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Notes:
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--*/
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{
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UCHAR LowPart;
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UCHAR HighPart;
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//
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// Read the edge\level mask for Irq 0-7.
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//
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LowPart = READ_PORT_UCHAR((PUCHAR)0x4D0);
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//
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// Allow delay before another I/O.
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//
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IO_Delay();
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//
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// Read the edge\level mask for Irq 8-15.
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//
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HighPart = READ_PORT_UCHAR((PUCHAR)0x4D1);
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//
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// Combine set the trigger to the mask for Irq 0-15.
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//
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*Trigger = (ULONG)((HighPart << 8) + LowPart) & 0xFFFF;
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return (PCIMP_SUCCESS);
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}
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NTSTATUS
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EisaSetTrigger (
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IN ULONG Trigger
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)
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/*++
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Routine Description:
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This routine sets the EISA Irq trigger mask (1 - Level, 0 - Edge).
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Parameters:
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Trigger - Trigger mask to be set.
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Return Value:
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PCIIRQMP_STATUS_SUCCESS.
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Notes:
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--*/
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{
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//
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// Program the EISA edge\level control for Irq 0-7.
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//
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WRITE_PORT_UCHAR((PUCHAR)0x4D0, (CHAR)Trigger);
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//
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// Allow delay before another I/O.
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//
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IO_Delay();
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//
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// Program the EISA edge\level control for Irq 8-15.
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//
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WRITE_PORT_UCHAR((PUCHAR)0x4D1, (CHAR)(Trigger >> 8));
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return (PCIMP_SUCCESS);
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}
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UCHAR
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ReadConfigUchar (
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IN ULONG BusNumber,
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IN ULONG DevFunc,
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IN UCHAR Offset
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)
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/*++
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Routine Description:
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This routine calls the HAL to read the Pci config space.
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Parameters:
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BusNumber - Bus number of the Pci device being read.
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DevFunc - Slot number of the Pci device being read (Dev (7:3), Func(2:0)).
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Offset - Offset in the config space to be read.
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Return Value:
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Value read from the specified offset in the config space.
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Notes:
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--*/
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{
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UCHAR Data;
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ULONG slotNumber;
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slotNumber = (DevFunc >> 3) & 0x1F;
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slotNumber |= ((DevFunc & 0x07) << 5);
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//
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// Initialize data to invalid values.
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//
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Data = 0xFF;
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//
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// Call the HAL to do the actual reading.
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//
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HalGetBusDataByOffset( PCIConfiguration,
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BusNumber,
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slotNumber,
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&Data,
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Offset,
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sizeof(Data));
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//
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// Return data read to the caller.
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//
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return(Data);
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}
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USHORT
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ReadConfigUshort (
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IN ULONG BusNumber,
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IN ULONG DevFunc,
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IN UCHAR Offset
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)
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/*++
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Routine Description:
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This routine calls the HAL to read the Pci config space.
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Parameters:
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BusNumber - Bus number of the Pci device being read.
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DevFunc - Slot number of the Pci device being read (Dev (7:3), Func(2:0)).
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Offset - Offset in the config space to be read.
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Return Value:
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Value read from the specified offset in the config space.
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Notes:
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--*/
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{
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USHORT Data;
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ULONG slotNumber;
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slotNumber = (DevFunc >> 3) & 0x1F;
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slotNumber |= ((DevFunc & 0x07) << 5);
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//
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// Initialize data to invalid values.
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//
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Data = 0xFFFF;
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//
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// Call the HAL to do the actual reading.
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//
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HalGetBusDataByOffset( PCIConfiguration,
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BusNumber,
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slotNumber,
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&Data,
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Offset,
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sizeof(Data));
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//
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// Return data read to the caller.
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//
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return(Data);
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}
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ULONG
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ReadConfigUlong (
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IN ULONG BusNumber,
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IN ULONG DevFunc,
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IN UCHAR Offset
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)
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/*++
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Routine Description:
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This routine calls the HAL to read the Pci config space.
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Parameters:
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BusNumber - Bus number of the Pci device being read.
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DevFunc - Slot number of the Pci device being read (Dev (7:3), Func(2:0)).
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Offset - Offset in the config space to be read.
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Return Value:
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Value read from the specified offset in the config space.
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Notes:
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--*/
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{
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ULONG Data;
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ULONG slotNumber;
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slotNumber = (DevFunc >> 3) & 0x1F;
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slotNumber |= ((DevFunc & 0x07) << 5);
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//
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// Initialize data to invalid values.
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//
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Data = 0xFFFFFFFF;
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//
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// Call the HAL to do the actual reading.
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//
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HalGetBusDataByOffset( PCIConfiguration,
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BusNumber,
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slotNumber,
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&Data,
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Offset,
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sizeof(Data));
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//
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// Return data read to the caller.
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//
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return(Data);
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}
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VOID
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WriteConfigUchar (
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IN ULONG BusNumber,
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IN ULONG DevFunc,
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IN UCHAR Offset,
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IN UCHAR Data
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)
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/*++
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Routine Description:
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This routine calls the HAL to write to the Pci config space.
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Parameters:
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BusNumber - Bus number of the Pci device being written to.
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DevFunc - Slot number of the Pci device being read (Dev (7:3), Func(2:0)).
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Offset - Offset in the config space to be written.
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Data - Value to be written.
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Return Value:
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None.
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Notes:
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--*/
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{
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ULONG slotNumber;
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slotNumber = (DevFunc >> 3) & 0x1F;
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slotNumber |= ((DevFunc & 0x07) << 5);
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//
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// Call the HAL to do the actual writing.
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//
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HalSetBusDataByOffset( PCIConfiguration,
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BusNumber,
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slotNumber,
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&Data,
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Offset,
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sizeof(Data));
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}
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VOID
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WriteConfigUshort (
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IN ULONG BusNumber,
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IN ULONG DevFunc,
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IN UCHAR Offset,
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IN USHORT Data
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)
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/*++
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Routine Description:
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This routine calls the HAL to write to the Pci config space.
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Parameters:
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BusNumber - Bus number of the Pci device being written to.
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DevFunc - Slot number of the Pci device being read (Dev (7:3), Func(2:0)).
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Offset - Offset in the config space to be written.
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Data - Value to be written.
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Return Value:
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None.
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Notes:
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--*/
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{
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ULONG slotNumber;
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slotNumber = (DevFunc >> 3) & 0x1F;
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slotNumber |= ((DevFunc & 0x07) << 5);
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//
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// Call the HAL to do the actual writing.
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//
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HalSetBusDataByOffset( PCIConfiguration,
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BusNumber,
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slotNumber,
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&Data,
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Offset,
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sizeof(Data));
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}
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VOID
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WriteConfigUlong (
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IN ULONG BusNumber,
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IN ULONG DevFunc,
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IN UCHAR Offset,
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IN ULONG Data
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)
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/*++
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Routine Description:
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This routine calls the HAL to write to the Pci config space.
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Parameters:
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BusNumber - Bus number of the Pci device being written to.
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DevFunc - Slot number of the Pci device being read (Dev (7:3), Func(2:0)).
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Offset - Offset in the config space to be written.
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Data - Value to be written.
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Return Value:
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None.
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Notes:
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--*/
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{
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ULONG slotNumber;
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slotNumber = (DevFunc >> 3) & 0x1F;
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slotNumber |= ((DevFunc & 0x07) << 5);
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//
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// Call the HAL to do the actual writing.
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//
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HalSetBusDataByOffset( PCIConfiguration,
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BusNumber,
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slotNumber,
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&Data,
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Offset,
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sizeof(Data));
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}
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UCHAR
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GetMinLink (
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IN PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable
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)
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/*++
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Routine Description:
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This routine finds and returns the minimum link value in the
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given Pci Irq Routing Table.
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Parameters:
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PciIrqRoutingTable - Pci Irq Routing Table to be processed.
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Return Value:
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Minimum link value in the table.
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Notes:
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--*/
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{
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||
|
|
UCHAR MinLink;
|
||
|
|
PPIN_INFO PinInfo;
|
||
|
|
PPIN_INFO LastPin;
|
||
|
|
PSLOT_INFO SlotInfo;
|
||
|
|
PSLOT_INFO LastSlot;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Start by setting the maximum link to the maximum possible value.
|
||
|
|
//
|
||
|
|
|
||
|
|
MinLink = 0xFF;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Process all slots in this table.
|
||
|
|
//
|
||
|
|
|
||
|
|
SlotInfo = (PSLOT_INFO)((PUCHAR)PciIrqRoutingTable + sizeof(PCI_IRQ_ROUTING_TABLE));
|
||
|
|
LastSlot = (PSLOT_INFO)((PUCHAR)PciIrqRoutingTable + PciIrqRoutingTable->TableSize);
|
||
|
|
|
||
|
|
while (SlotInfo < LastSlot)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Process all pins for this slot.
|
||
|
|
//
|
||
|
|
|
||
|
|
PinInfo = &SlotInfo->PinInfo[0];
|
||
|
|
LastPin = &SlotInfo->PinInfo[NUM_IRQ_PINS];
|
||
|
|
|
||
|
|
while (PinInfo < LastPin)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Update the min link found so far if the current link is
|
||
|
|
// valid and smaller.
|
||
|
|
//
|
||
|
|
|
||
|
|
if ( PinInfo->Link &&
|
||
|
|
PinInfo->Link < MinLink)
|
||
|
|
{
|
||
|
|
MinLink = PinInfo->Link;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Next link.
|
||
|
|
//
|
||
|
|
|
||
|
|
PinInfo++;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Next slot.
|
||
|
|
//
|
||
|
|
|
||
|
|
SlotInfo++;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// If we failed to find the minimum value, set the minimum to zero.
|
||
|
|
//
|
||
|
|
|
||
|
|
if (MinLink == 0xFF)
|
||
|
|
MinLink = 0;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Return the minimum link in the table to the caller.
|
||
|
|
//
|
||
|
|
|
||
|
|
return (MinLink);
|
||
|
|
}
|
||
|
|
|
||
|
|
UCHAR
|
||
|
|
GetMaxLink (
|
||
|
|
IN PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable
|
||
|
|
)
|
||
|
|
|
||
|
|
/*++
|
||
|
|
|
||
|
|
Routine Description:
|
||
|
|
|
||
|
|
This routine finds and returns the maximum link value in the
|
||
|
|
given Pci Irq Routing Table.
|
||
|
|
|
||
|
|
Parameters:
|
||
|
|
|
||
|
|
PciIrqRoutingTable - Pci Irq Routing Table to be processed.
|
||
|
|
|
||
|
|
Return Value:
|
||
|
|
|
||
|
|
Maximum link value in the table.
|
||
|
|
|
||
|
|
Notes:
|
||
|
|
|
||
|
|
--*/
|
||
|
|
|
||
|
|
{
|
||
|
|
UCHAR MaxLink;
|
||
|
|
PPIN_INFO PinInfo;
|
||
|
|
PPIN_INFO LastPin;
|
||
|
|
PSLOT_INFO SlotInfo;
|
||
|
|
PSLOT_INFO LastSlot;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Start by setting the maximum link to the smallest possible value.
|
||
|
|
//
|
||
|
|
|
||
|
|
MaxLink = 0;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Process all slots in this table.
|
||
|
|
//
|
||
|
|
|
||
|
|
SlotInfo = (PSLOT_INFO)((PUCHAR)PciIrqRoutingTable + sizeof(PCI_IRQ_ROUTING_TABLE));
|
||
|
|
LastSlot = (PSLOT_INFO)((PUCHAR)PciIrqRoutingTable + PciIrqRoutingTable->TableSize);
|
||
|
|
|
||
|
|
while (SlotInfo < LastSlot)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Process all pins for this slot.
|
||
|
|
//
|
||
|
|
|
||
|
|
PinInfo = &SlotInfo->PinInfo[0];
|
||
|
|
LastPin = &SlotInfo->PinInfo[NUM_IRQ_PINS];
|
||
|
|
|
||
|
|
while (PinInfo < LastPin)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Update the max link found so far if the current link is
|
||
|
|
// valid and larger.
|
||
|
|
//
|
||
|
|
|
||
|
|
if ( PinInfo->Link &&
|
||
|
|
PinInfo->Link > MaxLink)
|
||
|
|
{
|
||
|
|
MaxLink = PinInfo->Link;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Next pin.
|
||
|
|
//
|
||
|
|
|
||
|
|
PinInfo++;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Next slot.
|
||
|
|
//
|
||
|
|
|
||
|
|
SlotInfo++;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Return the maximum link in the table to the caller.
|
||
|
|
//
|
||
|
|
|
||
|
|
return (MaxLink);
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifdef ALLOC_PRAGMA
|
||
|
|
#pragma alloc_text(PAGE, NormalizeLinks)
|
||
|
|
#endif //ALLOC_PRAGMA
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NormalizeLinks (
|
||
|
|
IN PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable,
|
||
|
|
IN UCHAR Adjustment
|
||
|
|
)
|
||
|
|
|
||
|
|
/*++
|
||
|
|
|
||
|
|
Routine Description:
|
||
|
|
|
||
|
|
This routine normalizes all link values in the Pci Irq Routing Table by
|
||
|
|
adding the adjustment to all the links.
|
||
|
|
|
||
|
|
Parameters:
|
||
|
|
|
||
|
|
PciIrqRoutingTable - Pci Irq Routing Table to be normalized.
|
||
|
|
|
||
|
|
Adjustment - Amount to be added to each link.
|
||
|
|
|
||
|
|
Return Value:
|
||
|
|
|
||
|
|
None.
|
||
|
|
|
||
|
|
Notes:
|
||
|
|
|
||
|
|
--*/
|
||
|
|
|
||
|
|
{
|
||
|
|
PPIN_INFO PinInfo;
|
||
|
|
PPIN_INFO LastPin;
|
||
|
|
PSLOT_INFO SlotInfo;
|
||
|
|
PSLOT_INFO LastSlot;
|
||
|
|
|
||
|
|
PAGED_CODE();
|
||
|
|
|
||
|
|
//
|
||
|
|
// Process all slots in this table.
|
||
|
|
//
|
||
|
|
|
||
|
|
SlotInfo = (PSLOT_INFO)((PUCHAR)PciIrqRoutingTable + sizeof(PCI_IRQ_ROUTING_TABLE));
|
||
|
|
LastSlot = (PSLOT_INFO)((PUCHAR)PciIrqRoutingTable + PciIrqRoutingTable->TableSize);
|
||
|
|
|
||
|
|
while (SlotInfo < LastSlot)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Process all pins.
|
||
|
|
//
|
||
|
|
|
||
|
|
PinInfo = &SlotInfo->PinInfo[0];
|
||
|
|
LastPin = &SlotInfo->PinInfo[NUM_IRQ_PINS];
|
||
|
|
|
||
|
|
while (PinInfo < LastPin)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Only normalize valid link values.
|
||
|
|
//
|
||
|
|
|
||
|
|
if(PinInfo->Link)
|
||
|
|
{
|
||
|
|
PinInfo->Link += Adjustment;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Next pin.
|
||
|
|
//
|
||
|
|
|
||
|
|
PinInfo++;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Next slot.
|
||
|
|
//
|
||
|
|
|
||
|
|
SlotInfo++;
|
||
|
|
}
|
||
|
|
}
|