261 lines
8.5 KiB
C
261 lines
8.5 KiB
C
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/*++
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Copyright (c) 1990 Microsoft Corporation
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Module Name:
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dataia64.c
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Abstract:
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This module contains the private hardware specific global storage for
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the memory management subsystem.
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Author:
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Lou Perazzoli (loup) 22-Jan-1990
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Revision History:
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Koichi Yamada (kyamada) 9-Jan-1996 : IA64 version based on i386 version
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--*/
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#include "mi.h"
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//
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// A zero Pte.
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//
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const MMPTE ZeroPte = { 0 };
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//
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// A kernel zero PTE.
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//
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const MMPTE ZeroKernelPte = {0x0};
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MMPTE ValidKernelPte = { MM_PTE_VALID_MASK |
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MM_PTE_CACHE |
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MM_PTE_WRITE_MASK |
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MM_PTE_EXECUTE_MASK |
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MM_PTE_ACCESS_MASK |
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MM_PTE_DIRTY_MASK |
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MM_PTE_EXC_DEFER};
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const MMPTE ValidKernelPteLocal = { MM_PTE_VALID_MASK |
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MM_PTE_CACHE |
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MM_PTE_WRITE_MASK |
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MM_PTE_ACCESS_MASK |
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MM_PTE_DIRTY_MASK |
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MM_PTE_EXC_DEFER};
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const MMPTE ValidUserPte = { MM_PTE_VALID_MASK |
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MM_PTE_CACHE |
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MM_PTE_WRITE_MASK |
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MM_PTE_OWNER_MASK |
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MM_PTE_ACCESS_MASK |
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MM_PTE_DIRTY_MASK |
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MM_PTE_EXC_DEFER};
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const MMPTE ValidPtePte = { MM_PTE_VALID_MASK |
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MM_PTE_CACHE |
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MM_PTE_WRITE_MASK |
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MM_PTE_ACCESS_MASK |
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MM_PTE_DIRTY_MASK };
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const MMPTE ValidPdePde = { MM_PTE_VALID_MASK |
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MM_PTE_CACHE |
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MM_PTE_WRITE_MASK |
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MM_PTE_ACCESS_MASK |
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MM_PTE_DIRTY_MASK };
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MMPTE ValidKernelPde = { MM_PTE_VALID_MASK |
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MM_PTE_CACHE |
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MM_PTE_WRITE_MASK |
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MM_PTE_ACCESS_MASK |
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MM_PTE_DIRTY_MASK };
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const MMPTE ValidKernelPdeLocal = { MM_PTE_VALID_MASK |
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MM_PTE_CACHE |
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MM_PTE_WRITE_MASK |
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MM_PTE_ACCESS_MASK |
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MM_PTE_DIRTY_MASK };
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MMPTE ValidPpePte = { MM_PTE_VALID_MASK |
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MM_PTE_CACHE |
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MM_PTE_WRITE_MASK |
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MM_PTE_ACCESS_MASK |
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MM_PTE_DIRTY_MASK };
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MMPTE DemandZeroPde = { MM_READWRITE << MM_PROTECT_FIELD_SHIFT };
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const MMPTE DemandZeroPte = { MM_READWRITE << MM_PROTECT_FIELD_SHIFT };
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const MMPTE TransitionPde = { MM_PTE_TRANSITION_MASK |
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MM_READWRITE << MM_PROTECT_FIELD_SHIFT };
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MMPTE PrototypePte = { MI_PTE_LOOKUP_NEEDED << 32 |
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MM_PTE_PROTOTYPE_MASK |
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MM_READWRITE << MM_PROTECT_FIELD_SHIFT };
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//
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// PTE which generates an access violation when referenced.
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//
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const MMPTE NoAccessPte = {MM_NOACCESS << MM_PROTECT_FIELD_SHIFT};
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//
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// Pool start and end.
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//
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PVOID MmNonPagedPoolStart;
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PVOID MmNonPagedPoolEnd = (PVOID)MM_NONPAGED_POOL_END;
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PVOID MmPagedPoolStart = (PVOID)MM_PAGED_POOL_START;
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PVOID MmPagedPoolEnd;
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ULONG_PTR MmKseg2Frame = 0;
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//
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// Color tables for free and zeroed pages.
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//
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#if MM_MAXIMUM_NUMBER_OF_COLORS > 1
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MMPFNLIST MmFreePagesByPrimaryColor[2][MM_MAXIMUM_NUMBER_OF_COLORS];
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#endif
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PMMCOLOR_TABLES MmFreePagesByColor[2];
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//
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// Color tables for modified pages destined for the paging file.
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//
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MMPFNLIST MmModifiedPageListByColor[MM_MAXIMUM_NUMBER_OF_COLORS] = {
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0, ModifiedPageList, MM_EMPTY_LIST, MM_EMPTY_LIST};
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//
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// Count of the number of modified pages destined for the paging file.
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//
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PFN_NUMBER MmTotalPagesForPagingFile = 0;
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//
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// Pte reserved for mapping pages for the debugger.
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//
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PMMPTE MmDebugPte;
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//
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// 16 PTEs reserved for mapping MDLs (64k max).
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//
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PMMPTE MmCrashDumpPte;
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//
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// Maximum size of system cache
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//
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ULONG MiMaximumSystemCacheSize;
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//
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// Supported Page Size Information
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//
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ULONGLONG MmPageSizeInfo = 0;
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#if defined(_MIALT4K_)
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//
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// Map a IA32 compatible PTE protection from Pte.Protect field
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//
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ULONG MmProtectToPteMaskForIA32[32] = {
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MM_PTE_NOACCESS,
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MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_EXECUTE_READWRITE | MM_PTE_CACHE,
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MM_PTE_EXECUTE_WRITECOPY | MM_PTE_CACHE,
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MM_PTE_EXECUTE_READWRITE | MM_PTE_CACHE,
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MM_PTE_EXECUTE_WRITECOPY | MM_PTE_CACHE,
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MM_PTE_NOACCESS,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READWRITE,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_WRITECOPY,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READWRITE,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_WRITECOPY,
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MM_PTE_NOACCESS,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READWRITE | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_WRITECOPY | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READWRITE | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_WRITECOPY | MM_PTE_CACHE,
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MM_PTE_NOACCESS,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READWRITE,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_WRITECOPY,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READWRITE,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_WRITECOPY
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};
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ULONG MmProtectToPteMaskForSplit[32] = {
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MM_PTE_NOACCESS,
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MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_EXECUTE_WRITECOPY | MM_PTE_CACHE,
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MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_EXECUTE_WRITECOPY | MM_PTE_CACHE,
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MM_PTE_NOACCESS,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_WRITECOPY,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_READWRITE,
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MM_PTE_NOCACHE | MM_PTE_EXECUTE_WRITECOPY,
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MM_PTE_NOACCESS,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_WRITECOPY | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_READ | MM_PTE_CACHE,
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MM_PTE_GUARD | MM_PTE_EXECUTE_WRITECOPY | MM_PTE_CACHE,
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MM_PTE_NOACCESS,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_WRITECOPY,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_READ,
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MM_PTE_NOCACHE | MM_PTE_GUARD | MM_PTE_EXECUTE_WRITECOPY
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};
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#endif
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