468 lines
8.4 KiB
OpenEdge ABL
468 lines
8.4 KiB
OpenEdge ABL
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/*++
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Copyright (c) Microsoft Corporation. All rights reserved.
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Module Name:
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ioaccess.h
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Abstract:
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Definitions of function prototypes for accessing I/O ports and
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memory on I/O adapters from display drivers.
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Cloned from parts of nti386.h.
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Author:
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--*/
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//
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// Note: IA64 is for 64 bits Merced. Under Merced compiler option, we don't have
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// _X86_, instead, we use _IA64_. Same thing, _AXP64_ is for 64 bits compiler
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// option for ALPHA
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//
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#if defined(_MIPS_) || defined(_X86_) || defined(_AMD64_)
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//
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// Memory barriers on X86 and MIPS are not required since the Io
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// Operations are always garanteed to be executed in order
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//
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#define MEMORY_BARRIER() 0
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#elif defined(_IA64_)
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//
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// Itanium requires memory barriers
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//
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void __mf();
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#define MEMORY_BARRIER() __mf()
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#elif defined(_PPC_)
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//
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// A memory barrier function is provided by the PowerPC Enforce
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// In-order Execution of I/O instruction (eieio).
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//
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#if defined(_M_PPC) && defined(_MSC_VER) && (_MSC_VER>=1000)
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void __emit( unsigned const __int32 );
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#define __builtin_eieio() __emit( 0x7C0006AC )
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#else
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void __builtin_eieio(void);
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#endif
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#define MEMORY_BARRIER() __builtin_eieio()
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#elif defined(_ALPHA_) || (_AXP64_)
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//
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// ALPHA requires memory barriers
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//
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#define MEMORY_BARRIER() __MB()
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#endif
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#ifndef NO_PORT_MACROS
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//
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// I/O space read and write macros.
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//
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// The READ/WRITE_REGISTER_* calls manipulate MEMORY registers.
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// (Use x86 move instructions, with LOCK prefix to force correct behavior
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// w.r.t. caches and write buffers.)
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//
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// The READ/WRITE_PORT_* calls manipulate I/O ports.
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// (Use x86 in/out instructions.)
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//
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//
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// inp(),inpw(), inpd(), outp(), outpw(), outpd() are X86 specific intrinsic
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// inline functions. So for IA64, we have to put READ_PORT_USHORT() etc. back
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// to it's supposed to be, defined in sdk\inc\wdm.h
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//
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#if defined(_IA64_)
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#define READ_REGISTER_UCHAR(Register) (*(volatile UCHAR *)(Register))
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#define READ_REGISTER_USHORT(Register) (*(volatile USHORT *)(Register))
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#define READ_REGISTER_ULONG(Register) (*(volatile ULONG *)(Register))
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#define WRITE_REGISTER_UCHAR(Register, Value) (*(volatile UCHAR *)(Register) = (Value))
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#define WRITE_REGISTER_USHORT(Register, Value) (*(volatile USHORT *)(Register) = (Value))
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#define WRITE_REGISTER_ULONG(Register, Value) (*(volatile ULONG *)(Register) = (Value))
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__declspec(dllimport)
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UCHAR
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READ_PORT_UCHAR(
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PVOID Port
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);
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__declspec(dllimport)
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USHORT
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READ_PORT_USHORT(
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PVOID Port
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);
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__declspec(dllimport)
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ULONG
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READ_PORT_ULONG(
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PVOID Port
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);
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//
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// All these function prototypes take a ULONG as a parameter so that
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// we don't force an extra typecast in the code (which will cause
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// the X86 to generate bad code).
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//
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__declspec(dllimport)
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VOID
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WRITE_PORT_UCHAR(
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PVOID Port,
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ULONG Value
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);
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__declspec(dllimport)
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VOID
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WRITE_PORT_USHORT(
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PVOID Port,
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ULONG Value
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);
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__declspec(dllimport)
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VOID
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WRITE_PORT_ULONG(
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PVOID Port,
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ULONG Value
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);
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#elif defined(_X86_)
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#define READ_REGISTER_UCHAR(Register) (*(volatile UCHAR *)(Register))
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#define READ_REGISTER_USHORT(Register) (*(volatile USHORT *)(Register))
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#define READ_REGISTER_ULONG(Register) (*(volatile ULONG *)(Register))
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#define WRITE_REGISTER_UCHAR(Register, Value) (*(volatile UCHAR *)(Register) = (Value))
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#define WRITE_REGISTER_USHORT(Register, Value) (*(volatile USHORT *)(Register) = (Value))
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#define WRITE_REGISTER_ULONG(Register, Value) (*(volatile ULONG *)(Register) = (Value))
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#define READ_PORT_UCHAR(Port) (UCHAR)(inp (Port))
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#define READ_PORT_USHORT(Port) (USHORT)(inpw (Port))
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#define READ_PORT_ULONG(Port) (ULONG)(inpd (Port))
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#define WRITE_PORT_UCHAR(Port, Value) outp ((Port), (Value))
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#define WRITE_PORT_USHORT(Port, Value) outpw ((Port), (Value))
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#define WRITE_PORT_ULONG(Port, Value) outpd ((Port), (Value))
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#elif defined(_PPC_) || defined(_MIPS_)
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#define READ_REGISTER_UCHAR(x) (*(volatile UCHAR * const)(x))
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#define READ_REGISTER_USHORT(x) (*(volatile USHORT * const)(x))
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#define READ_REGISTER_ULONG(x) (*(volatile ULONG * const)(x))
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#define WRITE_REGISTER_UCHAR(x, y) (*(volatile UCHAR * const)(x) = (y))
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#define WRITE_REGISTER_USHORT(x, y) (*(volatile USHORT * const)(x) = (y))
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#define WRITE_REGISTER_ULONG(x, y) (*(volatile ULONG * const)(x) = (y))
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#define READ_PORT_UCHAR(x) READ_REGISTER_UCHAR(x)
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#define READ_PORT_USHORT(x) READ_REGISTER_USHORT(x)
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#define READ_PORT_ULONG(x) READ_REGISTER_ULONG(x)
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//
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// All these macros take a ULONG as a parameter so that we don't
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// force an extra typecast in the code (which will cause the X86 to
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// generate bad code).
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//
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#define WRITE_PORT_UCHAR(x, y) WRITE_REGISTER_UCHAR(x, (UCHAR) (y))
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#define WRITE_PORT_USHORT(x, y) WRITE_REGISTER_USHORT(x, (USHORT) (y))
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#define WRITE_PORT_ULONG(x, y) WRITE_REGISTER_ULONG(x, (ULONG) (y))
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#elif defined(_ALPHA_) || (_AXP64_)
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//
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// READ/WRITE_PORT/REGISTER_UCHAR_USHORT_ULONG are all functions that
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// go to the HAL on ALPHA
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//
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// So we only put the prototypes here
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//
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__declspec(dllimport)
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UCHAR
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READ_REGISTER_UCHAR(
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PVOID Register
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);
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__declspec(dllimport)
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USHORT
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READ_REGISTER_USHORT(
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PVOID Register
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);
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__declspec(dllimport)
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ULONG
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READ_REGISTER_ULONG(
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PVOID Register
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);
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__declspec(dllimport)
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VOID
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WRITE_REGISTER_UCHAR(
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PVOID Register,
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UCHAR Value
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);
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__declspec(dllimport)
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VOID
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WRITE_REGISTER_USHORT(
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PVOID Register,
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USHORT Value
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);
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__declspec(dllimport)
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VOID
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WRITE_REGISTER_ULONG(
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PVOID Register,
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ULONG Value
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);
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__declspec(dllimport)
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UCHAR
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READ_PORT_UCHAR(
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PVOID Port
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);
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__declspec(dllimport)
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USHORT
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READ_PORT_USHORT(
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PVOID Port
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);
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__declspec(dllimport)
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ULONG
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READ_PORT_ULONG(
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PVOID Port
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);
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//
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// All these function prototypes take a ULONG as a parameter so that
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// we don't force an extra typecast in the code (which will cause
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// the X86 to generate bad code).
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//
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__declspec(dllimport)
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VOID
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WRITE_PORT_UCHAR(
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PVOID Port,
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ULONG Value
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);
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__declspec(dllimport)
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VOID
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WRITE_PORT_USHORT(
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PVOID Port,
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ULONG Value
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);
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__declspec(dllimport)
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VOID
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WRITE_PORT_ULONG(
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PVOID Port,
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ULONG Value
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);
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#elif defined(_AMD64_)
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UCHAR
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__inbyte (
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IN USHORT Port
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);
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USHORT
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__inword (
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IN USHORT Port
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);
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ULONG
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__indword (
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IN USHORT Port
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);
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VOID
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__outbyte (
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IN USHORT Port,
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IN UCHAR Data
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);
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VOID
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__outword (
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IN USHORT Port,
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IN USHORT Data
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);
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VOID
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__outdword (
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IN USHORT Port,
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IN ULONG Data
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);
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#pragma intrinsic(__inbyte)
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#pragma intrinsic(__inword)
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#pragma intrinsic(__indword)
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#pragma intrinsic(__outbyte)
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#pragma intrinsic(__outword)
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#pragma intrinsic(__outdword)
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LONG
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_InterlockedOr (
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IN OUT LONG volatile *Target,
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IN LONG Set
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);
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#pragma intrinsic(_InterlockedOr)
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__inline
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UCHAR
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READ_REGISTER_UCHAR (
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PVOID Register
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)
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{
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return *(UCHAR volatile *)Register;
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}
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__inline
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USHORT
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READ_REGISTER_USHORT (
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PVOID Register
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)
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{
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return *(USHORT volatile *)Register;
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}
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__inline
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ULONG
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READ_REGISTER_ULONG (
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PVOID Register
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)
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{
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return *(ULONG volatile *)Register;
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}
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__inline
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VOID
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WRITE_REGISTER_UCHAR (
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PVOID Register,
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UCHAR Value
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)
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{
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LONG Synch;
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*(UCHAR volatile *)Register = Value;
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_InterlockedOr(&Synch, 1);
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return;
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}
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__inline
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VOID
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WRITE_REGISTER_USHORT (
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PVOID Register,
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USHORT Value
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)
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{
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LONG Synch;
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*(USHORT volatile *)Register = Value;
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_InterlockedOr(&Synch, 1);
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return;
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}
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__inline
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VOID
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WRITE_REGISTER_ULONG (
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PVOID Register,
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ULONG Value
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)
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{
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LONG Synch;
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*(ULONG volatile *)Register = Value;
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_InterlockedOr(&Synch, 1);
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return;
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}
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__inline
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UCHAR
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READ_PORT_UCHAR (
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PVOID Port
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)
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{
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return __inbyte((USHORT)((ULONG64)Port));
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}
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__inline
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USHORT
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READ_PORT_USHORT (
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PVOID Port
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)
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{
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return __inword((USHORT)((ULONG64)Port));
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}
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__inline
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ULONG
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READ_PORT_ULONG (
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PVOID Port
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)
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{
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return __indword((USHORT)((ULONG64)Port));
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}
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|
|
||
|
|
__inline
|
||
|
|
VOID
|
||
|
|
WRITE_PORT_UCHAR (
|
||
|
|
PVOID Port,
|
||
|
|
UCHAR Value
|
||
|
|
)
|
||
|
|
|
||
|
|
{
|
||
|
|
__outbyte((USHORT)((ULONG64)Port), Value);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
__inline
|
||
|
|
VOID
|
||
|
|
WRITE_PORT_USHORT (
|
||
|
|
PVOID Port,
|
||
|
|
USHORT Value
|
||
|
|
)
|
||
|
|
|
||
|
|
{
|
||
|
|
__outword((USHORT)((ULONG64)Port), Value);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
__inline
|
||
|
|
VOID
|
||
|
|
WRITE_PORT_ULONG (
|
||
|
|
PVOID Port,
|
||
|
|
ULONG Value
|
||
|
|
)
|
||
|
|
|
||
|
|
{
|
||
|
|
__outdword((USHORT)((ULONG64)Port), Value);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif // NO_PORT_MACROS
|
||
|
|
|
||
|
|
#endif
|