/*++ BUILD Version: 0095 // Increment this if a change has global effects
Copyright (c) Microsoft Corporation. All rights reserved.
Module Name:
ndis.h
Abstract:
This module defines the structures, macros, and functions available
to NDIS drivers.
Revision History:
--*/
#if !defined(_NDIS_)
#define _NDIS_
#if !defined(NDIS_WDM)
#define NDIS_WDM 0
#endif
//
// If we're building a miniport on x86, set BINARY_COMPATIBLE so that
// we don't use functions that aren't available on Windows 9x.
//
#if !defined(BINARY_COMPATIBLE)
#if defined(NDIS_MINIPORT_DRIVER) && defined(_M_IX86)
#define BINARY_COMPATIBLE 1
#else
#define BINARY_COMPATIBLE 0
#endif
#endif
#if !defined(_M_IX86)
#undef BINARY_COMPATIBLE
#define BINARY_COMPATIBLE 0
#endif
//
// BEGIN INTERNAL DEFINITIONS
//
//
// BINARY_COMPATIBLE = 1 and NDIS_WDM = 1 then use wdm.h
// BINARY_COMPATIBLE = 1 and NDIS_WDM = 0 then use ndis.h only
// BINARY_COMPATIBLE = 0 and NDIS_WDM = 1 then use ntddk.h
// BINARY_COMPATIBLE = 0 and NDIS_WDM = 0 then use ntddk.h
//
#if (BINARY_COMPATIBLE && !NDIS_WDM)
//
// BINARY_COMPATIBLE = 1 and NDIS_WDM = 0 then use ndis.h only
//
// The following internal definitions are included here in order to allow
// the exported NDIS structures, macros, and functions to compile. They
// must not be used directly by miniport drivers.
//
#define _NTDDK_
#include <ctype.h>
#ifndef IN
#define IN
#endif
#ifndef OUT
#define OUT
#endif
#ifndef OPTIONAL
#define OPTIONAL
#endif
#ifndef NOTHING
#define NOTHING
#endif
#ifndef CRITICAL
#define CRITICAL
#endif
#ifndef ANYSIZE_ARRAY
#define ANYSIZE_ARRAY 1 // winnt
#endif
// begin_winnt
#if defined(_M_MRX000) && !(defined(MIDL_PASS) || defined(RC_INVOKED)) && defined(ENABLE_RESTRICTED)
#define RESTRICTED_POINTER __restrict
#else
#define RESTRICTED_POINTER
#endif
#if defined(_M_MRX000) || defined(_M_ALPHA) || defined(_M_PPC) || defined(_M_IA64) || defined(_M_AMD64)
#define UNALIGNED __unaligned
#if defined(_WIN64)
#define UNALIGNED64 __unaligned
#else
#define UNALIGNED64
#endif
#else
#define UNALIGNED
#define UNALIGNED64
#endif
#if defined(_WIN64) || defined(_M_ALPHA)
#define MAX_NATURAL_ALIGNMENT sizeof(ULONGLONG)
#define MEMORY_ALLOCATION_ALIGNMENT 16
#else
#define MAX_NATURAL_ALIGNMENT sizeof(ULONG)
#define MEMORY_ALLOCATION_ALIGNMENT 8
#endif
//
// TYPE_ALIGNMENT will return the alignment requirements of a given type for
// the current platform.
//
#ifdef __cplusplus
#if _MSC_VER >= 1300
#define TYPE_ALIGNMENT( t ) __alignof(t)
#endif
#else
#define TYPE_ALIGNMENT( t ) \
FIELD_OFFSET( struct { char x; t test; }, test )
#endif
#if defined(_WIN64)
#define PROBE_ALIGNMENT( _s ) (TYPE_ALIGNMENT( _s ) > TYPE_ALIGNMENT( ULONG ) ? \
TYPE_ALIGNMENT( _s ) : TYPE_ALIGNMENT( ULONG ))
#define PROBE_ALIGNMENT32( _s ) TYPE_ALIGNMENT( ULONG )
#else
#define PROBE_ALIGNMENT( _s ) TYPE_ALIGNMENT( ULONG )
#endif
//
// C_ASSERT() can be used to perform many compile-time assertions:
// type sizes, field offsets, etc.
//
// An assertion failure results in error C2118: negative subscript.
//
#define C_ASSERT(e) typedef char __C_ASSERT__[(e)?1:-1]
#if !defined(_MAC) && (defined(_M_MRX000) || defined(_M_AMD64) || defined(_M_IA64)) && (_MSC_VER >= 1100) && !(defined(MIDL_PASS) || defined(RC_INVOKED))
#define POINTER_64 __ptr64
typedef unsigned __int64 POINTER_64_INT;
#if defined(_WIN64)
#define POINTER_32 __ptr32
#else
#define POINTER_32
#endif
#else
#if defined(_MAC) && defined(_MAC_INT_64)
#define POINTER_64 __ptr64
typedef unsigned __int64 POINTER_64_INT;
#else
#define POINTER_64
typedef unsigned long POINTER_64_INT;
#endif
#define POINTER_32
#endif
#if defined(_IA64_) || defined(_AMD64_)
#define FIRMWARE_PTR
#else
#define FIRMWARE_PTR POINTER_32
#endif
#include <basetsd.h>
// end_winnt
#ifndef CONST
#define CONST const
#endif
// begin_winnt
#if (defined(_M_IX86) || defined(_M_IA64) || defined(_M_AMD64)) && !defined(MIDL_PASS)
#define DECLSPEC_IMPORT __declspec(dllimport)
#else
#define DECLSPEC_IMPORT
#endif
#ifndef DECLSPEC_NORETURN
#if (_MSC_VER >= 1200) && !defined(MIDL_PASS)
#define DECLSPEC_NORETURN __declspec(noreturn)
#else
#define DECLSPEC_NORETURN
#endif
#endif
#ifndef DECLSPEC_ALIGN
#if (_MSC_VER >= 1300) && !defined(MIDL_PASS)
#define DECLSPEC_ALIGN(x) __declspec(align(x))
#else
#define DECLSPEC_ALIGN(x)
#endif
#endif
#ifndef DECLSPEC_CACHEALIGN
#define DECLSPEC_CACHEALIGN DECLSPEC_ALIGN(128)
#endif
#ifndef DECLSPEC_UUID
#if (_MSC_VER >= 1100) && defined (__cplusplus)
#define DECLSPEC_UUID(x) __declspec(uuid(x))
#else
#define DECLSPEC_UUID(x)
#endif
#endif
#ifndef DECLSPEC_NOVTABLE
#if (_MSC_VER >= 1100) && defined(__cplusplus)
#define DECLSPEC_NOVTABLE __declspec(novtable)
#else
#define DECLSPEC_NOVTABLE
#endif
#endif
#ifndef DECLSPEC_SELECTANY
#if (_MSC_VER >= 1100)
#define DECLSPEC_SELECTANY __declspec(selectany)
#else
#define DECLSPEC_SELECTANY
#endif
#endif
#ifndef NOP_FUNCTION
#if (_MSC_VER >= 1210)
#define NOP_FUNCTION __noop
#else
#define NOP_FUNCTION (void)0
#endif
#endif
#ifndef DECLSPEC_ADDRSAFE
#if (_MSC_VER >= 1200) && (defined(_M_ALPHA) || defined(_M_AXP64))
#define DECLSPEC_ADDRSAFE __declspec(address_safe)
#else
#define DECLSPEC_ADDRSAFE
#endif
#endif
#ifndef FORCEINLINE
#if (_MSC_VER >= 1200)
#define FORCEINLINE __forceinline
#else
#define FORCEINLINE __inline
#endif
#endif
#ifndef DECLSPEC_DEPRECATED
#if (_MSC_VER >= 1300) && !defined(MIDL_PASS)
#define DECLSPEC_DEPRECATED __declspec(deprecated)
#define DEPRECATE_SUPPORTED
#else
#define DECLSPEC_DEPRECATED
#undef DEPRECATE_SUPPORTED
#endif
#endif
// end_winnt
#ifdef DEPRECATE_DDK_FUNCTIONS
#ifdef _NTDDK_
#define DECLSPEC_DEPRECATED_DDK DECLSPEC_DEPRECATED
#ifdef DEPRECATE_SUPPORTED
#define PRAGMA_DEPRECATED_DDK 1
#endif
#else
#define DECLSPEC_DEPRECATED_DDK
#define PRAGMA_DEPRECATED_DDK 1
#endif
#else
#define DECLSPEC_DEPRECATED_DDK
#define PRAGMA_DEPRECATED_DDK 0
#endif
//
// Void
//
// begin_winnt
typedef void *PVOID;
typedef void * POINTER_64 PVOID64;
// end_winnt
#if defined(_M_IX86)
#define FASTCALL _fastcall
#else
#define FASTCALL
#endif
#if ((_MSC_VER >= 800) || defined(_STDCALL_SUPPORTED)) && !defined(_M_AMD64)
#define NTAPI __stdcall
#else
#define _cdecl
#define NTAPI
#endif
//
// Define API decoration for direct importing system DLL references.
//
#if !defined(_NTSYSTEM_)
#define NTSYSAPI DECLSPEC_IMPORT
#define NTSYSCALLAPI DECLSPEC_IMPORT
#else
#define NTSYSAPI
#if defined(_NTDLLBUILD_)
#define NTSYSCALLAPI
#else
#define NTSYSCALLAPI DECLSPEC_ADDRSAFE
#endif
#endif
//
// Basics
//
#ifndef VOID
#define VOID void
typedef char CHAR;
typedef short SHORT;
typedef long LONG;
#endif
//
// UNICODE (Wide Character) types
//
#ifndef _MAC
typedef wchar_t WCHAR; // wc, 16-bit UNICODE character
#else
// some Macintosh compilers don't define wchar_t in a convenient location, or define it as a char
typedef unsigned short WCHAR; // wc, 16-bit UNICODE character
#endif
typedef WCHAR *PWCHAR;
typedef WCHAR *LPWCH, *PWCH;
typedef CONST WCHAR *LPCWCH, *PCWCH;
typedef WCHAR *NWPSTR;
typedef WCHAR *LPWSTR, *PWSTR;
typedef WCHAR UNALIGNED *LPUWSTR, *PUWSTR;
typedef CONST WCHAR *LPCWSTR, *PCWSTR;
typedef CONST WCHAR UNALIGNED *LPCUWSTR, *PCUWSTR;
//
// ANSI (Multi-byte Character) types
//
typedef CHAR *PCHAR;
typedef CHAR *LPCH, *PCH;
typedef CONST CHAR *LPCCH, *PCCH;
typedef CHAR *NPSTR;
typedef CHAR *LPSTR, *PSTR;
typedef CONST CHAR *LPCSTR, *PCSTR;
//
// Neutral ANSI/UNICODE types and macros
//
#ifdef UNICODE // r_winnt
#ifndef _TCHAR_DEFINED
typedef WCHAR TCHAR, *PTCHAR;
typedef WCHAR TUCHAR, *PTUCHAR;
#define _TCHAR_DEFINED
#endif /* !_TCHAR_DEFINED */
typedef LPWSTR LPTCH, PTCH;
typedef LPWSTR PTSTR, LPTSTR;
typedef LPCWSTR PCTSTR, LPCTSTR;
typedef LPUWSTR PUTSTR, LPUTSTR;
typedef LPCUWSTR PCUTSTR, LPCUTSTR;
typedef LPWSTR LP;
#define __TEXT(quote) L##quote // r_winnt
#else /* UNICODE */ // r_winnt
#ifndef _TCHAR_DEFINED
typedef char TCHAR, *PTCHAR;
typedef unsigned char TUCHAR, *PTUCHAR;
#define _TCHAR_DEFINED
#endif /* !_TCHAR_DEFINED */
typedef LPSTR LPTCH, PTCH;
typedef LPSTR PTSTR, LPTSTR, PUTSTR, LPUTSTR;
typedef LPCSTR PCTSTR, LPCTSTR, PCUTSTR, LPCUTSTR;
#define __TEXT(quote) quote // r_winnt
#endif /* UNICODE */ // r_winnt
#define TEXT(quote) __TEXT(quote) // r_winnt
// end_winnt
typedef double DOUBLE;
typedef struct _QUAD { // QUAD is for those times we want
double DoNotUseThisField; // an 8 byte aligned 8 byte long structure
} QUAD; // which is NOT really a floating point
// number. Use DOUBLE if you want an FP
// number.
//
// Pointer to Basics
//
typedef SHORT *PSHORT; // winnt
typedef LONG *PLONG; // winnt
typedef QUAD *PQUAD;
//
// Unsigned Basics
//
// Tell windef.h that some types are already defined.
#define BASETYPES
typedef unsigned char UCHAR;
typedef unsigned short USHORT;
typedef unsigned long ULONG;
typedef QUAD UQUAD;
//
// Pointer to Unsigned Basics
//
typedef UCHAR *PUCHAR;
typedef USHORT *PUSHORT;
typedef ULONG *PULONG;
typedef UQUAD *PUQUAD;
//
// Signed characters
//
typedef signed char SCHAR;
typedef SCHAR *PSCHAR;
#ifndef NO_STRICT
#ifndef STRICT
#define STRICT 1
#endif
#endif
//
// Handle to an Object
//
// begin_winnt
#ifdef STRICT
typedef void *HANDLE;
#define DECLARE_HANDLE(name) struct name##__ { int unused; }; typedef struct name##__ *name
#else
typedef PVOID HANDLE;
#define DECLARE_HANDLE(name) typedef HANDLE name
#endif
typedef HANDLE *PHANDLE;
//
// Flag (bit) fields
//
typedef UCHAR FCHAR;
typedef USHORT FSHORT;
typedef ULONG FLONG;
// Component Object Model defines, and macros
#ifndef _HRESULT_DEFINED
#define _HRESULT_DEFINED
typedef LONG HRESULT;
#endif // !_HRESULT_DEFINED
#ifdef __cplusplus
#define EXTERN_C extern "C"
#else
#define EXTERN_C extern
#endif
#if defined(_WIN32) || defined(_MPPC_)
// Win32 doesn't support __export
#ifdef _68K_
#define STDMETHODCALLTYPE __cdecl
#else
#define STDMETHODCALLTYPE __stdcall
#endif
#define STDMETHODVCALLTYPE __cdecl
#define STDAPICALLTYPE __stdcall
#define STDAPIVCALLTYPE __cdecl
#else
#define STDMETHODCALLTYPE __export __stdcall
#define STDMETHODVCALLTYPE __export __cdecl
#define STDAPICALLTYPE __export __stdcall
#define STDAPIVCALLTYPE __export __cdecl
#endif
#define STDAPI EXTERN_C HRESULT STDAPICALLTYPE
#define STDAPI_(type) EXTERN_C type STDAPICALLTYPE
#define STDMETHODIMP HRESULT STDMETHODCALLTYPE
#define STDMETHODIMP_(type) type STDMETHODCALLTYPE
// The 'V' versions allow Variable Argument lists.
#define STDAPIV EXTERN_C HRESULT STDAPIVCALLTYPE
#define STDAPIV_(type) EXTERN_C type STDAPIVCALLTYPE
#define STDMETHODIMPV HRESULT STDMETHODVCALLTYPE
#define STDMETHODIMPV_(type) type STDMETHODVCALLTYPE
// end_winnt
//
// Low order two bits of a handle are ignored by the system and available
// for use by application code as tag bits. The remaining bits are opaque
// and used to store a serial number and table index.
//
#define OBJ_HANDLE_TAGBITS 0x00000003L
//
// Cardinal Data Types [0 - 2**N-2)
//
typedef char CCHAR; // winnt
typedef short CSHORT;
typedef ULONG CLONG;
typedef CCHAR *PCCHAR;
typedef CSHORT *PCSHORT;
typedef CLONG *PCLONG;
//
// NTSTATUS
//
typedef LONG NTSTATUS;
/*lint -save -e624 */ // Don't complain about different typedefs.
typedef NTSTATUS *PNTSTATUS;
/*lint -restore */ // Resume checking for different typedefs.
//
// Status values are 32 bit values layed out as follows:
//
// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
// +---+-+-------------------------+-------------------------------+
// |Sev|C| Facility | Code |
// +---+-+-------------------------+-------------------------------+
//
// where
//
// Sev - is the severity code
//
// 00 - Success
// 01 - Informational
// 10 - Warning
// 11 - Error
//
// C - is the Customer code flag
//
// Facility - is the facility code
//
// Code - is the facility's status code
//
//
// Generic test for success on any status value (non-negative numbers
// indicate success).
//
#define NT_SUCCESS(Status) ((NTSTATUS)(Status) >= 0)
//
// Generic test for information on any status value.
//
#define NT_INFORMATION(Status) ((ULONG)(Status) >> 30 == 1)
//
// Generic test for warning on any status value.
//
#define NT_WARNING(Status) ((ULONG)(Status) >> 30 == 2)
//
// Generic test for error on any status value.
//
#define NT_ERROR(Status) ((ULONG)(Status) >> 30 == 3)
// end_windbgkd
// begin_winnt
#define APPLICATION_ERROR_MASK 0x20000000
#define ERROR_SEVERITY_SUCCESS 0x00000000
#define ERROR_SEVERITY_INFORMATIONAL 0x40000000
#define ERROR_SEVERITY_WARNING 0x80000000
#define ERROR_SEVERITY_ERROR 0xC0000000
// end_winnt
#ifndef __SECSTATUS_DEFINED__
typedef long SECURITY_STATUS;
#define __SECSTATUS_DEFINED__
#endif
//
// __int64 is only supported by 2.0 and later midl.
// __midl is set by the 2.0 midl and not by 1.0 midl.
//
#define _ULONGLONG_
#if (!defined (_MAC) && (!defined(MIDL_PASS) || defined(__midl)) && (!defined(_M_IX86) || (defined(_INTEGRAL_MAX_BITS) && _INTEGRAL_MAX_BITS >= 64)))
typedef __int64 LONGLONG;
typedef unsigned __int64 ULONGLONG;
#define MAXLONGLONG (0x7fffffffffffffff)
#else
#if defined(_MAC) && defined(_MAC_INT_64)
typedef __int64 LONGLONG;
typedef unsigned __int64 ULONGLONG;
#define MAXLONGLONG (0x7fffffffffffffff)
#else
typedef double LONGLONG;
typedef double ULONGLONG;
#endif //_MAC and int64
#endif
typedef LONGLONG *PLONGLONG;
typedef ULONGLONG *PULONGLONG;
// Update Sequence Number
typedef LONGLONG USN;
#if defined(MIDL_PASS)
typedef struct _LARGE_INTEGER {
#else // MIDL_PASS
typedef union _LARGE_INTEGER {
struct {
ULONG LowPart;
LONG HighPart;
};
struct {
ULONG LowPart;
LONG HighPart;
} u;
#endif //MIDL_PASS
LONGLONG QuadPart;
} LARGE_INTEGER;
typedef LARGE_INTEGER *PLARGE_INTEGER;
#if defined(MIDL_PASS)
typedef struct _ULARGE_INTEGER {
#else // MIDL_PASS
typedef union _ULARGE_INTEGER {
struct {
ULONG LowPart;
ULONG HighPart;
};
struct {
ULONG LowPart;
ULONG HighPart;
} u;
#endif //MIDL_PASS
ULONGLONG QuadPart;
} ULARGE_INTEGER;
typedef ULARGE_INTEGER *PULARGE_INTEGER;
//
// Physical address.
//
typedef LARGE_INTEGER PHYSICAL_ADDRESS, *PPHYSICAL_ADDRESS;
//
// Counted String
//
typedef USHORT RTL_STRING_LENGTH_TYPE;
typedef struct _STRING {
USHORT Length;
USHORT MaximumLength;
#ifdef MIDL_PASS
[size_is(MaximumLength), length_is(Length) ]
#endif // MIDL_PASS
PCHAR Buffer;
} STRING;
typedef STRING *PSTRING;
typedef STRING ANSI_STRING;
typedef PSTRING PANSI_STRING;
typedef STRING OEM_STRING;
typedef PSTRING POEM_STRING;
typedef CONST STRING* PCOEM_STRING;
//
// CONSTCounted String
//
typedef struct _CSTRING {
USHORT Length;
USHORT MaximumLength;
CONST char *Buffer;
} CSTRING;
typedef CSTRING *PCSTRING;
#define ANSI_NULL ((CHAR)0) // winnt
typedef STRING CANSI_STRING;
typedef PSTRING PCANSI_STRING;
//
// Unicode strings are counted 16-bit character strings. If they are
// NULL terminated, Length does not include trailing NULL.
//
typedef struct _UNICODE_STRING {
USHORT Length;
USHORT MaximumLength;
#ifdef MIDL_PASS
[size_is(MaximumLength / 2), length_is((Length) / 2) ] USHORT * Buffer;
#else // MIDL_PASS
PWSTR Buffer;
#endif // MIDL_PASS
} UNICODE_STRING;
typedef UNICODE_STRING *PUNICODE_STRING;
typedef const UNICODE_STRING *PCUNICODE_STRING;
#define UNICODE_NULL ((WCHAR)0) // winnt
#if _WIN32_WINNT >= 0x0501
#define UNICODE_STRING_MAX_BYTES ((USHORT) 65534) // winnt
#define UNICODE_STRING_MAX_CHARS (32767) // winnt
#define DECLARE_CONST_UNICODE_STRING(_variablename, _string) \
const WCHAR _variablename ## _buffer[] = _string; \
const UNICODE_STRING _variablename = { sizeof(_string) - sizeof(WCHAR), sizeof(_string), (PWSTR) _variablename ## _buffer };
#endif // _WIN32_WINNT >= 0x0501
// begin_ntminiport begin_ntminitape
//
// Boolean
//
typedef UCHAR BOOLEAN; // winnt
typedef BOOLEAN *PBOOLEAN; // winnt
// end_ntminiport end_ntminitape
// begin_winnt
//
// Doubly linked list structure. Can be used as either a list head, or
// as link words.
//
typedef struct _LIST_ENTRY {
struct _LIST_ENTRY *Flink;
struct _LIST_ENTRY *Blink;
} LIST_ENTRY, *PLIST_ENTRY, *RESTRICTED_POINTER PRLIST_ENTRY;
//
// Singly linked list structure. Can be used as either a list head, or
// as link words.
//
typedef struct _SINGLE_LIST_ENTRY {
struct _SINGLE_LIST_ENTRY *Next;
} SINGLE_LIST_ENTRY, *PSINGLE_LIST_ENTRY;
//
// Constants
//
#define FALSE 0
#define TRUE 1
#ifndef NULL
#ifdef __cplusplus
#define NULL 0
#define NULL64 0
#else
#define NULL ((void *)0)
#define NULL64 ((void * POINTER_64)0)
#endif
#endif // NULL
#include <guiddef.h>
#ifndef __OBJECTID_DEFINED
#define __OBJECTID_DEFINED
typedef struct _OBJECTID { // size is 20
GUID Lineage;
ULONG Uniquifier;
} OBJECTID;
#endif // !_OBJECTID_DEFINED
//
// Determine if an argument is present by testing the value of the pointer
// to the argument value.
//
#define ARGUMENT_PRESENT(ArgumentPointer) (\
(CHAR *)(ArgumentPointer) != (CHAR *)(NULL) )
// begin_winnt begin_ntminiport
//
// Calculate the byte offset of a field in a structure of type type.
//
#define FIELD_OFFSET(type, field) ((LONG)(LONG_PTR)&(((type *)0)->field))
#if(_WIN32_WINNT > 0x0500)
//
// Calculate the size of a field in a structure of type type, without
// knowing or stating the type of the field.
//
#define RTL_FIELD_SIZE(type, field) (sizeof(((type *)0)->field))
//
// Calculate the size of a structure of type type up through and
// including a field.
//
#define RTL_SIZEOF_THROUGH_FIELD(type, field) \
(FIELD_OFFSET(type, field) + RTL_FIELD_SIZE(type, field))
//
// RTL_CONTAINS_FIELD usage:
//
// if (RTL_CONTAINS_FIELD(pBlock, pBlock->cbSize, dwMumble)) { // safe to use pBlock->dwMumble
//
#define RTL_CONTAINS_FIELD(Struct, Size, Field) \
( (((PCHAR)(&(Struct)->Field)) + sizeof((Struct)->Field)) <= (((PCHAR)(Struct))+(Size)) )
//
// Return the number of elements in a statically sized array.
// ULONG Buffer[100];
// RTL_NUMBER_OF(Buffer) == 100
// This is also popularly known as: NUMBER_OF, ARRSIZE, _countof, NELEM, etc.
//
#define RTL_NUMBER_OF(A) (sizeof(A)/sizeof((A)[0]))
//
// An expression that yields the type of a field in a struct.
//
#define RTL_FIELD_TYPE(type, field) (((type*)0)->field)
// RTL_ to avoid collisions in the global namespace.
//
// Given typedef struct _FOO { BYTE Bar[123]; } FOO;
// RTL_NUMBER_OF_FIELD(FOO, Bar) == 123
//
#define RTL_NUMBER_OF_FIELD(type, field) (RTL_NUMBER_OF(RTL_FIELD_TYPE(type, field)))
//
// eg:
// typedef struct FOO {
// ULONG Integer;
// PVOID Pointer;
// } FOO;
//
// RTL_PADDING_BETWEEN_FIELDS(FOO, Integer, Pointer) == 0 for Win32, 4 for Win64
//
#define RTL_PADDING_BETWEEN_FIELDS(T, F1, F2) \
((FIELD_OFFSET(T, F2) > FIELD_OFFSET(T, F1)) \
? (FIELD_OFFSET(T, F2) - FIELD_OFFSET(T, F1) - RTL_FIELD_SIZE(T, F1)) \
: (FIELD_OFFSET(T, F1) - FIELD_OFFSET(T, F2) - RTL_FIELD_SIZE(T, F2)))
// RTL_ to avoid collisions in the global namespace.
#if defined(__cplusplus)
#define RTL_CONST_CAST(type) const_cast<type>
#else
#define RTL_CONST_CAST(type) (type)
#endif
// end_winnt
//
// This works "generically" for Unicode and Ansi/Oem strings.
// Usage:
// const static UNICODE_STRING FooU = RTL_CONSTANT_STRING(L"Foo");
// const static STRING Foo = RTL_CONSTANT_STRING( "Foo");
// instead of the slower:
// UNICODE_STRING FooU;
// STRING Foo;
// RtlInitUnicodeString(&FooU, L"Foo");
// RtlInitString(&Foo , "Foo");
//
#define RTL_CONSTANT_STRING(s) { sizeof( s ) - sizeof( (s)[0] ), sizeof( s ), s }
// begin_winnt
// like sizeof
// usually this would be * CHAR_BIT, but we don't necessarily have #include <limits.h>
#define RTL_BITS_OF(sizeOfArg) (sizeof(sizeOfArg) * 8)
#define RTL_BITS_OF_FIELD(type, field) (RTL_BITS_OF(RTL_FIELD_TYPE(type, field)))
#endif /* _WIN32_WINNT > 0x0500 */
//
// Calculate the address of the base of the structure given its type, and an
// address of a field within the structure.
//
#define CONTAINING_RECORD(address, type, field) ((type *)( \
(PCHAR)(address) - \
(ULONG_PTR)(&((type *)0)->field)))
//
// Interrupt Request Level (IRQL)
//
typedef UCHAR KIRQL;
typedef KIRQL *PKIRQL;
//
// Macros used to eliminate compiler warning generated when formal
// parameters or local variables are not declared.
//
// Use DBG_UNREFERENCED_PARAMETER() when a parameter is not yet
// referenced but will be once the module is completely developed.
//
// Use DBG_UNREFERENCED_LOCAL_VARIABLE() when a local variable is not yet
// referenced but will be once the module is completely developed.
//
// Use UNREFERENCED_PARAMETER() if a parameter will never be referenced.
//
// DBG_UNREFERENCED_PARAMETER and DBG_UNREFERENCED_LOCAL_VARIABLE will
// eventually be made into a null macro to help determine whether there
// is unfinished work.
//
#if ! defined(lint)
#define UNREFERENCED_PARAMETER(P) (P)
#define DBG_UNREFERENCED_PARAMETER(P) (P)
#define DBG_UNREFERENCED_LOCAL_VARIABLE(V) (V)
#else // lint
// Note: lint -e530 says don't complain about uninitialized variables for
// this varible. Error 527 has to do with unreachable code.
// -restore restores checking to the -save state
#define UNREFERENCED_PARAMETER(P) \
/*lint -save -e527 -e530 */ \
{ \
(P) = (P); \
} \
/*lint -restore */
#define DBG_UNREFERENCED_PARAMETER(P) \
/*lint -save -e527 -e530 */ \
{ \
(P) = (P); \
} \
/*lint -restore */
#define DBG_UNREFERENCED_LOCAL_VARIABLE(V) \
/*lint -save -e527 -e530 */ \
{ \
(V) = (V); \
} \
/*lint -restore */
#endif // lint
//
// Macro used to eliminate compiler warning 4715 within a switch statement
// when all possible cases have already been accounted for.
//
// switch (a & 3) {
// case 0: return 1;
// case 1: return Foo();
// case 2: return Bar();
// case 3: return 1;
// DEFAULT_UNREACHABLE;
//
#if (_MSC_VER > 1200)
#define DEFAULT_UNREACHABLE default: __assume(0)
#else
//
// Older compilers do not support __assume(), and there is no other free
// method of eliminating the warning.
//
#define DEFAULT_UNREACHABLE
#endif
// end_winnt
//
// Define standard min and max macros
//
#ifndef NOMINMAX
#ifndef min
#define min(a,b) (((a) < (b)) ? (a) : (b))
#endif
#ifndef max
#define max(a,b) (((a) > (b)) ? (a) : (b))
#endif
#endif // NOMINMAX
//
// Processor modes.
//
typedef CCHAR KPROCESSOR_MODE;
typedef enum _MODE {
KernelMode,
UserMode,
MaximumMode
} MODE;
//
// DPC routine
//
struct _KDPC;
typedef
VOID
(*PKDEFERRED_ROUTINE) (
IN struct _KDPC *Dpc,
IN PVOID DeferredContext,
IN PVOID SystemArgument1,
IN PVOID SystemArgument2
);
//
// Define DPC importance.
//
// LowImportance - Queue DPC at end of target DPC queue.
// MediumImportance - Queue DPC at end of target DPC queue.
// HighImportance - Queue DPC at front of target DPC DPC queue.
//
// If there is currently a DPC active on the target processor, or a DPC
// interrupt has already been requested on the target processor when a
// DPC is queued, then no further action is necessary. The DPC will be
// executed on the target processor when its queue entry is processed.
//
// If there is not a DPC active on the target processor and a DPC interrupt
// has not been requested on the target processor, then the exact treatment
// of the DPC is dependent on whether the host system is a UP system or an
// MP system.
//
// UP system.
//
// If the DPC is of medium or high importance, the current DPC queue depth
// is greater than the maximum target depth, or current DPC request rate is
// less the minimum target rate, then a DPC interrupt is requested on the
// host processor and the DPC will be processed when the interrupt occurs.
// Otherwise, no DPC interupt is requested and the DPC execution will be
// delayed until the DPC queue depth is greater that the target depth or the
// minimum DPC rate is less than the target rate.
//
// MP system.
//
// If the DPC is being queued to another processor and the depth of the DPC
// queue on the target processor is greater than the maximum target depth or
// the DPC is of high importance, then a DPC interrupt is requested on the
// target processor and the DPC will be processed when the interrupt occurs.
// Otherwise, the DPC execution will be delayed on the target processor until
// the DPC queue depth on the target processor is greater that the maximum
// target depth or the minimum DPC rate on the target processor is less than
// the target mimimum rate.
//
// If the DPC is being queued to the current processor and the DPC is not of
// low importance, the current DPC queue depth is greater than the maximum
// target depth, or the minimum DPC rate is less than the minimum target rate,
// then a DPC interrupt is request on the current processor and the DPV will
// be processed whne the interrupt occurs. Otherwise, no DPC interupt is
// requested and the DPC execution will be delayed until the DPC queue depth
// is greater that the target depth or the minimum DPC rate is less than the
// target rate.
//
typedef enum _KDPC_IMPORTANCE {
LowImportance,
MediumImportance,
HighImportance
} KDPC_IMPORTANCE;
//
// Deferred Procedure Call (DPC) object
//
typedef struct _KDPC {
CSHORT Type;
UCHAR Number;
UCHAR Importance;
LIST_ENTRY DpcListEntry;
PKDEFERRED_ROUTINE DeferredRoutine;
PVOID DeferredContext;
PVOID SystemArgument1;
PVOID SystemArgument2;
PULONG_PTR Lock;
} KDPC, *PKDPC, *RESTRICTED_POINTER PRKDPC;
//
// Interprocessor interrupt worker routine function prototype.
//
typedef PVOID PKIPI_CONTEXT;
typedef
VOID
(*PKIPI_WORKER)(
IN PKIPI_CONTEXT PacketContext,
IN PVOID Parameter1,
IN PVOID Parameter2,
IN PVOID Parameter3
);
//
// Define interprocessor interrupt performance counters.
//
typedef struct _KIPI_COUNTS {
ULONG Freeze;
ULONG Packet;
ULONG DPC;
ULONG APC;
ULONG FlushSingleTb;
ULONG FlushMultipleTb;
ULONG FlushEntireTb;
ULONG GenericCall;
ULONG ChangeColor;
ULONG SweepDcache;
ULONG SweepIcache;
ULONG SweepIcacheRange;
ULONG FlushIoBuffers;
ULONG GratuitousDPC;
} KIPI_COUNTS, *PKIPI_COUNTS;
#if defined(NT_UP)
#define HOT_STATISTIC(a) a
#else
#define HOT_STATISTIC(a) (KeGetCurrentPrcb()->a)
#endif
//
// I/O system definitions.
//
// Define a Memory Descriptor List (MDL)
//
// An MDL describes pages in a virtual buffer in terms of physical pages. The
// pages associated with the buffer are described in an array that is allocated
// just after the MDL header structure itself. In a future compiler this will
// be placed at:
//
// ULONG Pages[];
//
// Until this declaration is permitted, however, one simply calculates the
// base of the array by adding one to the base MDL pointer:
//
// Pages = (PULONG) (Mdl + 1);
//
// Notice that while in the context of the subject thread, the base virtual
// address of a buffer mapped by an MDL may be referenced using the following:
//
// Mdl->StartVa | Mdl->ByteOffset
//
typedef struct _MDL {
struct _MDL *Next;
CSHORT Size;
CSHORT MdlFlags;
struct _EPROCESS *Process;
PVOID MappedSystemVa;
PVOID StartVa;
ULONG ByteCount;
ULONG ByteOffset;
} MDL, *PMDL;
#define MDL_MAPPED_TO_SYSTEM_VA 0x0001
#define MDL_PAGES_LOCKED 0x0002
#define MDL_SOURCE_IS_NONPAGED_POOL 0x0004
#define MDL_ALLOCATED_FIXED_SIZE 0x0008
#define MDL_PARTIAL 0x0010
#define MDL_PARTIAL_HAS_BEEN_MAPPED 0x0020
#define MDL_IO_PAGE_READ 0x0040
#define MDL_WRITE_OPERATION 0x0080
#define MDL_PARENT_MAPPED_SYSTEM_VA 0x0100
#define MDL_FREE_EXTRA_PTES 0x0200
#define MDL_IO_SPACE 0x0800
#define MDL_NETWORK_HEADER 0x1000
#define MDL_MAPPING_CAN_FAIL 0x2000
#define MDL_ALLOCATED_MUST_SUCCEED 0x4000
#define MDL_MAPPING_FLAGS (MDL_MAPPED_TO_SYSTEM_VA | \
MDL_PAGES_LOCKED | \
MDL_SOURCE_IS_NONPAGED_POOL | \
MDL_PARTIAL_HAS_BEEN_MAPPED | \
MDL_PARENT_MAPPED_SYSTEM_VA | \
MDL_SYSTEM_VA | \
MDL_IO_SPACE )
#define NTKERNELAPI DECLSPEC_IMPORT
#define NTHALAPI DECLSPEC_IMPORT
//
// Common dispatcher object header
//
// N.B. The size field contains the number of dwords in the structure.
//
typedef struct _DISPATCHER_HEADER {
UCHAR Type;
UCHAR Absolute;
UCHAR Size;
UCHAR Inserted;
LONG SignalState;
LIST_ENTRY WaitListHead;
} DISPATCHER_HEADER;
//
// Event object
//
typedef struct _KEVENT {
DISPATCHER_HEADER Header;
} KEVENT, *PKEVENT, *RESTRICTED_POINTER PRKEVENT;
//
// Timer object
//
typedef struct _KTIMER {
DISPATCHER_HEADER Header;
ULARGE_INTEGER DueTime;
LIST_ENTRY TimerListEntry;
struct _KDPC *Dpc;
LONG Period;
} KTIMER, *PKTIMER, *RESTRICTED_POINTER PRKTIMER;
typedef ULONG_PTR KSPIN_LOCK;
typedef KSPIN_LOCK *PKSPIN_LOCK;
//
// Define the I/O bus interface types.
//
typedef enum _INTERFACE_TYPE {
InterfaceTypeUndefined = -1,
Internal,
Isa,
Eisa,
MicroChannel,
TurboChannel,
PCIBus,
VMEBus,
NuBus,
PCMCIABus,
CBus,
MPIBus,
MPSABus,
ProcessorInternal,
InternalPowerBus,
PNPISABus,
PNPBus,
MaximumInterfaceType
}INTERFACE_TYPE, *PINTERFACE_TYPE;
//
// Define the DMA transfer widths.
//
typedef enum _DMA_WIDTH {
Width8Bits,
Width16Bits,
Width32Bits,
MaximumDmaWidth
}DMA_WIDTH, *PDMA_WIDTH;
//
// Define DMA transfer speeds.
//
typedef enum _DMA_SPEED {
Compatible,
TypeA,
TypeB,
TypeC,
TypeF,
MaximumDmaSpeed
}DMA_SPEED, *PDMA_SPEED;
//
// Define Interface reference/dereference routines for
// Interfaces exported by IRP_MN_QUERY_INTERFACE
//
typedef VOID (*PINTERFACE_REFERENCE)(PVOID Context);
typedef VOID (*PINTERFACE_DEREFERENCE)(PVOID Context);
// end_wdm
//
// Define types of bus information.
//
typedef enum _BUS_DATA_TYPE {
ConfigurationSpaceUndefined = -1,
Cmos,
EisaConfiguration,
Pos,
CbusConfiguration,
PCIConfiguration,
VMEConfiguration,
NuBusConfiguration,
PCMCIAConfiguration,
MPIConfiguration,
MPSAConfiguration,
PNPISAConfiguration,
SgiInternalConfiguration,
MaximumBusDataType
} BUS_DATA_TYPE, *PBUS_DATA_TYPE;
#ifndef _SLIST_HEADER_
#define _SLIST_HEADER_
#define SLIST_ENTRY SINGLE_LIST_ENTRY
#define _SLIST_ENTRY _SINGLE_LIST_ENTRY
#define PSLIST_ENTRY PSINGLE_LIST_ENTRY
#if defined(_WIN64)
typedef struct DECLSPEC_ALIGN(16) _SLIST_HEADER {
ULONGLONG Alignment;
ULONGLONG Region;
} SLIST_HEADER;
typedef struct _SLIST_HEADER *PSLIST_HEADER;
#else
typedef union _SLIST_HEADER {
ULONGLONG Alignment;
struct {
SLIST_ENTRY Next;
USHORT Depth;
USHORT Sequence;
};
} SLIST_HEADER, *PSLIST_HEADER;
#endif
#endif
//
// If debugging support enabled, define an ASSERT macro that works. Otherwise
// define the ASSERT macro to expand to an empty expression.
//
// The ASSERT macro has been updated to be an expression instead of a statement.
//
#if DBG
NTSYSAPI
VOID
NTAPI
RtlAssert(
PVOID FailedAssertion,
PVOID FileName,
ULONG LineNumber,
PCHAR Message
);
#define ASSERT( exp ) \
((!(exp)) ? \
(RtlAssert( #exp, __FILE__, __LINE__, NULL ),FALSE) : \
TRUE)
#define ASSERTMSG( msg, exp ) \
((!(exp)) ? \
(RtlAssert( #exp, __FILE__, __LINE__, msg ),FALSE) : \
TRUE)
#define RTL_SOFT_ASSERT(_exp) \
((!(_exp)) ? \
(DbgPrint("%s(%d): Soft assertion failed\n Expression: %s\n", __FILE__, __LINE__, #_exp),FALSE) : \
TRUE)
#define RTL_SOFT_ASSERTMSG(_msg, _exp) \
((!(_exp)) ? \
(DbgPrint("%s(%d): Soft assertion failed\n Expression: %s\n Message: %s\n", __FILE__, __LINE__, #_exp, (_msg)),FALSE) : \
TRUE)
#define RTL_VERIFY( exp ) ASSERT(exp)
#define RTL_VERIFYMSG( msg, exp ) ASSERT(msg, exp)
#define RTL_SOFT_VERIFY(_exp) RTL_SOFT_ASSERT(_exp)
#define RTL_SOFT_VERIFYMSG(_msg, _exp) RTL_SOFT_ASSERTMSG(_msg, _exp)
#else
#define ASSERT( exp ) ((void) 0)
#define ASSERTMSG( msg, exp ) ((void) 0)
#define RTL_SOFT_ASSERT(_exp) ((void) 0)
#define RTL_SOFT_ASSERTMSG(_msg, _exp) ((void) 0)
#define RTL_VERIFY( exp ) ((exp) ? TRUE : FALSE)
#define RTL_VERIFYMSG( msg, exp ) ((exp) ? TRUE : FALSE)
#define RTL_SOFT_VERIFY(_exp) ((_exp) ? TRUE : FALSE)
#define RTL_SOFT_VERIFYMSG(msg, _exp) ((_exp) ? TRUE : FALSE)
#endif // DBG
//
// Doubly-linked list manipulation routines.
//
//
// VOID
// InitializeListHead32(
// PLIST_ENTRY32 ListHead
// );
//
#define InitializeListHead32(ListHead) (\
(ListHead)->Flink = (ListHead)->Blink = PtrToUlong((ListHead)))
#if !defined(MIDL_PASS) && !defined(SORTPP_PASS)
VOID
FORCEINLINE
InitializeListHead(
IN PLIST_ENTRY ListHead
)
{
ListHead->Flink = ListHead->Blink = ListHead;
}
//
// BOOLEAN
// IsListEmpty(
// PLIST_ENTRY ListHead
// );
//
#define IsListEmpty(ListHead) \
((ListHead)->Flink == (ListHead))
VOID
FORCEINLINE
RemoveEntryList(
IN PLIST_ENTRY Entry
)
{
PLIST_ENTRY Blink;
PLIST_ENTRY Flink;
Flink = Entry->Flink;
Blink = Entry->Blink;
Blink->Flink = Flink;
Flink->Blink = Blink;
}
PLIST_ENTRY
FORCEINLINE
RemoveHeadList(
IN PLIST_ENTRY ListHead
)
{
PLIST_ENTRY Flink;
PLIST_ENTRY Entry;
Entry = ListHead->Flink;
Flink = Entry->Flink;
ListHead->Flink = Flink;
Flink->Blink = ListHead;
return Entry;
}
PLIST_ENTRY
FORCEINLINE
RemoveTailList(
IN PLIST_ENTRY ListHead
)
{
PLIST_ENTRY Blink;
PLIST_ENTRY Entry;
Entry = ListHead->Blink;
Blink = Entry->Blink;
ListHead->Blink = Blink;
Blink->Flink = ListHead;
return Entry;
}
VOID
FORCEINLINE
InsertTailList(
IN PLIST_ENTRY ListHead,
IN PLIST_ENTRY Entry
)
{
PLIST_ENTRY Blink;
Blink = ListHead->Blink;
Entry->Flink = ListHead;
Entry->Blink = Blink;
Blink->Flink = Entry;
ListHead->Blink = Entry;
}
VOID
FORCEINLINE
InsertHeadList(
IN PLIST_ENTRY ListHead,
IN PLIST_ENTRY Entry
)
{
PLIST_ENTRY Flink;
Flink = ListHead->Flink;
Entry->Flink = Flink;
Entry->Blink = ListHead;
Flink->Blink = Entry;
ListHead->Flink = Entry;
}
//
//
// PSINGLE_LIST_ENTRY
// PopEntryList(
// PSINGLE_LIST_ENTRY ListHead
// );
//
#define PopEntryList(ListHead) \
(ListHead)->Next;\
{\
PSINGLE_LIST_ENTRY FirstEntry;\
FirstEntry = (ListHead)->Next;\
if (FirstEntry != NULL) { \
(ListHead)->Next = FirstEntry->Next;\
} \
}
//
// VOID
// PushEntryList(
// PSINGLE_LIST_ENTRY ListHead,
// PSINGLE_LIST_ENTRY Entry
// );
//
#define PushEntryList(ListHead,Entry) \
(Entry)->Next = (ListHead)->Next; \
(ListHead)->Next = (Entry)
#endif // !MIDL_PASS
#if defined (_MSC_VER) && ( _MSC_VER >= 900 )
PVOID
_ReturnAddress (
VOID
);
#pragma intrinsic(_ReturnAddress)
#endif
#if (defined(_M_AMD64) || defined(_M_IA64)) && !defined(_REALLY_GET_CALLERS_CALLER_)
#define RtlGetCallersAddress(CallersAddress, CallersCaller) \
*CallersAddress = (PVOID)_ReturnAddress(); \
*CallersCaller = NULL;
#else
NTSYSAPI
VOID
NTAPI
RtlGetCallersAddress(
OUT PVOID *CallersAddress,
OUT PVOID *CallersCaller
);
#endif
NTSYSAPI
ULONG
NTAPI
RtlWalkFrameChain (
OUT PVOID *Callers,
IN ULONG Count,
IN ULONG Flags
);
NTSYSAPI
NTSTATUS
NTAPI
RtlUnicodeStringToAnsiString(
PANSI_STRING DestinationString,
PCUNICODE_STRING SourceString,
BOOLEAN AllocateDestinationString
);
NTSYSAPI
LONG
NTAPI
RtlCompareUnicodeString(
PCUNICODE_STRING String1,
PCUNICODE_STRING String2,
BOOLEAN CaseInSensitive
);
NTSYSAPI
BOOLEAN
NTAPI
RtlEqualUnicodeString(
const UNICODE_STRING *String1,
const UNICODE_STRING *String2,
BOOLEAN CaseInSensitive
);
#define HASH_STRING_ALGORITHM_DEFAULT (0)
#define HASH_STRING_ALGORITHM_X65599 (1)
#define HASH_STRING_ALGORITHM_INVALID (0xffffffff)
NTSYSAPI
NTSTATUS
NTAPI
RtlHashUnicodeString(
IN const UNICODE_STRING *String,
IN BOOLEAN CaseInSensitive,
IN ULONG HashAlgorithm,
OUT PULONG HashValue
);
NTSYSAPI
BOOLEAN
NTAPI
RtlPrefixUnicodeString(
IN PUNICODE_STRING String1,
IN PUNICODE_STRING String2,
IN BOOLEAN CaseInSensitive
);
NTSYSAPI
NTSTATUS
NTAPI
RtlUpcaseUnicodeString(
PUNICODE_STRING DestinationString,
PCUNICODE_STRING SourceString,
BOOLEAN AllocateDestinationString
);
NTSYSAPI
VOID
NTAPI
RtlCopyUnicodeString(
PUNICODE_STRING DestinationString,
PCUNICODE_STRING SourceString
);
NTSYSAPI
NTSTATUS
NTAPI
RtlAppendUnicodeStringToString (
PUNICODE_STRING Destination,
PCUNICODE_STRING Source
);
NTSYSAPI
NTSTATUS
NTAPI
RtlAppendUnicodeToString (
PUNICODE_STRING Destination,
PCWSTR Source
);
NTSYSAPI
SIZE_T
NTAPI
RtlCompareMemory (
const VOID *Source1,
const VOID *Source2,
SIZE_T Length
);
#if defined(_M_AMD64) || defined(_M_IA64)
#define RtlEqualMemory(Source1, Source2, Length) \
((Length) == RtlCompareMemory(Source1, Source2, Length))
NTSYSAPI
VOID
NTAPI
RtlCopyMemory (
VOID UNALIGNED *Destination,
CONST VOID UNALIGNED *Source,
SIZE_T Length
);
#if !defined(_M_AMD64)
NTSYSAPI
VOID
NTAPI
RtlCopyMemory32 (
VOID UNALIGNED *Destination,
CONST VOID UNALIGNED *Source,
ULONG Length
);
#endif
NTSYSAPI
VOID
NTAPI
RtlMoveMemory (
VOID UNALIGNED *Destination,
CONST VOID UNALIGNED *Source,
SIZE_T Length
);
NTSYSAPI
VOID
NTAPI
RtlFillMemory (
VOID UNALIGNED *Destination,
SIZE_T Length,
UCHAR Fill
);
NTSYSAPI
VOID
NTAPI
RtlZeroMemory (
VOID UNALIGNED *Destination,
SIZE_T Length
);
#else
#define RtlEqualMemory(Destination,Source,Length) (!memcmp((Destination),(Source),(Length)))
#define RtlMoveMemory(Destination,Source,Length) memmove((Destination),(Source),(Length))
#define RtlCopyMemory(Destination,Source,Length) memcpy((Destination),(Source),(Length))
#define RtlFillMemory(Destination,Length,Fill) memset((Destination),(Fill),(Length))
#define RtlZeroMemory(Destination,Length) memset((Destination),0,(Length))
#endif
#if !defined(MIDL_PASS)
FORCEINLINE
PVOID
RtlSecureZeroMemory(
IN PVOID ptr,
IN SIZE_T cnt
)
{
volatile char *vptr = (volatile char *)ptr;
while (cnt) {
*vptr = 0;
vptr++;
cnt--;
}
return ptr;
}
#endif
//
// Define kernel debugger print prototypes and macros.
//
// N.B. The following function cannot be directly imported because there are
// a few places in the source tree where this function is redefined.
//
VOID
NTAPI
DbgBreakPoint(
VOID
);
// end_wdm
NTSYSAPI
VOID
NTAPI
DbgBreakPointWithStatus(
IN ULONG Status
);
// begin_wdm
#define DBG_STATUS_CONTROL_C 1
#define DBG_STATUS_SYSRQ 2
#define DBG_STATUS_BUGCHECK_FIRST 3
#define DBG_STATUS_BUGCHECK_SECOND 4
#define DBG_STATUS_FATAL 5
#define DBG_STATUS_DEBUG_CONTROL 6
#define DBG_STATUS_WORKER 7
#if DBG
#define KdPrint(_x_) DbgPrint _x_
// end_wdm
#define KdPrintEx(_x_) DbgPrintEx _x_
#define vKdPrintEx(_x_) vDbgPrintEx _x_
#define vKdPrintExWithPrefix(_x_) vDbgPrintExWithPrefix _x_
// begin_wdm
#define KdBreakPoint() DbgBreakPoint()
// end_wdm
#define KdBreakPointWithStatus(s) DbgBreakPointWithStatus(s)
// begin_wdm
#else
#define KdPrint(_x_)
// end_wdm
#define KdPrintEx(_x_)
#define vKdPrintEx(_x_)
#define vKdPrintExWithPrefix(_x_)
// begin_wdm
#define KdBreakPoint()
// end_wdm
#define KdBreakPointWithStatus(s)
// begin_wdm
#endif
#ifndef _DBGNT_
ULONG
__cdecl
DbgPrint(
PCH Format,
...
);
// end_wdm
ULONG
__cdecl
DbgPrintEx(
IN ULONG ComponentId,
IN ULONG Level,
IN PCH Format,
...
);
#ifdef _VA_LIST_DEFINED
ULONG
vDbgPrintEx(
IN ULONG ComponentId,
IN ULONG Level,
IN PCH Format,
va_list arglist
);
ULONG
vDbgPrintExWithPrefix(
IN PCH Prefix,
IN ULONG ComponentId,
IN ULONG Level,
IN PCH Format,
va_list arglist
);
#endif
ULONG
__cdecl
DbgPrintReturnControlC(
PCH Format,
...
);
NTSYSAPI
NTSTATUS
DbgQueryDebugFilterState(
IN ULONG ComponentId,
IN ULONG Level
);
NTSYSAPI
NTSTATUS
DbgSetDebugFilterState(
IN ULONG ComponentId,
IN ULONG Level,
IN BOOLEAN State
);
// begin_wdm
#endif // _DBGNT_
//
// Component name filter id enumeration and levels.
//
#define DPFLTR_ERROR_LEVEL 0
#define DPFLTR_WARNING_LEVEL 1
#define DPFLTR_TRACE_LEVEL 2
#define DPFLTR_INFO_LEVEL 3
#define DPFLTR_MASK 0x80000000
typedef enum _DPFLTR_TYPE {
DPFLTR_SYSTEM_ID = 0,
DPFLTR_SMSS_ID = 1,
DPFLTR_SETUP_ID = 2,
DPFLTR_NTFS_ID = 3,
DPFLTR_FSTUB_ID = 4,
DPFLTR_CRASHDUMP_ID = 5,
DPFLTR_CDAUDIO_ID = 6,
DPFLTR_CDROM_ID = 7,
DPFLTR_CLASSPNP_ID = 8,
DPFLTR_DISK_ID = 9,
DPFLTR_REDBOOK_ID = 10,
DPFLTR_STORPROP_ID = 11,
DPFLTR_SCSIPORT_ID = 12,
DPFLTR_SCSIMINIPORT_ID = 13,
DPFLTR_CONFIG_ID = 14,
DPFLTR_I8042PRT_ID = 15,
DPFLTR_SERMOUSE_ID = 16,
DPFLTR_LSERMOUS_ID = 17,
DPFLTR_KBDHID_ID = 18,
DPFLTR_MOUHID_ID = 19,
DPFLTR_KBDCLASS_ID = 20,
DPFLTR_MOUCLASS_ID = 21,
DPFLTR_TWOTRACK_ID = 22,
DPFLTR_WMILIB_ID = 23,
DPFLTR_ACPI_ID = 24,
DPFLTR_AMLI_ID = 25,
DPFLTR_HALIA64_ID = 26,
DPFLTR_VIDEO_ID = 27,
DPFLTR_SVCHOST_ID = 28,
DPFLTR_VIDEOPRT_ID = 29,
DPFLTR_TCPIP_ID = 30,
DPFLTR_DMSYNTH_ID = 31,
DPFLTR_NTOSPNP_ID = 32,
DPFLTR_FASTFAT_ID = 33,
DPFLTR_SAMSS_ID = 34,
DPFLTR_PNPMGR_ID = 35,
DPFLTR_NETAPI_ID = 36,
DPFLTR_SCSERVER_ID = 37,
DPFLTR_SCCLIENT_ID = 38,
DPFLTR_SERIAL_ID = 39,
DPFLTR_SERENUM_ID = 40,
DPFLTR_UHCD_ID = 41,
DPFLTR_BOOTOK_ID = 42,
DPFLTR_BOOTVRFY_ID = 43,
DPFLTR_RPCPROXY_ID = 44,
DPFLTR_AUTOCHK_ID = 45,
DPFLTR_DCOMSS_ID = 46,
DPFLTR_UNIMODEM_ID = 47,
DPFLTR_SIS_ID = 48,
DPFLTR_FLTMGR_ID = 49,
DPFLTR_WMICORE_ID = 50,
DPFLTR_BURNENG_ID = 51,
DPFLTR_IMAPI_ID = 52,
DPFLTR_SXS_ID = 53,
DPFLTR_FUSION_ID = 54,
DPFLTR_IDLETASK_ID = 55,
DPFLTR_SOFTPCI_ID = 56,
DPFLTR_TAPE_ID = 57,
DPFLTR_MCHGR_ID = 58,
DPFLTR_IDEP_ID = 59,
DPFLTR_PCIIDE_ID = 60,
DPFLTR_FLOPPY_ID = 61,
DPFLTR_FDC_ID = 62,
DPFLTR_TERMSRV_ID = 63,
DPFLTR_W32TIME_ID = 64,
DPFLTR_PREFETCHER_ID = 65,
DPFLTR_RSFILTER_ID = 66,
DPFLTR_FCPORT_ID = 67,
DPFLTR_PCI_ID = 68,
DPFLTR_DMIO_ID = 69,
DPFLTR_DMCONFIG_ID = 70,
DPFLTR_DMADMIN_ID = 71,
DPFLTR_WSOCKTRANSPORT_ID = 72,
DPFLTR_VSS_ID = 73,
DPFLTR_PNPMEM_ID = 74,
DPFLTR_PROCESSOR_ID = 75,
DPFLTR_DMSERVER_ID = 76,
DPFLTR_SR_ID = 77,
DPFLTR_INFINIBAND_ID = 78,
DPFLTR_IHVDRIVER_ID = 79,
DPFLTR_IHVVIDEO_ID = 80,
DPFLTR_IHVAUDIO_ID = 81,
DPFLTR_IHVNETWORK_ID = 82,
DPFLTR_IHVSTREAMING_ID = 83,
DPFLTR_IHVBUS_ID = 84,
DPFLTR_HPS_ID = 85,
DPFLTR_RTLTHREADPOOL_ID = 86,
DPFLTR_LDR_ID = 87,
DPFLTR_TCPIP6_ID = 88,
DPFLTR_ISAPNP_ID = 89,
DPFLTR_SHPC_ID = 90,
DPFLTR_STORPORT_ID = 91,
DPFLTR_STORMINIPORT_ID = 92,
DPFLTR_PRINTSPOOLER_ID = 93,
DPFLTR_ENDOFTABLE_ID
} DPFLTR_TYPE;
//
// Define I/O Driver error log packet structure. This structure is filled in
// by the driver.
//
typedef struct _IO_ERROR_LOG_PACKET {
UCHAR MajorFunctionCode;
UCHAR RetryCount;
USHORT DumpDataSize;
USHORT NumberOfStrings;
USHORT StringOffset;
USHORT EventCategory;
NTSTATUS ErrorCode;
ULONG UniqueErrorValue;
NTSTATUS FinalStatus;
ULONG SequenceNumber;
ULONG IoControlCode;
LARGE_INTEGER DeviceOffset;
ULONG DumpData[1];
}IO_ERROR_LOG_PACKET, *PIO_ERROR_LOG_PACKET;
//
// Define the I/O error log message. This message is sent by the error log
// thread over the lpc port.
//
typedef struct _IO_ERROR_LOG_MESSAGE {
USHORT Type;
USHORT Size;
USHORT DriverNameLength;
LARGE_INTEGER TimeStamp;
ULONG DriverNameOffset;
IO_ERROR_LOG_PACKET EntryData;
}IO_ERROR_LOG_MESSAGE, *PIO_ERROR_LOG_MESSAGE;
//
// Define the maximum message size that will be sent over the LPC to the
// application reading the error log entries.
//
//
// Regardless of LPC size restrictions, ERROR_LOG_MAXIMUM_SIZE must remain
// a value that can fit in a UCHAR.
//
#define ERROR_LOG_LIMIT_SIZE (256-16)
//
// This limit, exclusive of IO_ERROR_LOG_MESSAGE_HEADER_LENGTH, also applies
// to IO_ERROR_LOG_MESSAGE_LENGTH
//
#define IO_ERROR_LOG_MESSAGE_HEADER_LENGTH (sizeof(IO_ERROR_LOG_MESSAGE) - \
sizeof(IO_ERROR_LOG_PACKET) + \
(sizeof(WCHAR) * 40))
#define ERROR_LOG_MESSAGE_LIMIT_SIZE \
(ERROR_LOG_LIMIT_SIZE + IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
//
// IO_ERROR_LOG_MESSAGE_LENGTH is
// min(PORT_MAXIMUM_MESSAGE_LENGTH, ERROR_LOG_MESSAGE_LIMIT_SIZE)
//
#define IO_ERROR_LOG_MESSAGE_LENGTH \
((PORT_MAXIMUM_MESSAGE_LENGTH > ERROR_LOG_MESSAGE_LIMIT_SIZE) ? \
ERROR_LOG_MESSAGE_LIMIT_SIZE : \
PORT_MAXIMUM_MESSAGE_LENGTH)
//
// Define the maximum packet size a driver can allocate.
//
#define ERROR_LOG_MAXIMUM_SIZE (IO_ERROR_LOG_MESSAGE_LENGTH - \
IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
#if defined(_X86_)
//
// Types to use to contain PFNs and their counts.
//
typedef ULONG PFN_COUNT;
typedef LONG SPFN_NUMBER, *PSPFN_NUMBER;
typedef ULONG PFN_NUMBER, *PPFN_NUMBER;
//
// Define maximum size of flush multiple TB request.
//
#define FLUSH_MULTIPLE_MAXIMUM 16
//
// Indicate that the i386 compiler supports the pragma textout construct.
//
#define ALLOC_PRAGMA 1
//
// Indicate that the i386 compiler supports the DATA_SEG("INIT") and
// DATA_SEG("PAGE") pragmas
//
#define ALLOC_DATA_PRAGMA 1
//
// I/O space read and write macros.
//
// These have to be actual functions on the 386, because we need
// to use assembler, but cannot return a value if we inline it.
//
// The READ/WRITE_REGISTER_* calls manipulate I/O registers in MEMORY space.
// (Use x86 move instructions, with LOCK prefix to force correct behavior
// w.r.t. caches and write buffers.)
//
// The READ/WRITE_PORT_* calls manipulate I/O registers in PORT space.
// (Use x86 in/out instructions.)
//
NTKERNELAPI
UCHAR
NTAPI
READ_REGISTER_UCHAR(
PUCHAR Register
);
NTKERNELAPI
USHORT
NTAPI
READ_REGISTER_USHORT(
PUSHORT Register
);
NTKERNELAPI
ULONG
NTAPI
READ_REGISTER_ULONG(
PULONG Register
);
NTKERNELAPI
VOID
NTAPI
READ_REGISTER_BUFFER_UCHAR(
PUCHAR Register,
PUCHAR Buffer,
ULONG Count
);
NTKERNELAPI
VOID
NTAPI
READ_REGISTER_BUFFER_USHORT(
PUSHORT Register,
PUSHORT Buffer,
ULONG Count
);
NTKERNELAPI
VOID
NTAPI
READ_REGISTER_BUFFER_ULONG(
PULONG Register,
PULONG Buffer,
ULONG Count
);
NTKERNELAPI
VOID
NTAPI
WRITE_REGISTER_UCHAR(
PUCHAR Register,
UCHAR Value
);
NTKERNELAPI
VOID
NTAPI
WRITE_REGISTER_USHORT(
PUSHORT Register,
USHORT Value
);
NTKERNELAPI
VOID
NTAPI
WRITE_REGISTER_ULONG(
PULONG Register,
ULONG Value
);
NTKERNELAPI
VOID
NTAPI
WRITE_REGISTER_BUFFER_UCHAR(
PUCHAR Register,
PUCHAR Buffer,
ULONG Count
);
NTKERNELAPI
VOID
NTAPI
WRITE_REGISTER_BUFFER_USHORT(
PUSHORT Register,
PUSHORT Buffer,
ULONG Count
);
NTKERNELAPI
VOID
NTAPI
WRITE_REGISTER_BUFFER_ULONG(
PULONG Register,
PULONG Buffer,
ULONG Count
);
NTHALAPI
UCHAR
NTAPI
READ_PORT_UCHAR(
PUCHAR Port
);
NTHALAPI
USHORT
NTAPI
READ_PORT_USHORT(
PUSHORT Port
);
NTHALAPI
ULONG
NTAPI
READ_PORT_ULONG(
PULONG Port
);
NTHALAPI
VOID
NTAPI
READ_PORT_BUFFER_UCHAR(
PUCHAR Port,
PUCHAR Buffer,
ULONG Count
);
NTHALAPI
VOID
NTAPI
READ_PORT_BUFFER_USHORT(
PUSHORT Port,
PUSHORT Buffer,
ULONG Count
);
NTHALAPI
VOID
NTAPI
READ_PORT_BUFFER_ULONG(
PULONG Port,
PULONG Buffer,
ULONG Count
);
NTHALAPI
VOID
NTAPI
WRITE_PORT_UCHAR(
PUCHAR Port,
UCHAR Value
);
NTHALAPI
VOID
NTAPI
WRITE_PORT_USHORT(
PUSHORT Port,
USHORT Value
);
NTHALAPI
VOID
NTAPI
WRITE_PORT_ULONG(
PULONG Port,
ULONG Value
);
NTHALAPI
VOID
NTAPI
WRITE_PORT_BUFFER_UCHAR(
PUCHAR Port,
PUCHAR Buffer,
ULONG Count
);
NTHALAPI
VOID
NTAPI
WRITE_PORT_BUFFER_USHORT(
PUSHORT Port,
PUSHORT Buffer,
ULONG Count
);
NTHALAPI
VOID
NTAPI
WRITE_PORT_BUFFER_ULONG(
PULONG Port,
PULONG Buffer,
ULONG Count
);
#define KeFlushIoBuffers(Mdl, ReadOperation, DmaOperation)
//
// i386 Specific portions of mm component
//
//
// Define the page size for the Intel 386 as 4096 (0x1000).
//
#define PAGE_SIZE 0x1000
//
// Define the number of trailing zeroes in a page aligned virtual address.
// This is used as the shift count when shifting virtual addresses to
// virtual page numbers.
//
#define PAGE_SHIFT 12L
#endif // defined(_X86_)
#if defined(_M_AMD64) && !defined(RC_INVOKED) && !defined(MIDL_PASS)
//
// Define intrinsic function to do in's and out's.
//
#ifdef __cplusplus
extern "C" {
#endif
UCHAR
__inbyte (
IN USHORT Port
);
USHORT
__inword (
IN USHORT Port
);
ULONG
__indword (
IN USHORT Port
);
VOID
__outbyte (
IN USHORT Port,
IN UCHAR Data
);
VOID
__outword (
IN USHORT Port,
IN USHORT Data
);
VOID
__outdword (
IN USHORT Port,
IN ULONG Data
);
VOID
__inbytestring (
IN USHORT Port,
IN PUCHAR Buffer,
IN ULONG Count
);
VOID
__inwordstring (
IN USHORT Port,
IN PUSHORT Buffer,
IN ULONG Count
);
VOID
__indwordstring (
IN USHORT Port,
IN PULONG Buffer,
IN ULONG Count
);
VOID
__outbytestring (
IN USHORT Port,
IN PUCHAR Buffer,
IN ULONG Count
);
VOID
__outwordstring (
IN USHORT Port,
IN PUSHORT Buffer,
IN ULONG Count
);
VOID
__outdwordstring (
IN USHORT Port,
IN PULONG Buffer,
IN ULONG Count
);
#ifdef __cplusplus
}
#endif
#pragma intrinsic(__inbyte)
#pragma intrinsic(__inword)
#pragma intrinsic(__indword)
#pragma intrinsic(__outbyte)
#pragma intrinsic(__outword)
#pragma intrinsic(__outdword)
#pragma intrinsic(__inbytestring)
#pragma intrinsic(__inwordstring)
#pragma intrinsic(__indwordstring)
#pragma intrinsic(__outbytestring)
#pragma intrinsic(__outwordstring)
#pragma intrinsic(__outdwordstring)
//
// Interlocked intrinsic functions.
//
#define InterlockedAnd _InterlockedAnd
#define InterlockedOr _InterlockedOr
#define InterlockedXor _InterlockedXor
#define InterlockedIncrement _InterlockedIncrement
#define InterlockedDecrement _InterlockedDecrement
#define InterlockedAdd _InterlockedAdd
#define InterlockedExchange _InterlockedExchange
#define InterlockedExchangeAdd _InterlockedExchangeAdd
#define InterlockedCompareExchange _InterlockedCompareExchange
#define InterlockedAnd64 _InterlockedAnd64
#define InterlockedOr64 _InterlockedOr64
#define InterlockedXor64 _InterlockedXor64
#define InterlockedIncrement64 _InterlockedIncrement64
#define InterlockedDecrement64 _InterlockedDecrement64
#define InterlockedAdd64 _InterlockedAdd64
#define InterlockedExchange64 _InterlockedExchange64
#define InterlockedExchangeAdd64 _InterlockedExchangeAdd64
#define InterlockedCompareExchange64 _InterlockedCompareExchange64
#define InterlockedExchangePointer _InterlockedExchangePointer
#define InterlockedCompareExchangePointer _InterlockedCompareExchangePointer
#ifdef __cplusplus
extern "C" {
#endif
LONG
InterlockedAnd (
IN OUT LONG volatile *Destination,
IN LONG Value
);
LONG
InterlockedOr (
IN OUT LONG volatile *Destination,
IN LONG Value
);
LONG
InterlockedXor (
IN OUT LONG volatile *Destination,
IN LONG Value
);
LONG64
InterlockedAnd64 (
IN OUT LONG64 volatile *Destination,
IN LONG64 Value
);
LONG64
InterlockedOr64 (
IN OUT LONG64 volatile *Destination,
IN LONG64 Value
);
LONG64
InterlockedXor64 (
IN OUT LONG64 volatile *Destination,
IN LONG64 Value
);
LONG
InterlockedIncrement(
IN OUT LONG volatile *Addend
);
LONG
InterlockedDecrement(
IN OUT LONG volatile *Addend
);
LONG
InterlockedExchange(
IN OUT LONG volatile *Target,
IN LONG Value
);
LONG
InterlockedExchangeAdd(
IN OUT LONG volatile *Addend,
IN LONG Value
);
#if !defined(_X86AMD64_)
__forceinline
LONG
InterlockedAdd(
IN OUT LONG volatile *Addend,
IN LONG Value
)
{
return InterlockedExchangeAdd(Addend, Value) + Value;
}
#endif
LONG
InterlockedCompareExchange (
IN OUT LONG volatile *Destination,
IN LONG ExChange,
IN LONG Comperand
);
LONG64
InterlockedIncrement64(
IN OUT LONG64 volatile *Addend
);
LONG64
InterlockedDecrement64(
IN OUT LONG64 volatile *Addend
);
LONG64
InterlockedExchange64(
IN OUT LONG64 volatile *Target,
IN LONG64 Value
);
LONG64
InterlockedExchangeAdd64(
IN OUT LONG64 volatile *Addend,
IN LONG64 Value
);
#if !defined(_X86AMD64_)
__forceinline
LONG64
InterlockedAdd64(
IN OUT LONG64 volatile *Addend,
IN LONG64 Value
)
{
return InterlockedExchangeAdd64(Addend, Value) + Value;
}
#endif
LONG64
InterlockedCompareExchange64 (
IN OUT LONG64 volatile *Destination,
IN LONG64 ExChange,
IN LONG64 Comperand
);
PVOID
InterlockedCompareExchangePointer (
IN OUT PVOID volatile *Destination,
IN PVOID Exchange,
IN PVOID Comperand
);
PVOID
InterlockedExchangePointer(
IN OUT PVOID volatile *Target,
IN PVOID Value
);
#pragma intrinsic(_InterlockedAnd)
#pragma intrinsic(_InterlockedOr)
#pragma intrinsic(_InterlockedXor)
#pragma intrinsic(_InterlockedIncrement)
#pragma intrinsic(_InterlockedDecrement)
#pragma intrinsic(_InterlockedExchange)
#pragma intrinsic(_InterlockedExchangeAdd)
#pragma intrinsic(_InterlockedCompareExchange)
#pragma intrinsic(_InterlockedAnd64)
#pragma intrinsic(_InterlockedOr64)
#pragma intrinsic(_InterlockedXor64)
#pragma intrinsic(_InterlockedIncrement64)
#pragma intrinsic(_InterlockedDecrement64)
#pragma intrinsic(_InterlockedExchange64)
#pragma intrinsic(_InterlockedExchangeAdd64)
#pragma intrinsic(_InterlockedCompareExchange64)
#pragma intrinsic(_InterlockedExchangePointer)
#pragma intrinsic(_InterlockedCompareExchangePointer)
#ifdef __cplusplus
}
#endif
#endif // defined(_M_AMD64) && !defined(RC_INVOKED) && !defined(MIDL_PASS)
#if defined(_AMD64_)
//
// Types to use to contain PFNs and their counts.
//
typedef ULONG PFN_COUNT;
typedef LONG64 SPFN_NUMBER, *PSPFN_NUMBER;
typedef ULONG64 PFN_NUMBER, *PPFN_NUMBER;
//
// Define maximum size of flush multiple TB request.
//
#define FLUSH_MULTIPLE_MAXIMUM 16
//
// Indicate that the AMD64 compiler supports the allocate pragmas.
//
#define ALLOC_PRAGMA 1
#define ALLOC_DATA_PRAGMA 1
//
// I/O space read and write macros.
//
// The READ/WRITE_REGISTER_* calls manipulate I/O registers in MEMORY space.
// (Use move instructions, with LOCK prefix to force correct behavior
// w.r.t. caches and write buffers.)
//
// The READ/WRITE_PORT_* calls manipulate I/O registers in PORT space.
// (Use in/out instructions.)
//
__forceinline
UCHAR
READ_REGISTER_UCHAR (
volatile UCHAR *Register
)
{
return *Register;
}
__forceinline
USHORT
READ_REGISTER_USHORT (
volatile USHORT *Register
)
{
return *Register;
}
__forceinline
ULONG
READ_REGISTER_ULONG (
volatile ULONG *Register
)
{
return *Register;
}
__forceinline
VOID
READ_REGISTER_BUFFER_UCHAR (
PUCHAR Register,
PUCHAR Buffer,
ULONG Count
)
{
__movsb(Register, Buffer, Count);
return;
}
__forceinline
VOID
READ_REGISTER_BUFFER_USHORT (
PUSHORT Register,
PUSHORT Buffer,
ULONG Count
)
{
__movsw(Register, Buffer, Count);
return;
}
__forceinline
VOID
READ_REGISTER_BUFFER_ULONG (
PULONG Register,
PULONG Buffer,
ULONG Count
)
{
__movsd(Register, Buffer, Count);
return;
}
__forceinline
VOID
WRITE_REGISTER_UCHAR (
PUCHAR Register,
UCHAR Value
)
{
LONG Synch;
*Register = Value;
InterlockedOr(&Synch, 1);
return;
}
__forceinline
VOID
WRITE_REGISTER_USHORT (
PUSHORT Register,
USHORT Value
)
{
LONG Synch;
*Register = Value;
InterlockedOr(&Synch, 1);
return;
}
__forceinline
VOID
WRITE_REGISTER_ULONG (
PULONG Register,
ULONG Value
)
{
LONG Synch;
*Register = Value;
InterlockedOr(&Synch, 1);
return;
}
__forceinline
VOID
WRITE_REGISTER_BUFFER_UCHAR (
PUCHAR Register,
PUCHAR Buffer,
ULONG Count
)
{
LONG Synch;
__movsb(Register, Buffer, Count);
InterlockedOr(&Synch, 1);
return;
}
__forceinline
VOID
WRITE_REGISTER_BUFFER_USHORT (
PUSHORT Register,
PUSHORT Buffer,
ULONG Count
)
{
LONG Synch;
__movsw(Register, Buffer, Count);
InterlockedOr(&Synch, 1);
return;
}
__forceinline
VOID
WRITE_REGISTER_BUFFER_ULONG (
PULONG Register,
PULONG Buffer,
ULONG Count
)
{
LONG Synch;
__movsd(Register, Buffer, Count);
InterlockedOr(&Synch, 1);
return;
}
__forceinline
UCHAR
READ_PORT_UCHAR (
PUCHAR Port
)
{
return __inbyte((USHORT)((ULONG64)Port));
}
__forceinline
USHORT
READ_PORT_USHORT (
PUSHORT Port
)
{
return __inword((USHORT)((ULONG64)Port));
}
__forceinline
ULONG
READ_PORT_ULONG (
PULONG Port
)
{
return __indword((USHORT)((ULONG64)Port));
}
__forceinline
VOID
READ_PORT_BUFFER_UCHAR (
PUCHAR Port,
PUCHAR Buffer,
ULONG Count
)
{
__inbytestring((USHORT)((ULONG64)Port), Buffer, Count);
return;
}
__forceinline
VOID
READ_PORT_BUFFER_USHORT (
PUSHORT Port,
PUSHORT Buffer,
ULONG Count
)
{
__inwordstring((USHORT)((ULONG64)Port), Buffer, Count);
return;
}
__forceinline
VOID
READ_PORT_BUFFER_ULONG (
PULONG Port,
PULONG Buffer,
ULONG Count
)
{
__indwordstring((USHORT)((ULONG64)Port), Buffer, Count);
return;
}
__forceinline
VOID
WRITE_PORT_UCHAR (
PUCHAR Port,
UCHAR Value
)
{
__outbyte((USHORT)((ULONG64)Port), Value);
return;
}
__forceinline
VOID
WRITE_PORT_USHORT (
PUSHORT Port,
USHORT Value
)
{
__outword((USHORT)((ULONG64)Port), Value);
return;
}
__forceinline
VOID
WRITE_PORT_ULONG (
PULONG Port,
ULONG Value
)
{
__outdword((USHORT)((ULONG64)Port), Value);
return;
}
__forceinline
VOID
WRITE_PORT_BUFFER_UCHAR (
PUCHAR Port,
PUCHAR Buffer,
ULONG Count
)
{
__outbytestring((USHORT)((ULONG64)Port), Buffer, Count);
return;
}
__forceinline
VOID
WRITE_PORT_BUFFER_USHORT (
PUSHORT Port,
PUSHORT Buffer,
ULONG Count
)
{
__outwordstring((USHORT)((ULONG64)Port), Buffer, Count);
return;
}
__forceinline
VOID
WRITE_PORT_BUFFER_ULONG (
PULONG Port,
PULONG Buffer,
ULONG Count
)
{
__outdwordstring((USHORT)((ULONG64)Port), Buffer, Count);
return;
}
#define KeFlushIoBuffers(Mdl, ReadOperation, DmaOperation)
//
// AMD64 Specific portions of mm component.
//
// Define the page size for the AMD64 as 4096 (0x1000).
//
#define PAGE_SIZE 0x1000
//
// Define the number of trailing zeroes in a page aligned virtual address.
// This is used as the shift count when shifting virtual addresses to
// virtual page numbers.
//
#define PAGE_SHIFT 12L
#endif // defined(_AMD64_)
#if defined(_IA64_)
//
// Types to use to contain PFNs and their counts.
//
typedef ULONG PFN_COUNT;
typedef LONG_PTR SPFN_NUMBER, *PSPFN_NUMBER;
typedef ULONG_PTR PFN_NUMBER, *PPFN_NUMBER;
//
// Define maximum size of flush multiple TB request.
//
#define FLUSH_MULTIPLE_MAXIMUM 100
//
// Indicate that the IA64 compiler supports the pragma textout construct.
//
#define ALLOC_PRAGMA 1
//
// Define intrinsic calls and their prototypes
//
#include "ia64reg.h"
#ifdef __cplusplus
extern "C" {
#endif
unsigned __int64 __getReg (int);
void __setReg (int, unsigned __int64);
void __isrlz (void);
void __dsrlz (void);
void __fwb (void);
void __mf (void);
void __mfa (void);
void __synci (void);
__int64 __thash (__int64);
__int64 __ttag (__int64);
void __ptcl (__int64, __int64);
void __ptcg (__int64, __int64);
void __ptcga (__int64, __int64);
void __ptri (__int64, __int64);
void __ptrd (__int64, __int64);
void __invalat (void);
void __break (int);
void __fc (__int64);
void __sum (int);
void __rsm (int);
void _ReleaseSpinLock( unsigned __int64 *);
#ifdef _M_IA64
#pragma intrinsic (__getReg)
#pragma intrinsic (__setReg)
#pragma intrinsic (__isrlz)
#pragma intrinsic (__dsrlz)
#pragma intrinsic (__fwb)
#pragma intrinsic (__mf)
#pragma intrinsic (__mfa)
#pragma intrinsic (__synci)
#pragma intrinsic (__thash)
#pragma intrinsic (__ttag)
#pragma intrinsic (__ptcl)
#pragma intrinsic (__ptcg)
#pragma intrinsic (__ptcga)
#pragma intrinsic (__ptri)
#pragma intrinsic (__ptrd)
#pragma intrinsic (__invalat)
#pragma intrinsic (__break)
#pragma intrinsic (__fc)
#pragma intrinsic (__sum)
#pragma intrinsic (__rsm)
#pragma intrinsic (_ReleaseSpinLock)
#endif // _M_IA64
#ifdef __cplusplus
}
#endif
//
// Define the page size
//
#define PAGE_SIZE 0x2000
//
// Define the number of trailing zeroes in a page aligned virtual address.
// This is used as the shift count when shifting virtual addresses to
// virtual page numbers.
//
#define PAGE_SHIFT 13L
//
// Cache and write buffer flush functions.
//
NTKERNELAPI
VOID
KeFlushIoBuffers (
IN PMDL Mdl,
IN BOOLEAN ReadOperation,
IN BOOLEAN DmaOperation
);
//
// I/O space read and write macros.
//
NTHALAPI
UCHAR
READ_PORT_UCHAR (
PUCHAR RegisterAddress
);
NTHALAPI
USHORT
READ_PORT_USHORT (
PUSHORT RegisterAddress
);
NTHALAPI
ULONG
READ_PORT_ULONG (
PULONG RegisterAddress
);
NTHALAPI
VOID
READ_PORT_BUFFER_UCHAR (
PUCHAR portAddress,
PUCHAR readBuffer,
ULONG readCount
);
NTHALAPI
VOID
READ_PORT_BUFFER_USHORT (
PUSHORT portAddress,
PUSHORT readBuffer,
ULONG readCount
);
NTHALAPI
VOID
READ_PORT_BUFFER_ULONG (
PULONG portAddress,
PULONG readBuffer,
ULONG readCount
);
NTHALAPI
VOID
WRITE_PORT_UCHAR (
PUCHAR portAddress,
UCHAR Data
);
NTHALAPI
VOID
WRITE_PORT_USHORT (
PUSHORT portAddress,
USHORT Data
);
NTHALAPI
VOID
WRITE_PORT_ULONG (
PULONG portAddress,
ULONG Data
);
NTHALAPI
VOID
WRITE_PORT_BUFFER_UCHAR (
PUCHAR portAddress,
PUCHAR writeBuffer,
ULONG writeCount
);
NTHALAPI
VOID
WRITE_PORT_BUFFER_USHORT (
PUSHORT portAddress,
PUSHORT writeBuffer,
ULONG writeCount
);
NTHALAPI
VOID
WRITE_PORT_BUFFER_ULONG (
PULONG portAddress,
PULONG writeBuffer,
ULONG writeCount
);
#define READ_REGISTER_UCHAR(x) \
(__mf(), *(volatile UCHAR * const)(x))
#define READ_REGISTER_USHORT(x) \
(__mf(), *(volatile USHORT * const)(x))
#define READ_REGISTER_ULONG(x) \
(__mf(), *(volatile ULONG * const)(x))
#define READ_REGISTER_BUFFER_UCHAR(x, y, z) { \
PUCHAR registerBuffer = x; \
PUCHAR readBuffer = y; \
ULONG readCount; \
__mf(); \
for (readCount = z; readCount--; readBuffer++, registerBuffer++) { \
*readBuffer = *(volatile UCHAR * const)(registerBuffer); \
} \
}
#define READ_REGISTER_BUFFER_USHORT(x, y, z) { \
PUSHORT registerBuffer = x; \
PUSHORT readBuffer = y; \
ULONG readCount; \
__mf(); \
for (readCount = z; readCount--; readBuffer++, registerBuffer++) { \
*readBuffer = *(volatile USHORT * const)(registerBuffer); \
} \
}
#define READ_REGISTER_BUFFER_ULONG(x, y, z) { \
PULONG registerBuffer = x; \
PULONG readBuffer = y; \
ULONG readCount; \
__mf(); \
for (readCount = z; readCount--; readBuffer++, registerBuffer++) { \
*readBuffer = *(volatile ULONG * const)(registerBuffer); \
} \
}
#define WRITE_REGISTER_UCHAR(x, y) { \
*(volatile UCHAR * const)(x) = y; \
KeFlushWriteBuffer(); \
}
#define WRITE_REGISTER_USHORT(x, y) { \
*(volatile USHORT * const)(x) = y; \
KeFlushWriteBuffer(); \
}
#define WRITE_REGISTER_ULONG(x, y) { \
*(volatile ULONG * const)(x) = y; \
KeFlushWriteBuffer(); \
}
#define WRITE_REGISTER_BUFFER_UCHAR(x, y, z) { \
PUCHAR registerBuffer = x; \
PUCHAR writeBuffer = y; \
ULONG writeCount; \
for (writeCount = z; writeCount--; writeBuffer++, registerBuffer++) { \
*(volatile UCHAR * const)(registerBuffer) = *writeBuffer; \
} \
KeFlushWriteBuffer(); \
}
#define WRITE_REGISTER_BUFFER_USHORT(x, y, z) { \
PUSHORT registerBuffer = x; \
PUSHORT writeBuffer = y; \
ULONG writeCount; \
for (writeCount = z; writeCount--; writeBuffer++, registerBuffer++) { \
*(volatile USHORT * const)(registerBuffer) = *writeBuffer; \
} \
KeFlushWriteBuffer(); \
}
#define WRITE_REGISTER_BUFFER_ULONG(x, y, z) { \
PULONG registerBuffer = x; \
PULONG writeBuffer = y; \
ULONG writeCount; \
for (writeCount = z; writeCount--; writeBuffer++, registerBuffer++) { \
*(volatile ULONG * const)(registerBuffer) = *writeBuffer; \
} \
KeFlushWriteBuffer(); \
}
//
// OS_MCA, OS_INIT HandOff State definitions
//
// Note: The following definitions *must* match the definiions of the
// corresponding SAL Revision Hand-Off structures.
//
typedef struct _SAL_HANDOFF_STATE {
ULONGLONG PalProcEntryPoint;
ULONGLONG SalProcEntryPoint;
ULONGLONG SalGlobalPointer;
LONGLONG RendezVousResult;
ULONGLONG SalReturnAddress;
ULONGLONG MinStateSavePtr;
} SAL_HANDOFF_STATE, *PSAL_HANDOFF_STATE;
typedef struct _OS_HANDOFF_STATE {
ULONGLONG Result;
ULONGLONG SalGlobalPointer;
ULONGLONG MinStateSavePtr;
ULONGLONG SalReturnAddress;
ULONGLONG NewContextFlag;
} OS_HANDOFF_STATE, *POS_HANDOFF_STATE;
//
// per processor OS_MCA and OS_INIT resource structure
//
#define SER_EVENT_STACK_FRAME_ENTRIES 8
typedef struct _SAL_EVENT_RESOURCES {
SAL_HANDOFF_STATE SalToOsHandOff;
OS_HANDOFF_STATE OsToSalHandOff;
PVOID StateDump;
ULONGLONG StateDumpPhysical;
PVOID BackStore;
ULONGLONG BackStoreLimit;
PVOID Stack;
ULONGLONG StackLimit;
PULONGLONG PTOM;
ULONGLONG StackFrame[SER_EVENT_STACK_FRAME_ENTRIES];
PVOID EventPool;
ULONG EventPoolSize;
} SAL_EVENT_RESOURCES, *PSAL_EVENT_RESOURCES;
//
// PAL Mini-save area, used by MCA and INIT
//
typedef struct _PAL_MINI_SAVE_AREA {
ULONGLONG IntNats; // Nat bits for r1-r31
// r1-r31 in bits 1 thru 31.
ULONGLONG IntGp; // r1, volatile
ULONGLONG IntT0; // r2-r3, volatile
ULONGLONG IntT1; //
ULONGLONG IntS0; // r4-r7, preserved
ULONGLONG IntS1;
ULONGLONG IntS2;
ULONGLONG IntS3;
ULONGLONG IntV0; // r8, volatile
ULONGLONG IntT2; // r9-r11, volatile
ULONGLONG IntT3;
ULONGLONG IntT4;
ULONGLONG IntSp; // stack pointer (r12), special
ULONGLONG IntTeb; // teb (r13), special
ULONGLONG IntT5; // r14-r31, volatile
ULONGLONG IntT6;
ULONGLONG B0R16; // Bank 0 registers 16-31
ULONGLONG B0R17;
ULONGLONG B0R18;
ULONGLONG B0R19;
ULONGLONG B0R20;
ULONGLONG B0R21;
ULONGLONG B0R22;
ULONGLONG B0R23;
ULONGLONG B0R24;
ULONGLONG B0R25;
ULONGLONG B0R26;
ULONGLONG B0R27;
ULONGLONG B0R28;
ULONGLONG B0R29;
ULONGLONG B0R30;
ULONGLONG B0R31;
ULONGLONG IntT7; // Bank 1 registers 16-31
ULONGLONG IntT8;
ULONGLONG IntT9;
ULONGLONG IntT10;
ULONGLONG IntT11;
ULONGLONG IntT12;
ULONGLONG IntT13;
ULONGLONG IntT14;
ULONGLONG IntT15;
ULONGLONG IntT16;
ULONGLONG IntT17;
ULONGLONG IntT18;
ULONGLONG IntT19;
ULONGLONG IntT20;
ULONGLONG IntT21;
ULONGLONG IntT22;
ULONGLONG Preds; // predicates, preserved
ULONGLONG BrRp; // return pointer, b0, preserved
ULONGLONG RsRSC; // RSE configuration, volatile
ULONGLONG StIIP; // Interruption IP
ULONGLONG StIPSR; // Interruption Processor Status
ULONGLONG StIFS; // Interruption Function State
ULONGLONG XIP; // Event IP
ULONGLONG XPSR; // Event Processor Status
ULONGLONG XFS; // Event Function State
} PAL_MINI_SAVE_AREA, *PPAL_MINI_SAVE_AREA;
//
// Define Processor Control Region Structure.
//
#define PCR_MINOR_VERSION 1
#define PCR_MAJOR_VERSION 1
typedef struct _KPCR {
//
// Major and minor version numbers of the PCR.
//
ULONG MinorVersion;
ULONG MajorVersion;
//
// Start of the architecturally defined section of the PCR. This section
// may be directly addressed by vendor/platform specific HAL code and will
// not change from version to version of NT.
//
//
// First and second level cache parameters.
//
ULONG FirstLevelDcacheSize;
ULONG FirstLevelDcacheFillSize;
ULONG FirstLevelIcacheSize;
ULONG FirstLevelIcacheFillSize;
ULONG SecondLevelDcacheSize;
ULONG SecondLevelDcacheFillSize;
ULONG SecondLevelIcacheSize;
ULONG SecondLevelIcacheFillSize;
//
// Data cache alignment and fill size used for cache flushing and alignment.
// These fields are set to the larger of the first and second level data
// cache fill sizes.
//
ULONG DcacheAlignment;
ULONG DcacheFillSize;
//
// Instruction cache alignment and fill size used for cache flushing and
// alignment. These fields are set to the larger of the first and second
// level data cache fill sizes.
//
ULONG IcacheAlignment;
ULONG IcacheFillSize;
//
// Processor identification from PrId register.
//
ULONG ProcessorId;
//
// Profiling data.
//
ULONG ProfileInterval;
ULONG ProfileCount;
//
// Stall execution count and scale factor.
//
ULONG StallExecutionCount;
ULONG StallScaleFactor;
ULONG InterruptionCount;
//
// Space reserved for the system.
//
ULONGLONG SystemReserved[6];
//
// Space reserved for the HAL
//
ULONGLONG HalReserved[64];
//
// IRQL mapping tables.
//
UCHAR IrqlMask[64];
UCHAR IrqlTable[64];
//
// External Interrupt vectors.
//
PKINTERRUPT_ROUTINE InterruptRoutine[MAXIMUM_VECTOR];
//
// Reserved interrupt vector mask.
//
ULONG ReservedVectors;
//
// Processor affinity mask.
//
KAFFINITY SetMember;
//
// Complement of the processor affinity mask.
//
KAFFINITY NotMember;
//
// Pointer to processor control block.
//
struct _KPRCB *Prcb;
//
// Shadow copy of Prcb->CurrentThread for fast access
//
struct _KTHREAD *CurrentThread;
//
// Processor number.
//
CCHAR Number; // Processor Number
UCHAR DebugActive; // debug register active in user flag
UCHAR KernelDebugActive; // debug register active in kernel flag
UCHAR CurrentIrql; // Current IRQL
union {
USHORT SoftwareInterruptPending; // Software Interrupt Pending Flag
struct {
UCHAR ApcInterrupt; // 0x01 if APC int pending
UCHAR DispatchInterrupt; // 0x01 if dispatch int pending
};
};
//
// Address of per processor SAPIC EOI Table
//
PVOID EOITable;
//
// IA-64 Machine Check Events trackers
//
UCHAR InOsMca;
UCHAR InOsInit;
UCHAR InOsCmc;
UCHAR InOsCpe;
ULONG InOsULONG_Spare; // Spare ULONG
PSAL_EVENT_RESOURCES OsMcaResourcePtr;
PSAL_EVENT_RESOURCES OsInitResourcePtr;
//
// End of the architecturally defined section of the PCR. This section
// may be directly addressed by vendor/platform specific HAL code and will
// not change from version to version of NT.
//
// end_nthal end_ntddk
//
// OS Part
//
//
// Address of the thread who currently owns the high fp register set
//
struct _KTHREAD *HighFpOwner;
// Per processor kernel (ntoskrnl.exe) global pointer
ULONGLONG KernelGP;
// Per processor initial kernel stack for current thread
ULONGLONG InitialStack;
// Per processor pointer to kernel BSP
ULONGLONG InitialBStore;
// Per processor kernel stack limit
ULONGLONG StackLimit;
// Per processor kernel backing store limit
ULONGLONG BStoreLimit;
// Per processor panic kernel stack
ULONGLONG PanicStack;
//
// Save area for kernel entry/exit
//
ULONGLONG SavedIIM;
ULONGLONG SavedIFA;
ULONGLONG ForwardProgressBuffer[16];
PVOID Pcb; // holds KPROCESS for MP region synchronization
//
// Nt page table base addresses
//
ULONGLONG PteUbase;
ULONGLONG PteKbase;
ULONGLONG PteSbase;
ULONGLONG PdeUbase;
ULONGLONG PdeKbase;
ULONGLONG PdeSbase;
ULONGLONG PdeUtbase;
ULONGLONG PdeKtbase;
ULONGLONG PdeStbase;
//
// The actual resources for the OS_INIT and OS_MCA handlers
// are placed at the end of the PCR structure so that auto
// can be used to get to get between the public and private
// sections of the PCR in the traps and context routines.
//
SAL_EVENT_RESOURCES OsMcaResource;
SAL_EVENT_RESOURCES OsInitResource;
// begin_nthal begin_ntddk
} KPCR, *PKPCR;
// end_nthal end_ntddk end_ntosp
// begin_nthal
//
// Define the number of bits to shift to right justify the Page Table Index
// field of a PTE.
//
#define PTI_SHIFT PAGE_SHIFT
//
// Define the number of bits to shift to right justify the Page Directory Index
// field of a PTE.
//
#define PDI_SHIFT (PTI_SHIFT + PAGE_SHIFT - PTE_SHIFT)
#define PDI1_SHIFT (PDI_SHIFT + PAGE_SHIFT - PTE_SHIFT)
#define PDI_MASK ((1 << (PAGE_SHIFT - PTE_SHIFT)) - 1)
//
// Define the number of bits to shift to left to produce page table offset
// from page table index.
//
#define PTE_SHIFT 3
//
// Define the number of bits to shift to the right justify the Page Directory
// Table Entry field.
//
#define VHPT_PDE_BITS 40
//
// Define the RID for IO Port Space.
//
#define RR_IO_PORT 6
//
// The following definitions are required for the debugger data block.
//
// begin_ntddk begin_ntosp
//
// The highest user address reserves 64K bytes for a guard page. This
// the probing of address from kernel mode to only have to check the
// starting address for structures of 64k bytes or less.
//
extern NTKERNELAPI PVOID MmHighestUserAddress;
extern NTKERNELAPI PVOID MmSystemRangeStart;
extern NTKERNELAPI ULONG_PTR MmUserProbeAddress;
#define MM_HIGHEST_USER_ADDRESS MmHighestUserAddress
#define MM_USER_PROBE_ADDRESS MmUserProbeAddress
#define MM_SYSTEM_RANGE_START MmSystemRangeStart
//
// The lowest user address reserves the low 64k.
//
#define MM_LOWEST_USER_ADDRESS (PVOID)((ULONG_PTR)(UADDRESS_BASE+0x00010000))
// begin_wdm
#define MmGetProcedureAddress(Address) (Address)
#define MmLockPagableCodeSection(PLabelAddress) \
MmLockPagableDataSection((PVOID)(*((PULONGLONG)PLabelAddress)))
#define VRN_MASK 0xE000000000000000UI64 // Virtual Region Number mask
// end_ntddk end_wdm end_ntosp
//
// Limit the IA32 subsystem to a 2GB virtual address space.
// This means "Large Address Aware" apps are not supported in emulation mode.
//
#define MM_MAX_WOW64_ADDRESS (0x00000000080000000UI64)
#define MI_HIGHEST_USER_ADDRESS (PVOID) (ULONG_PTR)((UADDRESS_BASE + 0x6FC00000000 - 0x10000 - 1)) // highest user address
#define MI_USER_PROBE_ADDRESS ((ULONG_PTR)(UADDRESS_BASE + 0x6FC00000000UI64 - 0x10000)) // starting address of guard page
#define MI_SYSTEM_RANGE_START (PVOID) (UADDRESS_BASE + 0x6FC00000000) // start of system space
//
// Define the page table base and the page directory base for
// the TB miss routines and memory management.
//
//
// user/kernel page table base and top addresses
//
extern ULONG_PTR KiIA64VaSignedFill;
extern ULONG_PTR KiIA64PtaSign;
#define PTA_SIGN KiIA64PtaSign
#define VA_FILL KiIA64VaSignedFill
#define SADDRESS_BASE 0x2000000000000000UI64 // session base address
#define PTE_UBASE PCR->PteUbase
#define PTE_KBASE PCR->PteKbase
#define PTE_SBASE PCR->PteSbase
#define PTE_UTOP (PTE_UBASE|(((ULONG_PTR)1 << PDI1_SHIFT) - 1)) // top level PDR address (user)
#define PTE_KTOP (PTE_KBASE|(((ULONG_PTR)1 << PDI1_SHIFT) - 1)) // top level PDR address (kernel)
#define PTE_STOP (PTE_SBASE|(((ULONG_PTR)1 << PDI1_SHIFT) - 1)) // top level PDR address (session)
//
// Second level user and kernel PDR address
//
#define PDE_UBASE PCR->PdeUbase
#define PDE_KBASE PCR->PdeKbase
#define PDE_SBASE PCR->PdeSbase
#define PDE_UTOP (PDE_UBASE|(((ULONG_PTR)1 << PDI_SHIFT) - 1)) // second level PDR address (user)
#define PDE_KTOP (PDE_KBASE|(((ULONG_PTR)1 << PDI_SHIFT) - 1)) // second level PDR address (kernel)
#define PDE_STOP (PDE_SBASE|(((ULONG_PTR)1 << PDI_SHIFT) - 1)) // second level PDR address (session)
//
// 8KB first level user and kernel PDR address
//
#define PDE_UTBASE PCR->PdeUtbase
#define PDE_KTBASE PCR->PdeKtbase
#define PDE_STBASE PCR->PdeStbase
#define PDE_USELFMAP (PDE_UTBASE|(PAGE_SIZE - (1<<PTE_SHIFT))) // self mapped PPE address (user)
#define PDE_KSELFMAP (PDE_KTBASE|(PAGE_SIZE - (1<<PTE_SHIFT))) // self mapped PPE address (kernel)
#define PDE_SSELFMAP (PDE_STBASE|(PAGE_SIZE - (1<<PTE_SHIFT))) // self mapped PPE address (kernel)
#define PTE_BASE PTE_UBASE
#define PDE_BASE PDE_UBASE
#define PDE_TBASE PDE_UTBASE
#define PDE_SELFMAP PDE_USELFMAP
#define KSEG0_BASE (KADDRESS_BASE + 0x80000000) // base of kernel
#define KSEG2_BASE (KADDRESS_BASE + 0xA0000000) // end of kernel
#define KSEG3_BASE 0x8000000000000000UI64
#define KSEG3_LIMIT 0x8000100000000000UI64
#define KSEG4_BASE 0xA000000000000000UI64
#define KSEG4_LIMIT 0xA000100000000000UI64
//
//++
//PVOID
//KSEG_ADDRESS (
// IN ULONG PAGE
// );
//
// Routine Description:
//
// This macro returns a KSEG virtual address which maps the page.
//
// Arguments:
//
// PAGE - Supplies the physical page frame number
//
// Return Value:
//
// The address of the KSEG address
//
//--
#define KSEG_ADDRESS(PAGE) ((PVOID)(KSEG3_BASE | ((ULONG_PTR)(PAGE) << PAGE_SHIFT)))
#define KSEG4_ADDRESS(PAGE) ((PVOID)(KSEG4_BASE | ((ULONG_PTR)(PAGE) << PAGE_SHIFT)))
#define MAXIMUM_FWP_BUFFER_ENTRY 8
typedef struct _REGION_MAP_INFO {
ULONG RegionId;
ULONG PageSize;
ULONGLONG SequenceNumber;
} REGION_MAP_INFO, *PREGION_MAP_INFO;
// begin_ntddk begin_wdm
//
// The lowest address for system space.
//
#define MM_LOWEST_SYSTEM_ADDRESS ((PVOID)((ULONG_PTR)(KADDRESS_BASE + 0xC0C00000)))
// end_nthal end_ntddk end_wdm
#define SYSTEM_BASE (KADDRESS_BASE + 0xC3000000) // start of system space (no typecast)
//
// Define macro to initialize directory table base.
//
#define INITIALIZE_DIRECTORY_TABLE_BASE(dirbase, pfn) \
*((PULONGLONG)(dirbase)) = 0; \
((PHARDWARE_PTE)(dirbase))->PageFrameNumber = pfn; \
((PHARDWARE_PTE)(dirbase))->Accessed = 1; \
((PHARDWARE_PTE)(dirbase))->Dirty = 1; \
((PHARDWARE_PTE)(dirbase))->Cache = 0; \
((PHARDWARE_PTE)(dirbase))->Write = 1; \
((PHARDWARE_PTE)(dirbase))->Valid = 1;
//
// IA64 function definitions
//
//++
//
// BOOLEAN
// KiIsThreadNumericStateSaved(
// IN PKTHREAD Address
// )
//
// This call is used on a not running thread to see if it's numeric
// state has been saved in it's context information. On IA64 the
// numeric state is always saved.
//
//--
#define KiIsThreadNumericStateSaved(a) TRUE
//++
//
// VOID
// KiRundownThread(
// IN PKTHREAD Address
// )
//
//--
#define KiRundownThread(a)
//
// ia64 Feature bit definitions
//
#define KF_BRL 0x00000001 // processor supports long branch instruction.
//
// Define macro to test if x86 feature is present.
//
// N.B. All x86 features test TRUE on IA64 systems.
//
#define Isx86FeaturePresent(_f_) TRUE
// begin_nthal begin_ntddk begin_ntndis begin_wdm begin_ntosp
#endif // defined(_IA64_)
//
// Defines the Type in the RESOURCE_DESCRIPTOR
//
// NOTE: For all CM_RESOURCE_TYPE values, there must be a
// corresponding ResType value in the 32-bit ConfigMgr headerfile
// (cfgmgr32.h). Values in the range [0x6,0x80) use the same values
// as their ConfigMgr counterparts. CM_RESOURCE_TYPE values with
// the high bit set (i.e., in the range [0x80,0xFF]), are
// non-arbitrated resources. These correspond to the same values
// in cfgmgr32.h that have their high bit set (however, since
// cfgmgr32.h uses 16 bits for ResType values, these values are in
// the range [0x8000,0x807F). Note that ConfigMgr ResType values
// cannot be in the range [0x8080,0xFFFF), because they would not
// be able to map into CM_RESOURCE_TYPE values. (0xFFFF itself is
// a special value, because it maps to CmResourceTypeDeviceSpecific.)
//
typedef int CM_RESOURCE_TYPE;
// CmResourceTypeNull is reserved
#define CmResourceTypeNull 0 // ResType_All or ResType_None (0x0000)
#define CmResourceTypePort 1 // ResType_IO (0x0002)
#define CmResourceTypeInterrupt 2 // ResType_IRQ (0x0004)
#define CmResourceTypeMemory 3 // ResType_Mem (0x0001)
#define CmResourceTypeDma 4 // ResType_DMA (0x0003)
#define CmResourceTypeDeviceSpecific 5 // ResType_ClassSpecific (0xFFFF)
#define CmResourceTypeBusNumber 6 // ResType_BusNumber (0x0006)
// end_wdm
#define CmResourceTypeMaximum 7
// begin_wdm
#define CmResourceTypeNonArbitrated 128 // Not arbitrated if 0x80 bit set
#define CmResourceTypeConfigData 128 // ResType_Reserved (0x8000)
#define CmResourceTypeDevicePrivate 129 // ResType_DevicePrivate (0x8001)
#define CmResourceTypePcCardConfig 130 // ResType_PcCardConfig (0x8002)
#define CmResourceTypeMfCardConfig 131 // ResType_MfCardConfig (0x8003)
//
// Defines the ShareDisposition in the RESOURCE_DESCRIPTOR
//
typedef enum _CM_SHARE_DISPOSITION {
CmResourceShareUndetermined = 0, // Reserved
CmResourceShareDeviceExclusive,
CmResourceShareDriverExclusive,
CmResourceShareShared
} CM_SHARE_DISPOSITION;
//
// Define the bit masks for Flags when type is CmResourceTypeInterrupt
//
#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE 0
#define CM_RESOURCE_INTERRUPT_LATCHED 1
//
// Define the bit masks for Flags when type is CmResourceTypeMemory
//
#define CM_RESOURCE_MEMORY_READ_WRITE 0x0000
#define CM_RESOURCE_MEMORY_READ_ONLY 0x0001
#define CM_RESOURCE_MEMORY_WRITE_ONLY 0x0002
#define CM_RESOURCE_MEMORY_PREFETCHABLE 0x0004
#define CM_RESOURCE_MEMORY_COMBINEDWRITE 0x0008
#define CM_RESOURCE_MEMORY_24 0x0010
#define CM_RESOURCE_MEMORY_CACHEABLE 0x0020
//
// Define the bit masks for Flags when type is CmResourceTypePort
//
#define CM_RESOURCE_PORT_MEMORY 0x0000
#define CM_RESOURCE_PORT_IO 0x0001
#define CM_RESOURCE_PORT_10_BIT_DECODE 0x0004
#define CM_RESOURCE_PORT_12_BIT_DECODE 0x0008
#define CM_RESOURCE_PORT_16_BIT_DECODE 0x0010
#define CM_RESOURCE_PORT_POSITIVE_DECODE 0x0020
#define CM_RESOURCE_PORT_PASSIVE_DECODE 0x0040
#define CM_RESOURCE_PORT_WINDOW_DECODE 0x0080
//
// Define the bit masks for Flags when type is CmResourceTypeDma
//
#define CM_RESOURCE_DMA_8 0x0000
#define CM_RESOURCE_DMA_16 0x0001
#define CM_RESOURCE_DMA_32 0x0002
#define CM_RESOURCE_DMA_8_AND_16 0x0004
#define CM_RESOURCE_DMA_BUS_MASTER 0x0008
#define CM_RESOURCE_DMA_TYPE_A 0x0010
#define CM_RESOURCE_DMA_TYPE_B 0x0020
#define CM_RESOURCE_DMA_TYPE_F 0x0040
#include "pshpack4.h"
typedef struct _CM_PARTIAL_RESOURCE_DESCRIPTOR {
UCHAR Type;
UCHAR ShareDisposition;
USHORT Flags;
union {
//
// Range of resources, inclusive. These are physical, bus relative.
// It is known that Port and Memory below have the exact same layout
// as Generic.
//
struct {
PHYSICAL_ADDRESS Start;
ULONG Length;
} Generic;
//
// end_wdm
// Range of port numbers, inclusive. These are physical, bus
// relative. The value should be the same as the one passed to
// HalTranslateBusAddress().
// begin_wdm
//
struct {
PHYSICAL_ADDRESS Start;
ULONG Length;
} Port;
//
// end_wdm
// IRQL and vector. Should be same values as were passed to
// HalGetInterruptVector().
// begin_wdm
//
struct {
ULONG Level;
ULONG Vector;
KAFFINITY Affinity;
} Interrupt;
//
// Range of memory addresses, inclusive. These are physical, bus
// relative. The value should be the same as the one passed to
// HalTranslateBusAddress().
//
struct {
PHYSICAL_ADDRESS Start; // 64 bit physical addresses.
ULONG Length;
} Memory;
//
// Physical DMA channel.
//
struct {
ULONG Channel;
ULONG Port;
ULONG Reserved1;
} Dma;
//
// Device driver private data, usually used to help it figure
// what the resource assignments decisions that were made.
//
struct {
ULONG Data[3];
} DevicePrivate;
//
// Bus Number information.
//
struct {
ULONG Start;
ULONG Length;
ULONG Reserved;
} BusNumber;
//
// Device Specific information defined by the driver.
// The DataSize field indicates the size of the data in bytes. The
// data is located immediately after the DeviceSpecificData field in
// the structure.
//
struct {
ULONG DataSize;
ULONG Reserved1;
ULONG Reserved2;
} DeviceSpecificData;
} u;
} CM_PARTIAL_RESOURCE_DESCRIPTOR, *PCM_PARTIAL_RESOURCE_DESCRIPTOR;
#include "poppack.h"
//
// A Partial Resource List is what can be found in the ARC firmware
// or will be generated by ntdetect.com.
// The configuration manager will transform this structure into a Full
// resource descriptor when it is about to store it in the regsitry.
//
// Note: There must a be a convention to the order of fields of same type,
// (defined on a device by device basis) so that the fields can make sense
// to a driver (i.e. when multiple memory ranges are necessary).
//
typedef struct _CM_PARTIAL_RESOURCE_LIST {
USHORT Version;
USHORT Revision;
ULONG Count;
CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1];
} CM_PARTIAL_RESOURCE_LIST, *PCM_PARTIAL_RESOURCE_LIST;
//
// A Full Resource Descriptor is what can be found in the registry.
// This is what will be returned to a driver when it queries the registry
// to get device information; it will be stored under a key in the hardware
// description tree.
//
// end_wdm
// Note: The BusNumber and Type are redundant information, but we will keep
// it since it allows the driver _not_ to append it when it is creating
// a resource list which could possibly span multiple buses.
//
// begin_wdm
// Note: There must a be a convention to the order of fields of same type,
// (defined on a device by device basis) so that the fields can make sense
// to a driver (i.e. when multiple memory ranges are necessary).
//
typedef struct _CM_FULL_RESOURCE_DESCRIPTOR {
INTERFACE_TYPE InterfaceType; // unused for WDM
ULONG BusNumber; // unused for WDM
CM_PARTIAL_RESOURCE_LIST PartialResourceList;
} CM_FULL_RESOURCE_DESCRIPTOR, *PCM_FULL_RESOURCE_DESCRIPTOR;
//
// The Resource list is what will be stored by the drivers into the
// resource map via the IO API.
//
typedef struct _CM_RESOURCE_LIST {
ULONG Count;
CM_FULL_RESOURCE_DESCRIPTOR List[1];
} CM_RESOURCE_LIST, *PCM_RESOURCE_LIST;
#include "pshpack1.h"
//
// Define Mca POS data block for slot
//
typedef struct _CM_MCA_POS_DATA {
USHORT AdapterId;
UCHAR PosData1;
UCHAR PosData2;
UCHAR PosData3;
UCHAR PosData4;
} CM_MCA_POS_DATA, *PCM_MCA_POS_DATA;
//
// Memory configuration of eisa data block structure
//
typedef struct _EISA_MEMORY_TYPE {
UCHAR ReadWrite: 1;
UCHAR Cached : 1;
UCHAR Reserved0 :1;
UCHAR Type:2;
UCHAR Shared:1;
UCHAR Reserved1 :1;
UCHAR MoreEntries : 1;
} EISA_MEMORY_TYPE, *PEISA_MEMORY_TYPE;
typedef struct _EISA_MEMORY_CONFIGURATION {
EISA_MEMORY_TYPE ConfigurationByte;
UCHAR DataSize;
USHORT AddressLowWord;
UCHAR AddressHighByte;
USHORT MemorySize;
} EISA_MEMORY_CONFIGURATION, *PEISA_MEMORY_CONFIGURATION;
//
// Interrupt configurationn of eisa data block structure
//
typedef struct _EISA_IRQ_DESCRIPTOR {
UCHAR Interrupt : 4;
UCHAR Reserved :1;
UCHAR LevelTriggered :1;
UCHAR Shared : 1;
UCHAR MoreEntries : 1;
} EISA_IRQ_DESCRIPTOR, *PEISA_IRQ_DESCRIPTOR;
typedef struct _EISA_IRQ_CONFIGURATION {
EISA_IRQ_DESCRIPTOR ConfigurationByte;
UCHAR Reserved;
} EISA_IRQ_CONFIGURATION, *PEISA_IRQ_CONFIGURATION;
//
// DMA description of eisa data block structure
//
typedef struct _DMA_CONFIGURATION_BYTE0 {
UCHAR Channel : 3;
UCHAR Reserved : 3;
UCHAR Shared :1;
UCHAR MoreEntries :1;
} DMA_CONFIGURATION_BYTE0;
typedef struct _DMA_CONFIGURATION_BYTE1 {
UCHAR Reserved0 : 2;
UCHAR TransferSize : 2;
UCHAR Timing : 2;
UCHAR Reserved1 : 2;
} DMA_CONFIGURATION_BYTE1;
typedef struct _EISA_DMA_CONFIGURATION {
DMA_CONFIGURATION_BYTE0 ConfigurationByte0;
DMA_CONFIGURATION_BYTE1 ConfigurationByte1;
} EISA_DMA_CONFIGURATION, *PEISA_DMA_CONFIGURATION;
//
// Port description of eisa data block structure
//
typedef struct _EISA_PORT_DESCRIPTOR {
UCHAR NumberPorts : 5;
UCHAR Reserved :1;
UCHAR Shared :1;
UCHAR MoreEntries : 1;
} EISA_PORT_DESCRIPTOR, *PEISA_PORT_DESCRIPTOR;
typedef struct _EISA_PORT_CONFIGURATION {
EISA_PORT_DESCRIPTOR Configuration;
USHORT PortAddress;
} EISA_PORT_CONFIGURATION, *PEISA_PORT_CONFIGURATION;
//
// Eisa slot information definition
// N.B. This structure is different from the one defined
// in ARC eisa addendum.
//
typedef struct _CM_EISA_SLOT_INFORMATION {
UCHAR ReturnCode;
UCHAR ReturnFlags;
UCHAR MajorRevision;
UCHAR MinorRevision;
USHORT Checksum;
UCHAR NumberFunctions;
UCHAR FunctionInformation;
ULONG CompressedId;
} CM_EISA_SLOT_INFORMATION, *PCM_EISA_SLOT_INFORMATION;
//
// Eisa function information definition
//
typedef struct _CM_EISA_FUNCTION_INFORMATION {
ULONG CompressedId;
UCHAR IdSlotFlags1;
UCHAR IdSlotFlags2;
UCHAR MinorRevision;
UCHAR MajorRevision;
UCHAR Selections[26];
UCHAR FunctionFlags;
UCHAR TypeString[80];
EISA_MEMORY_CONFIGURATION EisaMemory[9];
EISA_IRQ_CONFIGURATION EisaIrq[7];
EISA_DMA_CONFIGURATION EisaDma[4];
EISA_PORT_CONFIGURATION EisaPort[20];
UCHAR InitializationData[60];
} CM_EISA_FUNCTION_INFORMATION, *PCM_EISA_FUNCTION_INFORMATION;
//
// The following defines the way pnp bios information is stored in
// the registry \\HKEY_LOCAL_MACHINE\HARDWARE\Description\System\MultifunctionAdapter\x
// key, where x is an integer number indicating adapter instance. The
// "Identifier" of the key must equal to "PNP BIOS" and the
// "ConfigurationData" is organized as follow:
//
// CM_PNP_BIOS_INSTALLATION_CHECK +
// CM_PNP_BIOS_DEVICE_NODE for device 1 +
// CM_PNP_BIOS_DEVICE_NODE for device 2 +
// ...
// CM_PNP_BIOS_DEVICE_NODE for device n
//
//
// Pnp BIOS device node structure
//
typedef struct _CM_PNP_BIOS_DEVICE_NODE {
USHORT Size;
UCHAR Node;
ULONG ProductId;
UCHAR DeviceType[3];
USHORT DeviceAttributes;
// followed by AllocatedResourceBlock, PossibleResourceBlock
// and CompatibleDeviceId
} CM_PNP_BIOS_DEVICE_NODE,*PCM_PNP_BIOS_DEVICE_NODE;
//
// Pnp BIOS Installation check
//
typedef struct _CM_PNP_BIOS_INSTALLATION_CHECK {
UCHAR Signature[4]; // $PnP (ascii)
UCHAR Revision;
UCHAR Length;
USHORT ControlField;
UCHAR Checksum;
ULONG EventFlagAddress; // Physical address
USHORT RealModeEntryOffset;
USHORT RealModeEntrySegment;
USHORT ProtectedModeEntryOffset;
ULONG ProtectedModeCodeBaseAddress;
ULONG OemDeviceId;
USHORT RealModeDataBaseAddress;
ULONG ProtectedModeDataBaseAddress;
} CM_PNP_BIOS_INSTALLATION_CHECK, *PCM_PNP_BIOS_INSTALLATION_CHECK;
#include "poppack.h"
//
// Masks for EISA function information
//
#define EISA_FUNCTION_ENABLED 0x80
#define EISA_FREE_FORM_DATA 0x40
#define EISA_HAS_PORT_INIT_ENTRY 0x20
#define EISA_HAS_PORT_RANGE 0x10
#define EISA_HAS_DMA_ENTRY 0x08
#define EISA_HAS_IRQ_ENTRY 0x04
#define EISA_HAS_MEMORY_ENTRY 0x02
#define EISA_HAS_TYPE_ENTRY 0x01
#define EISA_HAS_INFORMATION EISA_HAS_PORT_RANGE + \
EISA_HAS_DMA_ENTRY + \
EISA_HAS_IRQ_ENTRY + \
EISA_HAS_MEMORY_ENTRY + \
EISA_HAS_TYPE_ENTRY
//
// Masks for EISA memory configuration
//
#define EISA_MORE_ENTRIES 0x80
#define EISA_SYSTEM_MEMORY 0x00
#define EISA_MEMORY_TYPE_RAM 0x01
//
// Returned error code for EISA bios call
//
#define EISA_INVALID_SLOT 0x80
#define EISA_INVALID_FUNCTION 0x81
#define EISA_INVALID_CONFIGURATION 0x82
#define EISA_EMPTY_SLOT 0x83
#define EISA_INVALID_BIOS_CALL 0x86
//
// Interrupt modes.
//
typedef enum _KINTERRUPT_MODE {
LevelSensitive,
Latched
} KINTERRUPT_MODE;
typedef struct _KINTERRUPT *PKINTERRUPT, *RESTRICTED_POINTER PRKINTERRUPT;
//
// On X86 the following routines are defined in the HAL and imported by
// all other modules.
//
#if defined(_X86_) && !defined(_NTHAL_)
#define _DECL_HAL_KE_IMPORT __declspec(dllimport)
#else
#define _DECL_HAL_KE_IMPORT
#endif
//
// spin lock functions
//
NTKERNELAPI
VOID
NTAPI
KeInitializeSpinLock (
IN PKSPIN_LOCK SpinLock
);
#if defined(_X86_)
NTKERNELAPI
VOID
FASTCALL
KefAcquireSpinLockAtDpcLevel (
IN PKSPIN_LOCK SpinLock
);
NTKERNELAPI
VOID
FASTCALL
KefReleaseSpinLockFromDpcLevel (
IN PKSPIN_LOCK SpinLock
);
#define KeAcquireSpinLockAtDpcLevel(a) KefAcquireSpinLockAtDpcLevel(a)
#define KeReleaseSpinLockFromDpcLevel(a) KefReleaseSpinLockFromDpcLevel(a)
_DECL_HAL_KE_IMPORT
KIRQL
FASTCALL
KfAcquireSpinLock (
IN PKSPIN_LOCK SpinLock
);
_DECL_HAL_KE_IMPORT
VOID
FASTCALL
KfReleaseSpinLock (
IN PKSPIN_LOCK SpinLock,
IN KIRQL NewIrql
);
// end_wdm
_DECL_HAL_KE_IMPORT
KIRQL
FASTCALL
KeAcquireSpinLockRaiseToSynch (
IN PKSPIN_LOCK SpinLock
);
// begin_wdm
#define KeAcquireSpinLock(a,b) *(b) = KfAcquireSpinLock(a)
#define KeReleaseSpinLock(a,b) KfReleaseSpinLock(a,b)
#else
NTKERNELAPI
KIRQL
FASTCALL
KeAcquireSpinLockRaiseToSynch (
IN PKSPIN_LOCK SpinLock
);
NTKERNELAPI
VOID
KeAcquireSpinLockAtDpcLevel (
IN PKSPIN_LOCK SpinLock
);
NTKERNELAPI
VOID
KeReleaseSpinLockFromDpcLevel (
IN PKSPIN_LOCK SpinLock
);
NTKERNELAPI
KIRQL
KeAcquireSpinLockRaiseToDpc (
IN PKSPIN_LOCK SpinLock
);
#define KeAcquireSpinLock(SpinLock, OldIrql) \
*(OldIrql) = KeAcquireSpinLockRaiseToDpc(SpinLock)
NTKERNELAPI
VOID
KeReleaseSpinLock (
IN PKSPIN_LOCK SpinLock,
IN KIRQL NewIrql
);
#endif
NTKERNELAPI
BOOLEAN
FASTCALL
KeTryToAcquireSpinLockAtDpcLevel (
IN PKSPIN_LOCK SpinLock
);
//
// Define I/O system data structure type codes. Each major data structure in
// the I/O system has a type code The type field in each structure is at the
// same offset. The following values can be used to determine which type of
// data structure a pointer refers to.
//
#define IO_TYPE_ADAPTER 0x00000001
#define IO_TYPE_CONTROLLER 0x00000002
#define IO_TYPE_DEVICE 0x00000003
#define IO_TYPE_DRIVER 0x00000004
#define IO_TYPE_FILE 0x00000005
#define IO_TYPE_IRP 0x00000006
#define IO_TYPE_MASTER_ADAPTER 0x00000007
#define IO_TYPE_OPEN_PACKET 0x00000008
#define IO_TYPE_TIMER 0x00000009
#define IO_TYPE_VPB 0x0000000a
#define IO_TYPE_ERROR_LOG 0x0000000b
#define IO_TYPE_ERROR_MESSAGE 0x0000000c
#define IO_TYPE_DEVICE_OBJECT_EXTENSION 0x0000000d
//
// Define the major function codes for IRPs.
//
#define IRP_MJ_CREATE 0x00
#define IRP_MJ_CREATE_NAMED_PIPE 0x01
#define IRP_MJ_CLOSE 0x02
#define IRP_MJ_READ 0x03
#define IRP_MJ_WRITE 0x04
#define IRP_MJ_QUERY_INFORMATION 0x05
#define IRP_MJ_SET_INFORMATION 0x06
#define IRP_MJ_QUERY_EA 0x07
#define IRP_MJ_SET_EA 0x08
#define IRP_MJ_FLUSH_BUFFERS 0x09
#define IRP_MJ_QUERY_VOLUME_INFORMATION 0x0a
#define IRP_MJ_SET_VOLUME_INFORMATION 0x0b
#define IRP_MJ_DIRECTORY_CONTROL 0x0c
#define IRP_MJ_FILE_SYSTEM_CONTROL 0x0d
#define IRP_MJ_DEVICE_CONTROL 0x0e
#define IRP_MJ_INTERNAL_DEVICE_CONTROL 0x0f
#define IRP_MJ_SHUTDOWN 0x10
#define IRP_MJ_LOCK_CONTROL 0x11
#define IRP_MJ_CLEANUP 0x12
#define IRP_MJ_CREATE_MAILSLOT 0x13
#define IRP_MJ_QUERY_SECURITY 0x14
#define IRP_MJ_SET_SECURITY 0x15
#define IRP_MJ_POWER 0x16
#define IRP_MJ_SYSTEM_CONTROL 0x17
#define IRP_MJ_DEVICE_CHANGE 0x18
#define IRP_MJ_QUERY_QUOTA 0x19
#define IRP_MJ_SET_QUOTA 0x1a
#define IRP_MJ_PNP 0x1b
#define IRP_MJ_PNP_POWER IRP_MJ_PNP // Obsolete....
#define IRP_MJ_MAXIMUM_FUNCTION 0x1b
//
// Make the Scsi major code the same as internal device control.
//
#define IRP_MJ_SCSI IRP_MJ_INTERNAL_DEVICE_CONTROL
//
// Define the minor function codes for IRPs. The lower 128 codes, from 0x00 to
// 0x7f are reserved to Microsoft. The upper 128 codes, from 0x80 to 0xff, are
// reserved to customers of Microsoft.
//
//
// Define driver cancel routine type.
//
typedef
VOID
(*PDRIVER_CANCEL) (
IN struct _DEVICE_OBJECT *DeviceObject,
IN struct _IRP *Irp
);
//
// Define driver dispatch routine type.
//
typedef
NTSTATUS
(*PDRIVER_DISPATCH) (
IN struct _DEVICE_OBJECT *DeviceObject,
IN struct _IRP *Irp
);
//
// Define driver start I/O routine type.
//
typedef
VOID
(*PDRIVER_STARTIO) (
IN struct _DEVICE_OBJECT *DeviceObject,
IN struct _IRP *Irp
);
//
// Define driver unload routine type.
//
typedef
VOID
(*PDRIVER_UNLOAD) (
IN struct _DRIVER_OBJECT *DriverObject
);
//
// Define driver AddDevice routine type.
//
typedef
NTSTATUS
(*PDRIVER_ADD_DEVICE) (
IN struct _DRIVER_OBJECT *DriverObject,
IN struct _DEVICE_OBJECT *PhysicalDeviceObject
);
typedef struct _ADAPTER_OBJECT *PADAPTER_OBJECT;
typedef struct _DEVICE_OBJECT *PDEVICE_OBJECT;
typedef struct _DRIVER_OBJECT *PDRIVER_OBJECT;
typedef struct _FILE_OBJECT *PFILE_OBJECT;
#if defined(_WIN64)
#define POINTER_ALIGNMENT DECLSPEC_ALIGN(8)
#else
#define POINTER_ALIGNMENT
#endif
#if defined(_ALPHA_) || defined(_IA64_)
DECLSPEC_DEPRECATED_DDK // Use GetDmaRequirement
NTHALAPI
ULONG
HalGetDmaAlignmentRequirement (
VOID
);
#endif
#if defined(_M_IX86) || defined(_M_AMD64)
#define HalGetDmaAlignmentRequirement() 1L
#endif
NTHALAPI
VOID
KeFlushWriteBuffer (
VOID
);
//
// Stall processor execution function.
//
NTHALAPI
VOID
KeStallExecutionProcessor (
IN ULONG MicroSeconds
);
typedef struct _SCATTER_GATHER_ELEMENT {
PHYSICAL_ADDRESS Address;
ULONG Length;
ULONG_PTR Reserved;
} SCATTER_GATHER_ELEMENT, *PSCATTER_GATHER_ELEMENT;
#pragma warning(disable:4200)
typedef struct _SCATTER_GATHER_LIST {
ULONG NumberOfElements;
ULONG_PTR Reserved;
SCATTER_GATHER_ELEMENT Elements[];
} SCATTER_GATHER_LIST, *PSCATTER_GATHER_LIST;
#pragma warning(default:4200)
//
// Pool Allocation routines (in pool.c)
//
typedef enum _POOL_TYPE {
NonPagedPool,
PagedPool,
NonPagedPoolMustSucceed,
DontUseThisType,
NonPagedPoolCacheAligned,
PagedPoolCacheAligned,
NonPagedPoolCacheAlignedMustS,
MaxPoolType
// end_wdm
,
//
// Note these per session types are carefully chosen so that the appropriate
// masking still applies as well as MaxPoolType above.
//
NonPagedPoolSession = 32,
PagedPoolSession = NonPagedPoolSession + 1,
NonPagedPoolMustSucceedSession = PagedPoolSession + 1,
DontUseThisTypeSession = NonPagedPoolMustSucceedSession + 1,
NonPagedPoolCacheAlignedSession = DontUseThisTypeSession + 1,
PagedPoolCacheAlignedSession = NonPagedPoolCacheAlignedSession + 1,
NonPagedPoolCacheAlignedMustSSession = PagedPoolCacheAlignedSession + 1,
// begin_wdm
} POOL_TYPE;
#define POOL_COLD_ALLOCATION 256 // Note this cannot encode into the header.
//
NTKERNELAPI
VOID
FASTCALL
ExInterlockedAddLargeStatistic (
IN PLARGE_INTEGER Addend,
IN ULONG Increment
);
//
// Define interlocked sequenced listhead functions.
//
// A sequenced interlocked list is a singly linked list with a header that
// contains the current depth and a sequence number. Each time an entry is
// inserted or removed from the list the depth is updated and the sequence
// number is incremented. This enables AMD64, IA64, and Pentium and later
// machines to insert and remove from the list without the use of spinlocks.
//
#if !defined(_WINBASE_)
/*++
Routine Description:
This function initializes a sequenced singly linked listhead.
Arguments:
SListHead - Supplies a pointer to a sequenced singly linked listhead.
Return Value:
None.
--*/
#if defined(_WIN64) && (defined(_NTDRIVER_) || defined(_NTDDK_) || defined(_NTIFS_) || defined(_NTHAL_) || defined(_NTOSP_))
NTKERNELAPI
VOID
InitializeSListHead (
IN PSLIST_HEADER SListHead
);
#else
__inline
VOID
InitializeSListHead (
IN PSLIST_HEADER SListHead
)
{
#ifdef _WIN64
//
// Slist headers must be 16 byte aligned.
//
if ((ULONG_PTR) SListHead & 0x0f) {
DbgPrint( "InitializeSListHead unaligned Slist header. Address = %p, Caller = %p\n", SListHead, _ReturnAddress());
RtlRaiseStatus(STATUS_DATATYPE_MISALIGNMENT);
}
#endif
SListHead->Alignment = 0;
//
// For IA-64 we save the region number of the elements of the list in a
// separate field. This imposes the requirement that all elements stored
// in the list are from the same region.
#if defined(_IA64_)
SListHead->Region = (ULONG_PTR)SListHead & VRN_MASK;
#elif defined(_AMD64_)
SListHead->Region = 0;
#endif
return;
}
#endif
#endif // !defined(_WINBASE_)
#define ExInitializeSListHead InitializeSListHead
PSLIST_ENTRY
FirstEntrySList (
IN const SLIST_HEADER *SListHead
);
/*++
Routine Description:
This function queries the current number of entries contained in a
sequenced single linked list.
Arguments:
SListHead - Supplies a pointer to the sequenced listhead which is
be queried.
Return Value:
The current number of entries in the sequenced singly linked list is
returned as the function value.
--*/
#if defined(_WIN64)
#if (defined(_NTDRIVER_) || defined(_NTDDK_) || defined(_NTIFS_) || defined(_NTHAL_) || defined(_NTOSP_))
NTKERNELAPI
USHORT
ExQueryDepthSList (
IN PSLIST_HEADER SListHead
);
#else
__inline
USHORT
ExQueryDepthSList (
IN PSLIST_HEADER SListHead
)
{
return (USHORT)(SListHead->Alignment & 0xffff);
}
#endif
#else
#define ExQueryDepthSList(_listhead_) (_listhead_)->Depth
#endif
#if defined(_WIN64)
#define ExInterlockedPopEntrySList(Head, Lock) \
ExpInterlockedPopEntrySList(Head)
#define ExInterlockedPushEntrySList(Head, Entry, Lock) \
ExpInterlockedPushEntrySList(Head, Entry)
#define ExInterlockedFlushSList(Head) \
ExpInterlockedFlushSList(Head)
#if !defined(_WINBASE_)
#define InterlockedPopEntrySList(Head) \
ExpInterlockedPopEntrySList(Head)
#define InterlockedPushEntrySList(Head, Entry) \
ExpInterlockedPushEntrySList(Head, Entry)
#define InterlockedFlushSList(Head) \
ExpInterlockedFlushSList(Head)
#define QueryDepthSList(Head) \
ExQueryDepthSList(Head)
#endif // !defined(_WINBASE_)
NTKERNELAPI
PSLIST_ENTRY
ExpInterlockedPopEntrySList (
IN PSLIST_HEADER ListHead
);
NTKERNELAPI
PSLIST_ENTRY
ExpInterlockedPushEntrySList (
IN PSLIST_HEADER ListHead,
IN PSLIST_ENTRY ListEntry
);
NTKERNELAPI
PSLIST_ENTRY
ExpInterlockedFlushSList (
IN PSLIST_HEADER ListHead
);
#else
#if defined(_WIN2K_COMPAT_SLIST_USAGE) && defined(_X86_)
NTKERNELAPI
PSLIST_ENTRY
FASTCALL
ExInterlockedPopEntrySList (
IN PSLIST_HEADER ListHead,
IN PKSPIN_LOCK Lock
);
NTKERNELAPI
PSLIST_ENTRY
FASTCALL
ExInterlockedPushEntrySList (
IN PSLIST_HEADER ListHead,
IN PSLIST_ENTRY ListEntry,
IN PKSPIN_LOCK Lock
);
#else
#define ExInterlockedPopEntrySList(ListHead, Lock) \
InterlockedPopEntrySList(ListHead)
#define ExInterlockedPushEntrySList(ListHead, ListEntry, Lock) \
InterlockedPushEntrySList(ListHead, ListEntry)
#endif
NTKERNELAPI
PSLIST_ENTRY
FASTCALL
ExInterlockedFlushSList (
IN PSLIST_HEADER ListHead
);
#if !defined(_WINBASE_)
NTKERNELAPI
PSLIST_ENTRY
FASTCALL
InterlockedPopEntrySList (
IN PSLIST_HEADER ListHead
);
NTKERNELAPI
PSLIST_ENTRY
FASTCALL
InterlockedPushEntrySList (
IN PSLIST_HEADER ListHead,
IN PSLIST_ENTRY ListEntry
);
#define InterlockedFlushSList(Head) \
ExInterlockedFlushSList(Head)
#define QueryDepthSList(Head) \
ExQueryDepthSList(Head)
#endif // !defined(_WINBASE_)
#endif // defined(_WIN64)
// end_ntddk end_wdm end_ntosp
PSLIST_ENTRY
FASTCALL
InterlockedPushListSList (
IN PSLIST_HEADER ListHead,
IN PSLIST_ENTRY List,
IN PSLIST_ENTRY ListEnd,
IN ULONG Count
);
//
// Define interlocked lookaside list structure and allocation functions.
//
VOID
ExAdjustLookasideDepth (
VOID
);
// begin_ntddk begin_wdm begin_ntosp
typedef
PVOID
(*PALLOCATE_FUNCTION) (
IN POOL_TYPE PoolType,
IN SIZE_T NumberOfBytes,
IN ULONG Tag
);
typedef
VOID
(*PFREE_FUNCTION) (
IN PVOID Buffer
);
#if !defined(_WIN64) && (defined(_NTDDK_) || defined(_NTIFS_) || defined(_NDIS_))
typedef struct _GENERAL_LOOKASIDE {
#else
typedef struct DECLSPEC_CACHEALIGN _GENERAL_LOOKASIDE {
#endif
SLIST_HEADER ListHead;
USHORT Depth;
USHORT MaximumDepth;
ULONG TotalAllocates;
union {
ULONG AllocateMisses;
ULONG AllocateHits;
};
ULONG TotalFrees;
union {
ULONG FreeMisses;
ULONG FreeHits;
};
POOL_TYPE Type;
ULONG Tag;
ULONG Size;
PALLOCATE_FUNCTION Allocate;
PFREE_FUNCTION Free;
LIST_ENTRY ListEntry;
ULONG LastTotalAllocates;
union {
ULONG LastAllocateMisses;
ULONG LastAllocateHits;
};
ULONG Future[2];
} GENERAL_LOOKASIDE, *PGENERAL_LOOKASIDE;
#if !defined(_WIN64) && (defined(_NTDDK_) || defined(_NTIFS_) || defined(_NDIS_))
typedef struct _NPAGED_LOOKASIDE_LIST {
#else
typedef struct DECLSPEC_CACHEALIGN _NPAGED_LOOKASIDE_LIST {
#endif
GENERAL_LOOKASIDE L;
#if !defined(_AMD64_) && !defined(_IA64_)
KSPIN_LOCK Lock__ObsoleteButDoNotDelete;
#endif
} NPAGED_LOOKASIDE_LIST, *PNPAGED_LOOKASIDE_LIST;
NTKERNELAPI
VOID
ExInitializeNPagedLookasideList (
IN PNPAGED_LOOKASIDE_LIST Lookaside,
IN PALLOCATE_FUNCTION Allocate,
IN PFREE_FUNCTION Free,
IN ULONG Flags,
IN SIZE_T Size,
IN ULONG Tag,
IN USHORT Depth
);
NTKERNELAPI
VOID
ExDeleteNPagedLookasideList (
IN PNPAGED_LOOKASIDE_LIST Lookaside
);
__inline
PVOID
ExAllocateFromNPagedLookasideList(
IN PNPAGED_LOOKASIDE_LIST Lookaside
)
/*++
Routine Description:
This function removes (pops) the first entry from the specified
nonpaged lookaside list.
Arguments:
Lookaside - Supplies a pointer to a nonpaged lookaside list structure.
Return Value:
If an entry is removed from the specified lookaside list, then the
address of the entry is returned as the function value. Otherwise,
NULL is returned.
--*/
{
PVOID Entry;
Lookaside->L.TotalAllocates += 1;
#if defined(_WIN2K_COMPAT_SLIST_USAGE) && defined(_X86_)
Entry = ExInterlockedPopEntrySList(&Lookaside->L.ListHead,
&Lookaside->Lock__ObsoleteButDoNotDelete);
#else
Entry = InterlockedPopEntrySList(&Lookaside->L.ListHead);
#endif
if (Entry == NULL) {
Lookaside->L.AllocateMisses += 1;
Entry = (Lookaside->L.Allocate)(Lookaside->L.Type,
Lookaside->L.Size,
Lookaside->L.Tag);
}
return Entry;
}
__inline
VOID
ExFreeToNPagedLookasideList(
IN PNPAGED_LOOKASIDE_LIST Lookaside,
IN PVOID Entry
)
/*++
Routine Description:
This function inserts (pushes) the specified entry into the specified
nonpaged lookaside list.
Arguments:
Lookaside - Supplies a pointer to a nonpaged lookaside list structure.
Entry - Supples a pointer to the entry that is inserted in the
lookaside list.
Return Value:
None.
--*/
{
Lookaside->L.TotalFrees += 1;
if (ExQueryDepthSList(&Lookaside->L.ListHead) >= Lookaside->L.Depth) {
Lookaside->L.FreeMisses += 1;
(Lookaside->L.Free)(Entry);
} else {
#if defined(_WIN2K_COMPAT_SLIST_USAGE) && defined(_X86_)
ExInterlockedPushEntrySList(&Lookaside->L.ListHead,
(PSLIST_ENTRY)Entry,
&Lookaside->Lock__ObsoleteButDoNotDelete);
#else
InterlockedPushEntrySList(&Lookaside->L.ListHead,
(PSLIST_ENTRY)Entry);
#endif
}
return;
}
typedef struct _PCI_SLOT_NUMBER {
union {
struct {
ULONG DeviceNumber:5;
ULONG FunctionNumber:3;
ULONG Reserved:24;
} bits;
ULONG AsULONG;
} u;
} PCI_SLOT_NUMBER, *PPCI_SLOT_NUMBER;
#define PCI_TYPE0_ADDRESSES 6
#define PCI_TYPE1_ADDRESSES 2
#define PCI_TYPE2_ADDRESSES 5
typedef struct _PCI_COMMON_CONFIG {
USHORT VendorID; // (ro)
USHORT DeviceID; // (ro)
USHORT Command; // Device control
USHORT Status;
UCHAR RevisionID; // (ro)
UCHAR ProgIf; // (ro)
UCHAR SubClass; // (ro)
UCHAR BaseClass; // (ro)
UCHAR CacheLineSize; // (ro+)
UCHAR LatencyTimer; // (ro+)
UCHAR HeaderType; // (ro)
UCHAR BIST; // Built in self test
union {
struct _PCI_HEADER_TYPE_0 {
ULONG BaseAddresses[PCI_TYPE0_ADDRESSES];
ULONG CIS;
USHORT SubVendorID;
USHORT SubSystemID;
ULONG ROMBaseAddress;
UCHAR CapabilitiesPtr;
UCHAR Reserved1[3];
ULONG Reserved2;
UCHAR InterruptLine; //
UCHAR InterruptPin; // (ro)
UCHAR MinimumGrant; // (ro)
UCHAR MaximumLatency; // (ro)
} type0;
} u;
UCHAR DeviceSpecific[192];
} PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
#define PCI_COMMON_HDR_LENGTH (FIELD_OFFSET (PCI_COMMON_CONFIG, DeviceSpecific))
#define PCI_MAX_DEVICES 32
#define PCI_MAX_FUNCTION 8
#define PCI_MAX_BRIDGE_NUMBER 0xFF
#define PCI_INVALID_VENDORID 0xFFFF
//
// Bit encodings for PCI_COMMON_CONFIG.HeaderType
//
#define PCI_MULTIFUNCTION 0x80
#define PCI_DEVICE_TYPE 0x00
#define PCI_BRIDGE_TYPE 0x01
#define PCI_CARDBUS_BRIDGE_TYPE 0x02
#define PCI_CONFIGURATION_TYPE(PciData) \
(((PPCI_COMMON_CONFIG)(PciData))->HeaderType & ~PCI_MULTIFUNCTION)
#define PCI_MULTIFUNCTION_DEVICE(PciData) \
((((PPCI_COMMON_CONFIG)(PciData))->HeaderType & PCI_MULTIFUNCTION) != 0)
//
// Bit encodings for PCI_COMMON_CONFIG.Command
//
#define PCI_ENABLE_IO_SPACE 0x0001
#define PCI_ENABLE_MEMORY_SPACE 0x0002
#define PCI_ENABLE_BUS_MASTER 0x0004
#define PCI_ENABLE_SPECIAL_CYCLES 0x0008
#define PCI_ENABLE_WRITE_AND_INVALIDATE 0x0010
#define PCI_ENABLE_VGA_COMPATIBLE_PALETTE 0x0020
#define PCI_ENABLE_PARITY 0x0040 // (ro+)
#define PCI_ENABLE_WAIT_CYCLE 0x0080 // (ro+)
#define PCI_ENABLE_SERR 0x0100 // (ro+)
#define PCI_ENABLE_FAST_BACK_TO_BACK 0x0200 // (ro)
//
// Bit encodings for PCI_COMMON_CONFIG.Status
//
#define PCI_STATUS_CAPABILITIES_LIST 0x0010 // (ro)
#define PCI_STATUS_66MHZ_CAPABLE 0x0020 // (ro)
#define PCI_STATUS_UDF_SUPPORTED 0x0040 // (ro)
#define PCI_STATUS_FAST_BACK_TO_BACK 0x0080 // (ro)
#define PCI_STATUS_DATA_PARITY_DETECTED 0x0100
#define PCI_STATUS_DEVSEL 0x0600 // 2 bits wide
#define PCI_STATUS_SIGNALED_TARGET_ABORT 0x0800
#define PCI_STATUS_RECEIVED_TARGET_ABORT 0x1000
#define PCI_STATUS_RECEIVED_MASTER_ABORT 0x2000
#define PCI_STATUS_SIGNALED_SYSTEM_ERROR 0x4000
#define PCI_STATUS_DETECTED_PARITY_ERROR 0x8000
//
// The NT PCI Driver uses a WhichSpace parameter on its CONFIG_READ/WRITE
// routines. The following values are defined-
//
#define PCI_WHICHSPACE_CONFIG 0x0
#define PCI_WHICHSPACE_ROM 0x52696350
// end_wdm
//
// PCI Capability IDs
//
#define PCI_CAPABILITY_ID_POWER_MANAGEMENT 0x01
#define PCI_CAPABILITY_ID_AGP 0x02
#define PCI_CAPABILITY_ID_MSI 0x05
//
// All PCI Capability structures have the following header.
//
// CapabilityID is used to identify the type of the structure (is
// one of the PCI_CAPABILITY_ID values above.
//
// Next is the offset in PCI Configuration space (0x40 - 0xfc) of the
// next capability structure in the list, or 0x00 if there are no more
// entries.
//
typedef struct _PCI_CAPABILITIES_HEADER {
UCHAR CapabilityID;
UCHAR Next;
} PCI_CAPABILITIES_HEADER, *PPCI_CAPABILITIES_HEADER;
//
// Power Management Capability
//
typedef struct _PCI_PMC {
UCHAR Version:3;
UCHAR PMEClock:1;
UCHAR Rsvd1:1;
UCHAR DeviceSpecificInitialization:1;
UCHAR Rsvd2:2;
struct _PM_SUPPORT {
UCHAR Rsvd2:1;
UCHAR D1:1;
UCHAR D2:1;
UCHAR PMED0:1;
UCHAR PMED1:1;
UCHAR PMED2:1;
UCHAR PMED3Hot:1;
UCHAR PMED3Cold:1;
} Support;
} PCI_PMC, *PPCI_PMC;
typedef struct _PCI_PMCSR {
USHORT PowerState:2;
USHORT Rsvd1:6;
USHORT PMEEnable:1;
USHORT DataSelect:4;
USHORT DataScale:2;
USHORT PMEStatus:1;
} PCI_PMCSR, *PPCI_PMCSR;
typedef struct _PCI_PMCSR_BSE {
UCHAR Rsvd1:6;
UCHAR D3HotSupportsStopClock:1; // B2_B3#
UCHAR BusPowerClockControlEnabled:1; // BPCC_EN
} PCI_PMCSR_BSE, *PPCI_PMCSR_BSE;
typedef struct _PCI_PM_CAPABILITY {
PCI_CAPABILITIES_HEADER Header;
//
// Power Management Capabilities (Offset = 2)
//
union {
PCI_PMC Capabilities;
USHORT AsUSHORT;
} PMC;
//
// Power Management Control/Status (Offset = 4)
//
union {
PCI_PMCSR ControlStatus;
USHORT AsUSHORT;
} PMCSR;
//
// PMCSR PCI-PCI Bridge Support Extensions
//
union {
PCI_PMCSR_BSE BridgeSupport;
UCHAR AsUCHAR;
} PMCSR_BSE;
//
// Optional read only 8 bit Data register. Contents controlled by
// DataSelect and DataScale in ControlStatus.
//
UCHAR Data;
} PCI_PM_CAPABILITY, *PPCI_PM_CAPABILITY;
//
// AGP Capability
//
typedef struct _PCI_AGP_CAPABILITY {
PCI_CAPABILITIES_HEADER Header;
USHORT Minor:4;
USHORT Major:4;
USHORT Rsvd1:8;
struct _PCI_AGP_STATUS {
ULONG Rate:3;
ULONG Rsvd1:1;
ULONG FastWrite:1;
ULONG FourGB:1;
ULONG Rsvd2:3;
ULONG SideBandAddressing:1; // SBA
ULONG Rsvd3:14;
ULONG RequestQueueDepthMaximum:8; // RQ
} AGPStatus;
struct _PCI_AGP_COMMAND {
ULONG Rate:3;
ULONG Rsvd1:1;
ULONG FastWriteEnable:1;
ULONG FourGBEnable:1;
ULONG Rsvd2:2;
ULONG AGPEnable:1;
ULONG SBAEnable:1;
ULONG Rsvd3:14;
ULONG RequestQueueDepth:8;
} AGPCommand;
} PCI_AGP_CAPABILITY, *PPCI_AGP_CAPABILITY;
#define PCI_AGP_RATE_1X 0x1
#define PCI_AGP_RATE_2X 0x2
#define PCI_AGP_RATE_4X 0x4
//
// MSI (Message Signalled Interrupts) Capability
//
typedef struct _PCI_MSI_CAPABILITY {
PCI_CAPABILITIES_HEADER Header;
struct _PCI_MSI_MESSAGE_CONTROL {
USHORT MSIEnable:1;
USHORT MultipleMessageCapable:3;
USHORT MultipleMessageEnable:3;
USHORT CapableOf64Bits:1;
USHORT Reserved:8;
} MessageControl;
union {
struct _PCI_MSI_MESSAGE_ADDRESS {
ULONG_PTR Reserved:2; // always zero, DWORD aligned address
ULONG_PTR Address:30;
} Register;
ULONG_PTR Raw;
} MessageAddress;
//
// The rest of the Capability structure differs depending on whether
// 32bit or 64bit addressing is being used.
//
// (The CapableOf64Bits bit above determines this)
//
union {
// For 64 bit devices
struct _PCI_MSI_64BIT_DATA {
ULONG MessageUpperAddress;
USHORT MessageData;
} Bit64;
// For 32 bit devices
struct _PCI_MSI_32BIT_DATA {
USHORT MessageData;
ULONG Unused;
} Bit32;
} Data;
} PCI_MSI_CAPABILITY, *PPCI_PCI_CAPABILITY;
// begin_wdm
//
// Base Class Code encodings for Base Class (from PCI spec rev 2.1).
//
#define PCI_CLASS_PRE_20 0x00
#define PCI_CLASS_MASS_STORAGE_CTLR 0x01
#define PCI_CLASS_NETWORK_CTLR 0x02
#define PCI_CLASS_DISPLAY_CTLR 0x03
#define PCI_CLASS_MULTIMEDIA_DEV 0x04
#define PCI_CLASS_MEMORY_CTLR 0x05
#define PCI_CLASS_BRIDGE_DEV 0x06
#define PCI_CLASS_SIMPLE_COMMS_CTLR 0x07
#define PCI_CLASS_BASE_SYSTEM_DEV 0x08
#define PCI_CLASS_INPUT_DEV 0x09
#define PCI_CLASS_DOCKING_STATION 0x0a
#define PCI_CLASS_PROCESSOR 0x0b
#define PCI_CLASS_SERIAL_BUS_CTLR 0x0c
#define PCI_CLASS_WIRELESS_CTLR 0x0d
#define PCI_CLASS_INTELLIGENT_IO_CTLR 0x0e
#define PCI_CLASS_SATELLITE_COMMS_CTLR 0x0f
#define PCI_CLASS_ENCRYPTION_DECRYPTION 0x10
#define PCI_CLASS_DATA_ACQ_SIGNAL_PROC 0x11
// 0d thru fe reserved
#define PCI_CLASS_NOT_DEFINED 0xff
//
// Sub Class Code encodings (PCI rev 2.1).
//
// Class 00 - PCI_CLASS_PRE_20
#define PCI_SUBCLASS_PRE_20_NON_VGA 0x00
#define PCI_SUBCLASS_PRE_20_VGA 0x01
// Class 01 - PCI_CLASS_MASS_STORAGE_CTLR
#define PCI_SUBCLASS_MSC_SCSI_BUS_CTLR 0x00
#define PCI_SUBCLASS_MSC_IDE_CTLR 0x01
#define PCI_SUBCLASS_MSC_FLOPPY_CTLR 0x02
#define PCI_SUBCLASS_MSC_IPI_CTLR 0x03
#define PCI_SUBCLASS_MSC_RAID_CTLR 0x04
#define PCI_SUBCLASS_MSC_OTHER 0x80
// Class 02 - PCI_CLASS_NETWORK_CTLR
#define PCI_SUBCLASS_NET_ETHERNET_CTLR 0x00
#define PCI_SUBCLASS_NET_TOKEN_RING_CTLR 0x01
#define PCI_SUBCLASS_NET_FDDI_CTLR 0x02
#define PCI_SUBCLASS_NET_ATM_CTLR 0x03
#define PCI_SUBCLASS_NET_ISDN_CTLR 0x04
#define PCI_SUBCLASS_NET_OTHER 0x80
// Class 03 - PCI_CLASS_DISPLAY_CTLR
// N.B. Sub Class 00 could be VGA or 8514 depending on Interface byte
#define PCI_SUBCLASS_VID_VGA_CTLR 0x00
#define PCI_SUBCLASS_VID_XGA_CTLR 0x01
#define PCI_SUBLCASS_VID_3D_CTLR 0x02
#define PCI_SUBCLASS_VID_OTHER 0x80
// Class 04 - PCI_CLASS_MULTIMEDIA_DEV
#define PCI_SUBCLASS_MM_VIDEO_DEV 0x00
#define PCI_SUBCLASS_MM_AUDIO_DEV 0x01
#define PCI_SUBCLASS_MM_TELEPHONY_DEV 0x02
#define PCI_SUBCLASS_MM_OTHER 0x80
// Class 05 - PCI_CLASS_MEMORY_CTLR
#define PCI_SUBCLASS_MEM_RAM 0x00
#define PCI_SUBCLASS_MEM_FLASH 0x01
#define PCI_SUBCLASS_MEM_OTHER 0x80
// Class 06 - PCI_CLASS_BRIDGE_DEV
#define PCI_SUBCLASS_BR_HOST 0x00
#define PCI_SUBCLASS_BR_ISA 0x01
#define PCI_SUBCLASS_BR_EISA 0x02
#define PCI_SUBCLASS_BR_MCA 0x03
#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04
#define PCI_SUBCLASS_BR_PCMCIA 0x05
#define PCI_SUBCLASS_BR_NUBUS 0x06
#define PCI_SUBCLASS_BR_CARDBUS 0x07
#define PCI_SUBCLASS_BR_RACEWAY 0x08
#define PCI_SUBCLASS_BR_OTHER 0x80
// Class 07 - PCI_CLASS_SIMPLE_COMMS_CTLR
// N.B. Sub Class 00 and 01 additional info in Interface byte
#define PCI_SUBCLASS_COM_SERIAL 0x00
#define PCI_SUBCLASS_COM_PARALLEL 0x01
#define PCI_SUBCLASS_COM_MULTIPORT 0x02
#define PCI_SUBCLASS_COM_MODEM 0x03
#define PCI_SUBCLASS_COM_OTHER 0x80
// Class 08 - PCI_CLASS_BASE_SYSTEM_DEV
// N.B. See Interface byte for additional info.
#define PCI_SUBCLASS_SYS_INTERRUPT_CTLR 0x00
#define PCI_SUBCLASS_SYS_DMA_CTLR 0x01
#define PCI_SUBCLASS_SYS_SYSTEM_TIMER 0x02
#define PCI_SUBCLASS_SYS_REAL_TIME_CLOCK 0x03
#define PCI_SUBCLASS_SYS_GEN_HOTPLUG_CTLR 0x04
#define PCI_SUBCLASS_SYS_OTHER 0x80
// Class 09 - PCI_CLASS_INPUT_DEV
#define PCI_SUBCLASS_INP_KEYBOARD 0x00
#define PCI_SUBCLASS_INP_DIGITIZER 0x01
#define PCI_SUBCLASS_INP_MOUSE 0x02
#define PCI_SUBCLASS_INP_SCANNER 0x03
#define PCI_SUBCLASS_INP_GAMEPORT 0x04
#define PCI_SUBCLASS_INP_OTHER 0x80
// Class 0a - PCI_CLASS_DOCKING_STATION
#define PCI_SUBCLASS_DOC_GENERIC 0x00
#define PCI_SUBCLASS_DOC_OTHER 0x80
// Class 0b - PCI_CLASS_PROCESSOR
#define PCI_SUBCLASS_PROC_386 0x00
#define PCI_SUBCLASS_PROC_486 0x01
#define PCI_SUBCLASS_PROC_PENTIUM 0x02
#define PCI_SUBCLASS_PROC_ALPHA 0x10
#define PCI_SUBCLASS_PROC_POWERPC 0x20
#define PCI_SUBCLASS_PROC_COPROCESSOR 0x40
// Class 0c - PCI_CLASS_SERIAL_BUS_CTLR
#define PCI_SUBCLASS_SB_IEEE1394 0x00
#define PCI_SUBCLASS_SB_ACCESS 0x01
#define PCI_SUBCLASS_SB_SSA 0x02
#define PCI_SUBCLASS_SB_USB 0x03
#define PCI_SUBCLASS_SB_FIBRE_CHANNEL 0x04
#define PCI_SUBCLASS_SB_SMBUS 0x05
// Class 0d - PCI_CLASS_WIRELESS_CTLR
#define PCI_SUBCLASS_WIRELESS_IRDA 0x00
#define PCI_SUBCLASS_WIRELESS_CON_IR 0x01
#define PCI_SUBCLASS_WIRELESS_RF 0x10
#define PCI_SUBCLASS_WIRELESS_OTHER 0x80
// Class 0e - PCI_CLASS_INTELLIGENT_IO_CTLR
#define PCI_SUBCLASS_INTIO_I2O 0x00
// Class 0f - PCI_CLASS_SATELLITE_CTLR
#define PCI_SUBCLASS_SAT_TV 0x01
#define PCI_SUBCLASS_SAT_AUDIO 0x02
#define PCI_SUBCLASS_SAT_VOICE 0x03
#define PCI_SUBCLASS_SAT_DATA 0x04
// Class 10 - PCI_CLASS_ENCRYPTION_DECRYPTION
#define PCI_SUBCLASS_CRYPTO_NET_COMP 0x00
#define PCI_SUBCLASS_CRYPTO_ENTERTAINMENT 0x10
#define PCI_SUBCLASS_CRYPTO_OTHER 0x80
// Class 11 - PCI_CLASS_DATA_ACQ_SIGNAL_PROC
#define PCI_SUBCLASS_DASP_DPIO 0x00
#define PCI_SUBCLASS_DASP_OTHER 0x80
typedef enum _MM_PAGE_PRIORITY {
LowPagePriority,
NormalPagePriority = 16,
HighPagePriority = 32
} MM_PAGE_PRIORITY;
#else // BINARY_COMPATIBLE && !NDIS_WDM
#if (!BINARY_COMPATIBLE)
//
// BINARY_COMPATIBLE = 0 and NDIS_WDM = 1 then use ntddk.h
// BINARY_COMPATIBLE = 0 and NDIS_WDM = 0 then use ntddk.h
//
//
// The definitions available in ntddk.h must not be used directly by non-WDM miniport drivers.
//
#include <ntddk.h>
#else // !BINARY_COMPATIBLE
//
// BINARY_COMPATIBLE = 1 and NDIS_WDM = 1 then use wdm.h
//
#include <wdm.h>
#endif // else !BINARY_COMPATIBLE
#endif // else BINARY_COMPATIBLE && !NDIS_WDM