174 lines
4.6 KiB
C
174 lines
4.6 KiB
C
/*++
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Copyright (c) 2001 Microsoft Corporation
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Module Name:
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viac3.h
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Abstract:
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Author:
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Tom Brown (t-tbrown) 2001-06-26 - created file
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Environment:
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Kernel mode
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Notes:
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Revision History:
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--*/
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#ifndef _VIAC3_H
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#define _VIAC3_H
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#define VIAC3_PARAMETERS_KEY L"\\Registry\\Machine\\System\\CurrentControlSet\\Services\\ViaC3\\Parameters"
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#include "..\lib\processor.h"
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//
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// set in IdentifyCPUVersion according to data in
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// "Samuel 2, Ezra, and C5M LongHaul Programmer's Guide (Version 3.0.0 Gamma)"
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//
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// Encoding of the LongHaul revision set by IdentifyCPUVersion. Use it with
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// the following macros
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extern ULONG LongHaulFlags;
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// CPU has the LongHaul MSR at 110Ah
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#define SUPPORTS_MSR_FLAG (0x1)
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// Supports changing the bus ratio to change the core frequency
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#define SUPPORTS_SOFTBR_FLAG (0x2)
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// Supports changing the core voltage
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#define SUPPORTS_SOFTVID_FLAG (0x4)
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// Can not change the core voltage by more than 50mV at a time
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#define NEEDS_VOLTAGE_STEPPING_FLAG (0x8)
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// Copy bits of MSR from 40:36 to 24:20 so that softVID is initalized
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#define SET_MAXV_AT_STARTUP_FLAG (0x10)
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#define SUPPORTS_MSR (LongHaulFlags & SUPPORTS_MSR_FLAG)
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#define SUPPORTS_SOFTBR (LongHaulFlags & SUPPORTS_SOFTBR_FLAG)
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#define SUPPORTS_SOFTVID (LongHaulFlags & SUPPORTS_SOFTVID_FLAG)
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#define NEEDS_VOLTAGE_STEPPING (LongHaulFlags & NEEDS_VOLTAGE_STEPPING_FLAG)
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#define SET_MAXV_AT_STARTUP (LongHaulFlags & SET_MAXV_AT_STARTUP_FLAG)
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// Flags used to read hack bits from the registry
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#define DISABLE_ALL_HACK_FLAG (0x1)
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#define NO_SOFTVID_HACK_FLAG (0x2)
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#define NO_VOLTAGE_STEPPING_HACK_FLAG (0x4)
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#define MSR_LONGHAUL_ADDR 0x110A
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#define EBL_CR_POWERON_MSR 0x2A
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#define MSR_1147_ADDR 0x1147
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#define INVALID_BR -1
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#define CPUID_FUNC0_EBX 0x746E6543
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#define CPUID_FUNC0_EDX 0x48727561
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#define CPUID_FUNC0_ECX 0x736C7561
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typedef struct {
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union {
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struct {
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ULONG Stepping:4; // 3:0
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ULONG Model:4; // 7:4
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ULONG Family:4; // 11:8
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};
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ULONG AsDWord;
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};
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} CPUID_FUNC1, *PCPUID_FUNC1;
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typedef struct {
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union {
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struct {
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ULONG Unknown:22; // 21:0
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ULONG ClockMult:4; // 25:22
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};
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ULONGLONG AsQWord;
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};
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} EBL_CR_POWERON, *PEBL_CR_POWERON;
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typedef struct {
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union {
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struct {
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ULONG Unknown:19; // 18:0
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ULONG Enable_Change:1; // 19
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ULONG Unknown2:3; // 22:20
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ULONG Clock_Mult:4; // 26:23
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};
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ULONGLONG AsQWord;
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};
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} MSR_1147, *PMSR_1147;
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#define VRM85 0
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typedef struct {
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union {
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struct {
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ULONG RevisionID:4; // 3:0
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ULONG RevisionKey:4; // 7:4
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ULONG EnableSoftBusRatio:1; // 8
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ULONG EnableSoftVID:1; // 9
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ULONG EnableSoftBSEL:1; // 10
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ULONG Reserved1:1; // 11
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ULONG Reserved2:1; // 12
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ULONG Reserved3:1; // 13
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ULONG SoftBusRatio4:1; // 14
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ULONG VRMRev:1; // 15
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ULONG SoftBusRatio0:4; // 19:16
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ULONG SoftVID:5; // 24:20
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ULONG Reserved4:3; // 27:25
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ULONG SoftBSEL:2; // 29:28
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ULONG Reserved5:2; // 31:30
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ULONG MaxMHzBR0:4; // 35:32
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ULONG MaximumVID:5; // 40:36
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ULONG MaxMHzFSB:2; // 42:41
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ULONG MaxMHzBR4:1; // 43
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ULONG Reserved6:4; // 47:44
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ULONG MinMHzBR0:4; // 51:48
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ULONG MinimumVID:5; // 56:52
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ULONG MinMHzFSB:2; // 58:57
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ULONG MinMHzBR4:1; // 59
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ULONG Reserved7:4; // 63:60
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};
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ULONGLONG AsQWord;
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};
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} LONGHAUL_MSR, *PLONGHAUL_MSR;
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typedef struct {
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union {
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struct { // family/model/stepping 6/7/1-f,6/8/*
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ULONG Fid:8; // 7:0 MSR 110Ah[14,19:16]
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ULONG EnableFid:1; // 8 MSR 110Ah[8]
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ULONG Reserved1:7; // 15:9
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ULONG Vid:8; // 23:16 MSR 110Ah[24:20]
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ULONG EnableVid:1; // 24 MSR 110Ah[9]
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ULONG Reserved2:7; // 31:25
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};
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ULONG AsDWord;
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};
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} PSS_CONTROL, *PPSS_CONTROL;
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typedef struct {
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union {
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struct {
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ULONG Fid:8; // 7:0
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ULONG Reserved1:8; // 15:8
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ULONG Vid:8; // 23:16
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ULONG Reserved2:8; // 31:24
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};
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ULONG AsDWord;
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};
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} PSS_STATUS, *PPSS_STATUS;
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#endif // _VIAC3_H
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