538 lines
16 KiB
NASM
538 lines
16 KiB
NASM
title "mpipia"
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;++
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;
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; Copyright (c) 1989-1995 Microsoft Corporation
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;
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; Module Name:
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;
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; mpipia.asm
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;
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; Abstract:
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;
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; This module implements the x86 specific fucntions required to
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; support multiprocessor systems.
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;
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; Author:
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;
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; David N. Cutler (davec) 5-Feb-1995
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;
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; Environment:
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;
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; Krnel mode only.
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;
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; Revision History:
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;
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;--
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.586p
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.xlist
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include ks386.inc
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include mac386.inc
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include callconv.inc
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.list
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EXTRNP HalRequestSoftwareInterrupt,1,IMPORT,FASTCALL
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EXTRNP HalRequestSoftwareInterrupt,1,IMPORT,FASTCALL
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EXTRNP _HalRequestIpi,1,IMPORT
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EXTRNP _KiFreezeTargetExecution, 2
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ifdef DBGMP
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EXTRNP _KiPollDebugger
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endif
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extrn _KiProcessorBlock:DWORD
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DELAYCOUNT equ 2000h
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_DATA SEGMENT DWORD PUBLIC 'DATA'
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public _KiSynchPacket
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_KiSynchPacket dd 0
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_DATA ENDS
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_TEXT SEGMENT DWORD PUBLIC 'CODE'
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ASSUME DS:FLAT, ES:FLAT, SS:NOTHING, FS:NOTHING, GS:NOTHING
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;++
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;
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; BOOLEAN
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; KiIpiServiceRoutine (
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; IN PKTRAP_FRAME TrapFrame,
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; IN PKEXCEPTION_FRAME ExceptionFrame
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; )
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;
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; Routine Description:
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;
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; This routine is called at IPI level to process any outstanding
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; interporcessor requests for the current processor.
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;
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; Arguments:
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;
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; TrapFrame - Supplies a pointer to a trap frame.
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;
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; ExceptionFrame - Not used.
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;
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; Return Value:
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;
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; A value of TRUE is returned, if one of more requests were service.
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; Otherwise, FALSE is returned.
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;
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;--
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cPublicProc _KiIpiServiceRoutine, 2
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ifndef NT_UP
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cPublicFpo 2, 3
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push ebx ; save nonvolatile registers
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push esi ;
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push edi ;
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mov esi, PCR[PcPrcb] ; get current processor block address
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xor ebx, ebx ; set exchange value
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xor ecx, ecx ;
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mov eax, [esi].PbRequestSummary ; get current request summary
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mov edx, [esi].PbSignalDone ; get current request packet
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isr05: ;
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lock cmpxchg8b qword ptr PbRequestSummary[esi] ; capture and clear request data
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jnz short isr05 ; if nz, compare exchange failed
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mov ebx, eax ; save request summary
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mov edi, edx ; save request packet
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;
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; Check for freeze request or synchronous request.
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;
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test bl, IPI_FREEZE + IPI_SYNCH_REQUEST ; test for freeze or packet
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jnz short isr50 ; if nz, freeze or synch request
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;
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; For RequestSummary's other then IPI_FREEZE set return to TRUE
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;
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mov bh, 1 ; set return value
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;
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; Check for Packet ready.
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;
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; If a packet is ready, then get the address of the requested function
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; and call the function passing the address of the packet address as a
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; parameter.
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;
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isr10: test edi, edi ; test for request packet
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jz short isr20 ; if z set, no packet ready
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mov edx, edi ; clear low bit in packet address
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btr edx, 0 ;
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push [edx].PbCurrentPacket + 8 ; push parameters on stack
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push [edx].PbCurrentPacket + 4 ;
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push [edx].PbCurrentPacket + 0 ;
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push edi ; push source processor block address
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mov eax, [edx].PbWorkerRoutine ; get worker routine address
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mov edx, [esp + 16 + 4*4] ; get current trap frame address
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mov [esi].PbIpiFrame, edx ; save current trap frame address
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call eax ; call worker routine
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mov bh, 1 ; set return value
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;
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; Check for APC interrupt request.
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;
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isr20: test bl, IPI_APC ; check if APC interrupt requested
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jz short isr30 ; if z, APC interrupt not requested
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mov ecx, APC_LEVEL ; request APC interrupt
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fstCall HalRequestSoftwareInterrupt ;
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;
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; Check for DPC interrupt request.
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;
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isr30: test bl, IPI_DPC ; check if DPC interrupt requested
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jz short isr40 ; if z, DPC interrupt not requested
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mov ecx, DISPATCH_LEVEL ; request DPC interrupt
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fstCall HalRequestSoftwareInterrupt ;
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isr40: mov al, bh ; return status
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pop edi ; restore nonvolatile registers
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pop esi ;
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pop ebx ;
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stdRET _KiIpiServiceRoutine
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;
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; Freeze or synchronous request
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;
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isr50: test bl, IPI_FREEZE ; test if freeze request
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jz short isr60 ; if z, no freeze request
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;
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; Freeze request is requested
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;
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mov ecx, [esp] + 20 ; get exception frame address
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mov edx, [esp] + 16 ; get trap frame address
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stdCall _KiFreezeTargetExecution, <edx, ecx> ; freeze execution
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test bl, not IPI_FREEZE ; Any other IPI RequestSummary?
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setnz bh ; Set return code accordingly
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test bl, IPI_SYNCH_REQUEST ; test if synch request
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jz isr10 ; if z, no sync request
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;
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; Synchronous packet request. Pointer to requesting PRCB in KiSynchPacket.
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;
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isr60: mov eax, _KiSynchPacket ; get PRCB of requesting processor
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mov edx, eax ; clear low bit in packet address
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btr edx, 0 ;
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push [edx].PbCurrentPacket+8 ; push parameters on stack
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push [edx].PbCurrentPacket+4 ;
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push [edx].PbCurrentPacket+0 ;
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push eax ; push source processor block address
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mov eax, [edx].PbWorkerRoutine ; get worker routine address
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mov edx, [esp + 16 + 4*4] ; get current trap frame address
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mov [esi].PbIpiFrame, edx ; save current trap frame address
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call eax ; call worker routine
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mov bh, 1 ; set return value
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jmp isr10 ; join common code
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else
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xor eax, eax ; return FALSE
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stdRET _KiIpiServiceRoutine
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endif
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stdENDP _KiIpiServiceRoutine
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;++
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;
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; VOID
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; FASTCALL
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; KiIpiSend (
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; IN KAFFINITY TargetProcessors,
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; IN KIPI_REQUEST Request
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; )
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;
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; Routine Description:
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;
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; This function requests the specified operation on the targt set of
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; processors.
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;
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; Arguments:
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;
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; TargetProcessors (ecx) - Supplies the set of processors on which the
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; specified operation is to be executed.
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;
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; IpiRequest (edx) - Supplies the request operation code.
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;
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; Return Value:
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;
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; None.
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;
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;--
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cPublicFastCall KiIpiSend, 2
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ifndef NT_UP
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cPublicFpo 0, 2
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push esi ; save registers
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push edi ;
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mov esi, ecx ; save target processor set
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shr ecx, 1 ; shift out first bit
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lea edi, _KiProcessorBlock ; get processor block array address
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jnc short is20 ; if nc, not in target set
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is10: mov eax, [edi] ; get processor block address
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lock or [eax].PbRequestSummary, edx ; set request summary bit
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is20: shr ecx, 1 ; shift out next bit
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lea edi, [edi+4] ; advance to next processor
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jc short is10 ; if target, go set summary bit
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jnz short is20 ; if more, check next
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stdCall _HalRequestIpi, <esi> ; request IPI interrupts on targets
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pop edi ; restore registers
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pop esi ;
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endif
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fstRet KiIpiSend
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fstENDP KiIpiSend
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;++
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;
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; VOID
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; KiIpiSendPacket (
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; IN KAFFINITY TargetProcessors,
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; IN PKIPI_WORKER WorkerFunction,
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; IN PVOID Parameter1,
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; IN PVOID Parameter2,
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; IN PVOID Parameter3
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; )
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;
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; Routine Description:
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;
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; This routine executes the specified worker function on the specified
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; set of processors.
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;
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; Arguments:
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;
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; TargetProcessors [esp + 4] - Supplies the set of processors on which the
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; specfied operation is to be executed.
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;
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; WorkerFunction [esp + 8] - Supplies the address of the worker function.
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;
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; Parameter1 - Parameter3 [esp + 12] - Supplies worker function specific
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; paramters.
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;
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; Return Value:
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;
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; None.
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;
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;--*/
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cPublicProc _KiIpiSendPacket, 5
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ifndef NT_UP
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cPublicFpo 5, 2
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push esi ; save registers
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push edi ;
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;
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; Store function address and parameters in the packet area of the PRCB on
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; the current processor.
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;
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mov edx, PCR[PcPrcb] ; get current processor block address
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mov ecx, [esp] + 12 ; get target processor set
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mov eax, [esp] + 16 ; get worker function address
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mov edi, [esp] + 20 ; get worker function parameter 1
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mov esi, [esp] + 24 ; get worker function parameter 2
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mov [edx].PbTargetSet, ecx ; set target processor set
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mov [edx].PbWorkerRoutine, eax ; set worker function address
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mov eax, [esp] + 28 ; get worker function parameter 3
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mov [edx].PbCurrentPacket, edi ; set work function parameters
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mov [edx].PbCurrentPacket + 4, esi ;
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mov [edx].PbCurrentPacket + 8, eax ;
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;
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; Determine whether one and only one bit is set in the target set.
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;
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mov edi, ecx ; copy recipient target set
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lea esi, dword ptr [ecx-1] ; compute target set - 1
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and edi, esi ; and target set with target set - 1
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neg edi ; negate result (CF = 0 if zero)
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sbb edi, edi ; compute result as one if the
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inc edi ; target set has one bit set
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jnz short isp5 ; if nz, target set has one bit
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mov [edx].PbPacketBarrier, ecx ; set packet barrier
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isp5: add edx, edi ; set low order bit if appropriate
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;
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; Loop through the target processors and send the packet to the specified
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; recipients.
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;
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shr ecx, 1 ; shift out first bit
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lea edi, _KiProcessorBlock ; get processor block array address
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jnc short isp30 ; if nc, not in target set
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isp10: mov esi, [edi] ; get processor block address
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isp20: mov eax, [esi].PbSignalDone ; check if packet being processed
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or eax, eax ;
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jne short isp20 ; if ne, packet being processed
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lock cmpxchg [esi].PbSignalDone, edx ; compare and exchange
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jnz short isp20 ; if nz, exchange failed
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isp30: shr ecx, 1 ; shift out next bit
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lea edi, [edi+4] ; advance to next processor
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jc short isp10 ; if c, in target set
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jnz short isp30 ; if nz, more target processors
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mov ecx, [esp] + 12 ; set target processor set
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stdCall _HalRequestIpi, <ecx> ; send IPI to targets
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pop edi ; restore register
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pop esi ;
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endif
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stdRet _KiIpiSendPacket
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stdENDP _KiIpiSendPacket
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;++
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;
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; VOID
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; FASTCALL
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; KiIpiSignalPacketDone (
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; IN PKIPI_CONTEXT Signaldone
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; )
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;
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; Routine Description:
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;
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; This routine signals that a processor has completed a packet by
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; clearing the calling processor's set member of the requesting
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; processor's packet.
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;
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; Arguments:
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;
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; SignalDone (ecx) - Supplies a pointer to the processor block of the
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; sending processor.
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;
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; N.B. The low order bit of signal done is set if the target set
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; has one and only one bit set.
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;
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; Return Value:
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;
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; None.
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;
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;--
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cPublicFastCall KiIpiSignalPacketDone, 1
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ifndef NT_UP
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btr ecx, 0 ; test and clear bit 0
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jc short spd20 ; if c set, only one bit set
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mov edx, PCR[PcPrcb] ; get current processor block address
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mov eax, [edx].PbSetMember ; get processor bit
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lock xor [ecx].PbTargetSet, eax ; clear processor set member
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jnz short spd10 ; if nz, more targets to go
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xor eax, eax ; clear packet barrier
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mov [ecx].PbPacketBarrier, eax ;
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spd10: fstRET KiIpiSignalPacketDone
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;
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; One and only one bit is set in the target set. Since this is the only
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; processor that can clear any bits in the target set, the target set can
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; be cleared with a simple write.
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;
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spd20: xor eax, eax ; clear target set
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mov [ecx].PbTargetSet, eax ;
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endif
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fstRET KiIpiSignalPacketDone
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fstENDP KiIpiSignalPacketDone
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;++
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;
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; VOID
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; FASTCALL
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; KiIpiSignalPacketDoneAndStall (
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; IN PKIPI_CONTEXT Signaldone
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; IN PULONG ReverseStall
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; )
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;
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; Routine Description:
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;
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; This routine signals that a processor has completed a packet by
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; clearing the calling processor's set member of the requesting
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; processor's packet, and then stalls of the reverse stall value
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;
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; Arguments:
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;
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; SignalDone (ecx) - Supplies a pointer to the processor block of the
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; sending processor.
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;
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; N.B. The low order bit of signal done is set if the target set
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; has one and only one bit set.
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;
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; ReverseStall (edx) - Supplies a pointer to the reverse stall barrier
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;
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; Return Value:
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;
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; None.
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;
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;--
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cPublicFastCall KiIpiSignalPacketDoneAndStall, 2
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cPublicFpo 0, 2
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ifndef NT_UP
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push ebx ; save register
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mov ebx, dword ptr [edx] ; get current value of barrier
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btr ecx, 0 ; test and clear bit 0
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jc short sps10 ; if c set, only one bit set
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mov eax, PCR[PcPrcb] ; get processor block address
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mov eax, [eax].PbSetMember ; get processor bit
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lock xor [ecx].PbTargetSet, eax ; clear processor set member
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jnz short sps20 ; if nz, more targets to go
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xor eax, eax ; clear packet barrier
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mov [ecx].PbPacketBarrier, eax ;
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jmp short sps20 ;
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;
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; One and only one bit is set in the target set. Since this is the only
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; processor that can clear any bits in the target set, the target set can
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; be cleared with a simple write.
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;
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sps10: xor eax, eax ; clear target set
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mov [ecx].PbTargetSet, eax ;
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;
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; Wait for barrier value to change.
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;
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sps20: mov eax, DELAYCOUNT
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sps30: cmp ebx, dword ptr [edx] ; barrier set?
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jne short sps90 ; yes, all done
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YIELD
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dec eax ; P54C pre C2 workaround
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jnz short sps30 ; if eax = 0, generate bus cycle
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ifdef DBGMP
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stdCall _KiPollDebugger ; Check for debugger ^C
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endif
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;
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; There could be a freeze execution outstanding. Check and clear
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; freeze flag.
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;
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.errnz IPI_FREEZE - 4
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mov eax, PCR[PcPrcb] ; get processor block address
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lock btr [eax].PbRequestSummary, 2 ; Generate bus cycle
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jnc short sps20 ; Freeze pending?
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cPublicFpo 0,4
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push ecx ; save target processor block
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push edx ; save barrier address
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stdCall _KiFreezeTargetExecution, <[eax].PbIpiFrame, 0> ;
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pop edx ; restore barrier address
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pop ecx ; restore target procssor block
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jmp short sps20 ;
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sps90: pop ebx ; restore register
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endif
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fstRET KiIpiSignalPacketDoneAndStall
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fstENDP KiIpiSignalPacketDoneAndStall
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_TEXT ends
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end
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