203 lines
4.1 KiB
C
203 lines
4.1 KiB
C
/*++
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Module Name:
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pciintrf.h
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Abstract:
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Contains interface GUIDs and structures for non-wdm modules that
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interface directly with the PCI driver via the PNP QUERY_INTERFACE
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mechanism.
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Author:
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Peter Johnston (peterj) November 1997
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Revision History:
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--*/
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DEFINE_GUID(GUID_PCI_CARDBUS_INTERFACE_PRIVATE, 0xcca82f31, 0x54d6, 0x11d1, 0x82, 0x24, 0x00, 0xa0, 0xc9, 0x32, 0x43, 0x85);
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DEFINE_GUID(GUID_PCI_PME_INTERFACE, 0xaac7e6ac, 0xbb0b, 0x11d2, 0xb4, 0x84, 0x00, 0xc0, 0x4f, 0x72, 0xde, 0x8b);
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DEFINE_GUID(GUID_PCI_NATIVE_IDE_INTERFACE, 0x98f37d63, 0x42ae, 0x4ad9, 0x8c, 0x36, 0x93, 0x2d, 0x28, 0x38, 0x3d, 0xf8);
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#ifndef _PCIINTRF_
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#define _PCIINTRF_
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//
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// CardBus
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//
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#define PCI_CB_INTRF_VERSION 1
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typedef
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NTSTATUS
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(*PCARDBUSADD)(
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IN PDEVICE_OBJECT DeviceObject,
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IN OUT PVOID * DeviceContext
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);
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typedef
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NTSTATUS
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(*PCARDBUSDELETE)(
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IN PVOID DeviceContext
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);
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typedef
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NTSTATUS
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(*PCARDBUSPCIDISPATCH)(
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IN PVOID DeviceContext,
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IN PIRP Irp
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);
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typedef
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NTSTATUS
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(*PCARDBUSGETLOCATION)(
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IN PDEVICE_OBJECT DeviceObject,
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OUT UCHAR *Bus,
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OUT UCHAR *DeviceNumber,
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OUT UCHAR *FunctionNumber,
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OUT BOOLEAN *OnDebugPath
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);
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typedef struct _PCI_CARDBUS_INTERFACE_PRIVATE {
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//
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// generic interface header
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//
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USHORT Size;
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USHORT Version;
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PVOID Context; // not actually used in this interface
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PINTERFACE_REFERENCE InterfaceReference;
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PINTERFACE_DEREFERENCE InterfaceDereference;
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//
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// Pci data.
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//
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PDRIVER_OBJECT DriverObject; // returned ptr to PCI driver
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//
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// Pci-Cardbus private interfaces
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//
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PCARDBUSADD AddCardBus;
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PCARDBUSDELETE DeleteCardBus;
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PCARDBUSPCIDISPATCH DispatchPnp;
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PCARDBUSGETLOCATION GetLocation;
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} PCI_CARDBUS_INTERFACE_PRIVATE, *PPCI_CARDBUS_INTERFACE_PRIVATE;
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typedef
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VOID
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(*PPME_GET_INFORMATION) (
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IN PDEVICE_OBJECT Pdo,
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OUT PBOOLEAN PmeCapable,
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OUT PBOOLEAN PmeStatus,
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OUT PBOOLEAN PmeEnable
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);
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typedef
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VOID
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(*PPME_CLEAR_PME_STATUS) (
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IN PDEVICE_OBJECT Pdo
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);
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typedef
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VOID
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(*PPME_SET_PME_ENABLE) (
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IN PDEVICE_OBJECT Pdo,
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IN BOOLEAN PmeEnable
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);
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typedef struct _PCI_PME_INTERFACE {
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//
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// generic interface header
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//
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USHORT Size;
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USHORT Version;
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PVOID Context;
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PINTERFACE_REFERENCE InterfaceReference;
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PINTERFACE_DEREFERENCE InterfaceDereference;
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//
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// PME Signal interfaces
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//
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PPME_GET_INFORMATION GetPmeInformation;
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PPME_CLEAR_PME_STATUS ClearPmeStatus;
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PPME_SET_PME_ENABLE UpdateEnable;
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} PCI_PME_INTERFACE, *PPCI_PME_INTERFACE;
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// Some well-known interface versions supported by the PCI Bus Driver
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#define PCI_PME_INTRF_STANDARD_VER 1
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//
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//
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//
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typedef
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VOID
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(*PPCI_IDE_IOSPACE_INTERRUPT_CONTROL)(
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IN PVOID Context,
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IN BOOLEAN Enable
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);
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/*++
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Routine Description:
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Controls the enabling and disabling of native mode PCI IDE controllers
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IoSpaceEnable bits which on some controllers (currently Intel ICH3)
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will mask off interrupt generation and this prevent the system from
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crashing...
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This should be called during AddDevice and the calling it modifies
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PCIs behaviour to not enable IO space during START_DEVICE for the device.
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This function the allows the requester to enable IO space when appropriate.
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Arguments:
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Context - Context from the PCI_NATIVE_IDE_INTERFACE
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Enable - If TRUE then set the IoSpaceEnable bit in the command register,
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otherwise disable it.
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Return Value:
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None - if this operation fails we have aleady bugchecked in the PCI driver
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--*/
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typedef struct _PCI_NATIVE_IDE_INTERFACE {
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//
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// Generic interface header
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//
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USHORT Size;
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USHORT Version;
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PVOID Context;
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PINTERFACE_REFERENCE InterfaceReference;
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PINTERFACE_DEREFERENCE InterfaceDereference;
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//
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// Native IDE methods
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//
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PPCI_IDE_IOSPACE_INTERRUPT_CONTROL InterruptControl;
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} PCI_NATIVE_IDE_INTERFACE, *PPCI_NATIVE_IDE_INTERFACE;
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#define PCI_NATIVE_IDE_INTERFACE_VERSION 1
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#endif // _PCIINTRF_
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